TW200634979A - A dual-damascene process for manufacturing semiconductor device - Google Patents
A dual-damascene process for manufacturing semiconductor deviceInfo
- Publication number
- TW200634979A TW200634979A TW094145356A TW94145356A TW200634979A TW 200634979 A TW200634979 A TW 200634979A TW 094145356 A TW094145356 A TW 094145356A TW 94145356 A TW94145356 A TW 94145356A TW 200634979 A TW200634979 A TW 200634979A
- Authority
- TW
- Taiwan
- Prior art keywords
- dual
- damascene process
- semiconductor device
- manufacturing semiconductor
- plug material
- Prior art date
Links
Classifications
-
- H10W20/085—
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The present disclosure relates generally to the manufacturing of semiconductor devices, and more particularly to a dual-damascene process for the manufacturing of semiconductor devices. Amethod of forming a dual-damascene structure includes forming a via hole and filling the via hole at least partially with a first plug material. A portion of the first plug material is removed and the remaining via hole is filled with a second plug material. A portion of the second plug material can also be removed.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/095,278 US20060223309A1 (en) | 2005-03-31 | 2005-03-31 | Dual-damascene process for manufacturing semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200634979A true TW200634979A (en) | 2006-10-01 |
| TWI288459B TWI288459B (en) | 2007-10-11 |
Family
ID=37071123
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW094145356A TWI288459B (en) | 2005-03-31 | 2005-12-20 | A dual-damascene process for manufacturing semiconductor device |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20060223309A1 (en) |
| TW (1) | TWI288459B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7282451B2 (en) * | 2005-08-31 | 2007-10-16 | Samsung Electronics Co., Ltd. | Methods of forming integrated circuit devices having metal interconnect layers therein |
| KR20090105700A (en) * | 2008-04-03 | 2009-10-07 | 주식회사 하이닉스반도체 | Manufacturing method of semiconductor device |
| JP6040089B2 (en) * | 2013-04-17 | 2016-12-07 | 富士フイルム株式会社 | Resist removing liquid, resist removing method using the same, and photomask manufacturing method |
| FR3076074A1 (en) * | 2017-12-21 | 2019-06-28 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | METHOD FOR MANUFACTURING A THROUGH DEVICE |
| KR102592854B1 (en) * | 2018-04-06 | 2023-10-20 | 삼성전자주식회사 | Semiconductor device and Method for fabricating thereof |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6100190A (en) * | 1998-02-19 | 2000-08-08 | Rohm Co., Ltd. | Method of fabricating semiconductor device, and semiconductor device |
| TW377502B (en) * | 1998-05-26 | 1999-12-21 | United Microelectronics Corp | Method of dual damascene |
| JP2000150644A (en) * | 1998-11-10 | 2000-05-30 | Mitsubishi Electric Corp | Method for manufacturing semiconductor device |
| JP3530073B2 (en) * | 1999-05-25 | 2004-05-24 | 株式会社東芝 | Semiconductor device and manufacturing method thereof |
| US6488509B1 (en) * | 2002-01-23 | 2002-12-03 | Taiwan Semiconductor Manufacturing Company | Plug filling for dual-damascene process |
| US6548401B1 (en) * | 2002-01-23 | 2003-04-15 | Micron Technology, Inc. | Semiconductor processing methods, and semiconductor constructions |
| KR20040009751A (en) * | 2002-07-25 | 2004-01-31 | 동부전자 주식회사 | Method for forming damascene pattern in semiconductor device |
| JP4050631B2 (en) * | 2003-02-21 | 2008-02-20 | 株式会社ルネサステクノロジ | Manufacturing method of electronic device |
| US7241682B2 (en) * | 2004-02-27 | 2007-07-10 | Taiwan Seminconductor Manufacturing Co., Ltd. | Method of forming a dual damascene structure |
| US7192863B2 (en) * | 2004-07-30 | 2007-03-20 | Texas Instruments Incorporated | Method of eliminating etch ridges in a dual damascene process |
-
2005
- 2005-03-31 US US11/095,278 patent/US20060223309A1/en not_active Abandoned
- 2005-12-20 TW TW094145356A patent/TWI288459B/en active
Also Published As
| Publication number | Publication date |
|---|---|
| US20060223309A1 (en) | 2006-10-05 |
| TWI288459B (en) | 2007-10-11 |
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