TW200527214A - Access device with a multi-channel transmission - Google Patents
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200527214 五'發明說明(1) --- 【發明所屬之技術領域】 本發明為一種多向傳輸之存取裝置,此裝置包括有一 連接介面、一處理單元、匯流排控制器與記憶體,藉此可 使所連接之主機設備相互連結傳輸資料,並存取週邊設 備,達成本發明多向傳輸之目的。 【先前技術】 在電細處理的資料愈來愈複雜的現在,習用之軟碟片 (floppy disk)已經不夠一般檔案的存取使用,再加上 容易毀損造成資料遺失的問題,電腦設備商即尋找最新的 可攜式又可重複讀寫的技術,這樣可攜式又要有大容量的 裝置,更必須搭配一個方便且普遍實施的傳輸協定與介 面。 如第一圖所示美國專利USP6, 1 48, 3 54所述之快閃記憶 體(flash memory)裝置1〇就因應而生,此快閃記憶體裝 置1 0藉由一通用串列匯流排(USB)連接端1 1連接電腦主 機之USB介面,裝置内設置有連接至USB連接端丨丨之連接介 面1 3 ’再連接一記憶體控制器1 5與負責儲存資料之快閃記 憶體區塊1 7。其中連接介面1 3係為符合通用串列匯流排定 義的傳輸協定之介面,更包含有轉譯電子訊號的邏輯介面 (logic interface) 131與傳送USB功能指令的功能介面 (function interface) 133;而記憶體控制器15中有接 收邏輯訊號的資料提取器(appl icati〇n packet extractor) 151、接收功能指令的指令編譯器200527214 Five 'invention description (1) --- [Technical field to which the invention belongs] The present invention is a multi-directional transmission access device. The device includes a connection interface, a processing unit, a bus controller and a memory. This enables the connected host devices to mutually transmit data and access peripheral devices, thereby achieving the purpose of multi-directional transmission of the invention. [Previous technology] Nowadays, the electronically processed data is becoming more and more complicated, and the floppy disk used is not enough for general file access. In addition, the problem of data loss due to easy damage is caused by computer equipment vendors. Look for the latest portable and repeatable read and write technologies. In this way, portable devices must have large-capacity devices, and they must be equipped with a convenient and universally implemented transmission protocol and interface. As shown in the first figure, the flash memory device 10 described in the US patent USP 6, 1 48, 3 54 was created accordingly. The flash memory device 10 uses a universal serial bus (USB) connector 1 1 Connects to the USB interface of the host computer. The device is provided with a connection interface connected to the USB connector 丨 丨 1 3 'Then connect a memory controller 15 and the flash memory area responsible for storing data Block 1 7. The connection interface 13 is an interface conforming to the definition of a universal serial bus transmission protocol, and further includes a logic interface 131 for translating electronic signals and a function interface 133 for transmitting USB function commands; and the memory The body controller 15 includes a data extractor (appl icati packet extractor) 151 that receives a logic signal, and an instruction compiler that receives a function instruction.
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200527214 五、發明說明(2) (application command interpreter) 15 3與其他如資料 位址解析、資料處理與記憶體驅動的功能。 而習用技術第二圖台灣專利5 6 4 3 4 9號所示為外接裝置 與電腦系統2 0連接示意圖,其中電腦系統2 0上設置有複數 個如USB等規格的外接埠2 〇 1,此電腦系統2 0藉其上之第一 連接端2 0 3連接至第一外接裝置2 1,此第一外接裝置2 1可 為如USB隨身碟之記憶體裝置或可為USB硬碟等外接儲存裝 置。 ’ 第二圖所示之第一外接裝置2 1藉一傳輸介面控制装置 2 1 1與驅動電路2 1 5連接於記憶體裝置2 1 9即核心模組2 1 7, 其中傳輸介面控制裝置2 1 1中有一橋接電路2 1 2,係藉以連 接電腦系統20中傳輸介面之格式(如USB)轉為第一外接 裝置2 1傳輸介面的格式(如ΑΤΑ);而驅動電路2 1 5係接受 一些訊號指令、資料來控制核心模組2 1 7的操作與控制其 中記憶體裝置2 1 9之存取動作。此外,電腦系統2 0之外接 埠2 0 1亦可藉第二連接端2 0 5連接其他複數個外接裝置,如 圖示之第二外接裝置22。 再請參閱第三圖所示之美國專利5 6 0 2 9 8 7號快閃記憶 體與電子式可程式化記憶體系統(Flash EE PROM System )裝置示意圖,圖中所示為一電腦系統,其中包括一微處 理器2 3 1,並藉系統匯流排2 3 3連接一系統最主要記憶體之 隨機存取記憶體2 3 5,再連接如鍵盤、滑鼠、螢幕等輸出 入裝置2 3 7端,另外電腦系統再藉系統匯流排2 3 3連接存取 裝置,如磁碟片或隨身碟等非揮發性記憶體2 3 9,此非揮200527214 V. Description of the invention (2) (application command interpreter) 15 3 and other functions such as data address resolution, data processing and memory drive. The second picture of the conventional technology is Taiwan Patent No. 5 6 4 3 4 9 which shows the connection between the external device and the computer system 20. The computer system 20 is provided with a plurality of external ports such as USB 2.0. The computer system 20 is connected to the first external device 21 through the first connection terminal 2 0 3 thereon. The first external device 21 can be a memory device such as a USB flash drive or an external storage device such as a USB hard disk. Device. '' The first external device 2 1 shown in the second figure is connected to the memory device 2 1 9 via the transmission interface control device 2 1 1 and the drive circuit 2 1 5, which is the core module 2 1 7, where the transmission interface control device 2 1 1 has a bridge circuit 2 1 2 which is used to connect the format of the transmission interface (such as USB) in the computer system 20 to the format of the first external device 2 1 transmission interface (such as ΑΑ); and the drive circuit 2 1 5 accepts Some signal instructions and data control the operation of the core module 2 1 7 and control the access operation of the memory device 2 1 9. In addition, the port 2 01 outside the computer system 20 can also be connected to a plurality of other external devices through the second connection terminal 2 05, such as the second external device 22 shown in the figure. Please refer to the schematic diagram of the United States Patent No. 5 0 2 9 8 7 flash memory and the electronic programmable memory system (Flash EE PROM System) device shown in the third figure. The figure shows a computer system. It includes a microprocessor 2 3 1 and the system's main memory 2 3 5 through the system bus 2 3 3, and then connected to input and output devices such as a keyboard, mouse, screen, etc. 2 3 7-side, in addition, the computer system uses the system bus 2 3 3 to connect to access devices, such as non-volatile memory such as magnetic disks or flash drives. 2 3 9
200527214 五、發明說明(3) 發性記憶體2 3 9,可為一快閃記憶體,由一控制器2 3 9 a與 由EEPR0M晶片等記憶體陣列23gb組成,其中資料訊號傳遞 與連結即由控制器2 3 9 a與電腦系統溝通。 但上述習用技術之記憶裝置與電腦系統之連接係為單 獨存取資料之裝置,只能作為資料存入與讀取的功能,若 作為兩部電腦之資料交換,必須由一部電腦先將資料存入 做f隱裝置(可為USB介面之裝置)’再移至另一部電腦 動讀取的動作。本發明鑒於習用藉USB記憶裝置交換資料 外作複雜之缺失,在不增加硬體設備與成本之考量下,設 鱼〜多向傳輸之存取裝置來達到簡化電腦間傳遞資料程 >、共享外接設備之目的。 傳 及 控 個 面 體 發明内 本發 輪資料 本發 連結與 制器以 容】 明使所連接— ,並共 明之多 存取週 連接複 器 坷邊設備;一 ’為一交換資 ’係為該通用 ;及連接匯流 、唯讀記憶體 旱與存 向傳輸 邊設備 數個主 暫存器 料之記 串列匯 排控制 與非揮 記憶體裝 取週邊設 之存取裝 ,該裝置 機設備; 連接該匯 憶體;~ 流排裝置 器、暫存 發性記憶 置之主機 備等多向 置係使複 包括有: 一連接介 流排控制 處理單元 之韌體; 器、連接 體之一系 設傷可 傳輪之 數個主 至少^ 面連接 器與該 ,一唯 一非揮 介面、 統匯流 相互連結 功能。 機設備相 個匯流排 一或複數 連接介 讀記憶 發性記憶 處理單 排控制200527214 V. Description of the invention (3) The parity memory 2 3 9 may be a flash memory, which is composed of a controller 2 3 9 a and a memory array 23GB such as an EEPR0M chip. The data signal is transmitted and connected. The controller 2 3 9 a communicates with the computer system. However, the connection between the memory device and the computer system of the above-mentioned conventional technology is a device that accesses data independently, and can only be used for data storage and reading functions. Save it as a hidden device (which can be a device with a USB interface), and then move it to another computer to read it. In view of the complexity of the conventional method of using USB memory devices to exchange data, the invention provides a multi-directional transmission and access device to simplify the process of transferring data between computers without increasing hardware and cost considerations. Sharing Purpose of external equipment. Passing and controlling the information of this round of invention within the invention of this round. The link between this post and the controller is to make sure that it is connected—and that the multi-access cycle is connected to the edge of the device; one for the exchange of funds is The general purpose; and the tandem bus control and the non-volatile memory loading and accessing peripheral equipment connecting the main temporary storage materials of the bus, read-only memory and storage to the transmission side equipment. ; Connect the memory unit; ~ Multi-directional device such as the streamline device, temporary host, etc. includes: a firmware connected to the media stream control processing unit; one of the device and the connection body The system is equipped with several main and at least ^ face connectors that can pass through the wheel, and a unique non-volatile interface, and a unified connection function. Machine equipment phase bus one or more connection interface read memory hair memory processing single bank control
200527214 五、發明說明(4) 【實施方 本發 連結與記 料,達到 請參 圖,其中 取控制器 或一儲存 3 2等一或 以通用串 與記憶體 接一或複 排實施之 本發 機3 2等複 達到相互 能共旱該 第一主機 存取控制 裝置再由 連結與記 結與記憶 圖0 式】 明係藉 憶體存 共享與 閱第四 本發明 3 0,此 媒體裝 複數個 列匯流 存取控 數個週 〇 明藉第 數個主 連接並 資料連 31與第 器3 0做 第二主 憶體存 體存取 一多向傳輸之存取裝置使所連接之一資料 取控制器之主機設備可相互連結傳輸資 存取週邊設備等多向傳輪之功能。 圖本發明多向傳輸之存取裝置連接示意 主體為一 USB介面之資料連結與記憶體存 為一非揮發性(non-volatile)之記憶體 置,没置有連接如第一主機3 1與第二主機 電細主機之連接端子3 0 1,此連接方式係 排(USB)之傳輸方式實施。此資料連結 制器3 0另設置一u S B連接介面302,藉以連 邊設備3 3,其連接方式亦為通用串列匯流 四圖所 機設備 傳輸資 結與記 二主機 資料交 機32讀 取控制 控制器 示之裝 藉資料 料之目 憶體存 3 2亦可 換,不 出,反 器3 0連 3 0之各 置達成第 連結與記 的,且此 取控制器 單純經此 需由第一 之亦然, 接存取週 部分連接 一主機3 1與第一主 憶體存取控制器3 0 複數個主機設備亦 3 0之記憶資料,而 資料連接與記憶體 主機3 1存入此記憶 或更進一步藉資料 便設備3 3。資料連 與結構請參閱第五200527214 V. Description of the invention (4) [The implementation party links and records the material, please refer to the picture, which takes the controller or a storage 3 2 etc. or the universal string and the memory connected to one or the implementation of the machine 3 2 and so on to reach mutual mutual coexistence, the first host access control device is then linked and recorded with memory. [Formula 0] The system is shared and read through the memory of the fourth invention 30. This medium contains several columns. Confluence access control for several weeks. The first master connection and data connection 31 and 30 are used as the second master memory to access a multi-directional transmission access device to control the data of one of the connections. The host equipment of the device can interconnect the transmission of data and access peripheral equipment and other multi-directional transfer functions. Figure The connection of a multi-directional transmission access device according to the present invention is a data connection of a USB interface and the memory is stored as a non-volatile memory device, and there is no connection such as the first host 31 and The connection terminal of the host computer of the second host is 301. This connection method is implemented by the transmission method of USB (USB). This data link controller 30 is also provided with a u SB connection interface 302, so as to connect the edge device 3 3, and its connection method is also the universal serial confluence. The control device displays the information of the borrowed material. The memory 2 can also be changed, but it is not available. The settings of the inverters 30 and 30 are connected and recorded, and the controller simply needs to be obtained by this. The first is also the case, the accessing and connecting part connects a host 3 1 and the first main memory access controller 30 to the memory data of the plurality of host devices 30, and the data connection is stored with the memory host 31 This memory or further borrowing data will be equipment 3 3. Data link and structure please refer to the fifth
200527214200527214
五、發明說明(5) 第五圖係為本發明多向傳輸之存取裝置結 圖示中- #多向傳輸之存取裝置係為一資料連結盥;:靜 存取控制器30,可使複數個主機設備(如第—主機/己,體 二主機32)相互連結,並共享該資料連結與記憶體取= 制器30之記憶空間’或兩主機可直接資料交換|,更可—广 存取所連接之週邊設備33,此資料連結與記憶體存取$ = 器30各部元件包括有:至少一個匯流排控制器(如第: 流排控制器3 0 3、第二匯流排控制器3 0 4等)、一連接人 30 2、一暫存器3 0 5、一處理單元3〇9、一記憶體3〇7與& = 各元件之系統匯流排控制器3 0 6。 本發明之主體為資料連結與記憶體存取控制器3 〇,此 資料連結與記憶體存取控制器30於本實施例為一 7別介面 的存取裝置,藉至少一個匯流排控制器透過一連接端子 3 0 1連接袓數個主機設備,如圖中之第一主機3 1與第二主 機32可以透過連接端子30丨分別藉第一匯流排控制器3〇3與 第二匯流排控制器3 0 4連接至資料連結與記憶體存取控制 器3 0,進而相互連接與傳輸,並可同時存取資料連結與記 憶體存取控制器3 0内的資料,故並不限於資料連結與記憶 體存取控制器30與單獨一部主機設備連接。主機設備 (3 1,3 2)透過USB之匯流排控制器(3 0 3,3 0 4)將資料與 存取信號傳入資料連結與記憶體存取控制器3 0之暫存區 3 0 5,此為一交換資料之記憶體,可以先進先出型態 (First-in First-out,FIFO)之記憶體實施,以達到複 數個主機設備同時存取也沒有效率降低的問題。V. Description of the invention (5) The fifth figure is a diagram of the access device of the multi-directional transmission of the present invention-#The access device of the multi-directional transmission is a data link; Make a plurality of host devices (such as the first host / the host and the second host 32) interconnect with each other and share the data link and the memory access = the memory space of the controller 30 'or the two hosts can directly exchange data | Peripheral equipment 33 connected to the wide access, this data link and memory access $ = each component of the device 30 includes: at least one bus controller (such as: bus controller 3 0 3, second bus control Device 3 0 4 etc.), a connected person 30 2, a temporary register 3 05, a processing unit 3009, a memory 3007 and & = system bus controller of each component 3 06. The main body of the present invention is a data link and memory access controller 30. This data link and memory access controller 30 in this embodiment is an access device of 7 different interfaces, which is transmitted through at least one bus controller. One connection terminal 3 0 1 is connected to several host devices. As shown in the figure, the first host 31 and the second host 32 can borrow the first bus controller 3 03 and the second bus control respectively through the connection terminal 30 丨. The device 300 is connected to the data link and the memory access controller 30, so as to be connected and transmitted with each other, and can simultaneously access the data in the data link and the memory access controller 30, so it is not limited to the data link The memory access controller 30 is connected to a single host device. The host device (31, 3 2) transfers data and access signals to the data link through the USB bus controller (3 0, 3 0 4) and the temporary storage area of the memory access controller 3 0 5. This is a memory for exchanging data, which can be implemented in a first-in first-out (FIFO) memory to achieve the problem of simultaneous access by multiple host devices without a decrease in efficiency.
200527214 五、發明說明(6) 資料連結與記憶體存取控制器3 0中包括有一資料數據 處理之處理單元3 0 9 ’此為資料連結與記憶體存取控制器 3 0運作時之中央處理為’當此資料連結與記憶體存取控制 器3 0開始運作時,即由燒錄於記憶體3 〇 7中之韋刃體 (firmware)來初始化該處理單元3 0 9,以非揮發性 (η ο η - v ο 1 a t i 1 e)快閃記憶體實施之。 本發明之資料連結與記憶體存取控制器3 〇更藉一連接 介面3 0 2連接一或複數個週邊設備,如圖示之第一外接襄 置3 3 1、第二外接裝置3 3 2與第三外接裝置3 3 3等,可以藉 以擴充本發明之功能,週邊設備通常為可攜性之記憶裝曰 置,如快閃記憶體之隨身碟、外接式光碟機、外接硬碟/ 軟碟等。 ” 上述之各部元件係由一系統匯流排控制器3 〇 6電信連 接達成之,藉此系統匯流排控制器3 0 6傳遞其中各部元件 之訊號與資料’連接有該匯流排控制器(3 〇 3,3 0 4)、該 暫存器3 0 5、該連接介面3〇2、該處理單元3〇9、該記情鹛 3 0 7。 本發明多向傳輸之存取裝置中之傳輸連接介面3〇2為 通用序列匯流排傳輸方法達成,其中存取裝置藉連接端子 3〇1連接一或複數個主機設備,藉連接介面3〇2連接一或複 數個週邊裝置33,使達成主機設備間之傳輸與分享該資料 連結與記憶體存取控制器之資料,更可以存取外接之 設備。 故 綜上所述,本發明實為一不可多得之發明物品,及具200527214 V. Description of the invention (6) The data link and memory access controller 30 includes a processing unit 3 0 9 'This is the central processing when the data link and memory access controller 30 is operating. When the data link and the memory access controller 30 start to operate, the processing unit 3 0 9 is initialized by the firmware that is burned in the memory 3 07 to non-volatile. (η ο η-v ο 1 ati 1 e) Flash memory implementation. The data link and the memory access controller 3 of the present invention are connected to one or more peripheral devices through a connection interface 3 02, as shown in the first external connection 3 3 1 and the second external device 3 3 2 And third external device 3 3 3, etc., which can expand the functions of the present invention. Peripheral devices are usually portable memory devices, such as flash drives, external optical drives, external hard disks / software Dishes, etc. The above-mentioned components are achieved by a system bus controller 3 06 telecommunication connection, whereby the system bus controller 3 06 transmits the signals and data of each component 'to which the bus controller (3 0) is connected. 3, 3 0 4), the temporary register 3 05, the connection interface 3202, the processing unit 3009, and the memory 307. The transmission connection in the multidirectional transmission access device of the present invention The interface 302 is achieved by a universal serial bus transmission method, in which the access device is connected to one or more host devices through a connection terminal 3101, and one or more peripheral devices 33 are connected through a connection interface 302, so that the host device Transfer and share the data of the data link and the memory access controller between them, and can also access external equipment. Therefore, the present invention is a rare invention item, and
第10頁 200527214 五、發明說明(7) . 產業上之利用性、新穎性及進步性,完全符合發明專利申 請要件,爰依法提出申請,敬請詳查並賜準本案專利,以 保障發明者權益。 惟以上所述僅為本發明之較佳可行實施例,非因此即 拘限本發明之專利範圍,故舉凡運用本發明說明書及圖示 内容所為之等效結構變化,均同理包含於本發明之範圍 内,合予陳明。Page 10 200527214 V. Description of Invention (7). The industrial applicability, novelty, and advancement fully comply with the requirements for the application for invention patents, and apply according to law. Please check and approve the patents in this case to protect the inventors. rights and interests. However, the above are only the preferred and feasible embodiments of the present invention, and the patent scope of the present invention is not limited. Therefore, any equivalent structural changes made by using the description and illustrated contents of the present invention are included in the present invention by the same reason. Within the scope, joint Chen Ming.
第11頁 200527214 圖式簡單說明 (1)圖示說明: 第一圖係為習用技術之快閃記憶體裝置示意圖; 第二圖係為習用技術之外接裝置與電腦系統連接示意圖; 第三圖係為習用技術之快閃記憶體與電子式可程式化資料 連結與記憶體存取控制器示意圖; 第四圖係為本發明多向傳輸之存取裝置連接示意圖; 第五圖係為本發明多向傳輸之存取裝置結構示意圖。 (2 )主要部份之代表符號: I 0快閃記憶體裝置 II USB連接端 1 3連接介面 1 3 1邏輯介面 1 3 3功能介面 1 5記憶體控制器 1 5 1資料提取器 1 5 3指令編譯器 1 7快閃記憶體區塊 2 0電腦系統 2 1第一外接裝置 2 2第二外接裝置 2 0 1外接埠 2 0 3第一連接端 2 1 1傳輸介面控制裝置Page 11 200527214 Brief description of the drawings (1) Illustration: The first diagram is a schematic diagram of a flash memory device of conventional technology; the second diagram is a schematic diagram of the connection between an external device of conventional technology and a computer system; the third diagram is Schematic diagram of flash memory and electronic programmable data connection and memory access controller for conventional technology; the fourth diagram is a schematic diagram of the connection of the multi-directional transmission access device of the present invention; the fifth diagram is a multi-direction transmission of the present invention. Schematic diagram of the access device for transmission. (2) Representative symbols of main parts: I 0 Flash memory device II USB connection terminal 1 3 Connection interface 1 3 1 Logic interface 1 3 3 Function interface 1 5 Memory controller 1 5 1 Data extractor 1 5 3 Command compiler 1 7 Flash memory block 2 0 Computer system 2 1 First external device 2 2 Second external device 2 0 1 External port 2 0 3 First connection terminal 2 1 1 Transmission interface control device
第12頁 200527214 圖式簡單說明 2 1 2橋接電路 2 0 5第二連接端 2 1 5驅動電路 2 1 7核心模組 2 1 9記憶體裝置 2 3 1微處理器 2 3 3系統匯流排 2 3 5隨機存取記憶體 2 3 7輸出入裝置 2 3 9非揮發性記憶體 2 3 9 a控制器 2 3 9b記憶體陣列 3 0資料連結與記憶體存取控制器 3 1第一主機 3 2第二主機 3 3週邊設備 301連接端子 3 0 2連接介面 3 0 3第一匯流排控制器 3 0 4第二匯流排控制器 3 0 5暫存器 3 0 6系統匯流排控制器 3 0 7記憶體 3 0 9處理單元Page 12 200527214 Brief description of the diagram 2 1 2 Bridge circuit 2 0 5 Second connection terminal 2 1 5 Drive circuit 2 1 7 Core module 2 1 9 Memory device 2 3 1 Microprocessor 2 3 3 System bus 2 3 5 Random Access Memory 2 3 7 I / O Device 2 3 9 Non-volatile Memory 2 3 9 a Controller 2 3 9b Memory Array 3 0 Data Link and Memory Access Controller 3 1 First Host 3 2 Second host 3 3 Peripheral equipment 301 Connection terminal 3 0 2 Connection interface 3 0 3 First bus controller 3 0 4 Second bus controller 3 0 5 Register 3 0 6 System bus controller 3 0 7 memory 3 0 9 processing unit
第13頁 200527214 圖式簡單說明 3 3 1第一外接裝置 3 3 2第二外接裝置 3 3 3第三外接裝置 第14頁Page 13 200527214 Simple illustration of the drawings 3 3 1 First external device 3 3 2 Second external device 3 3 3 Third external device Page 14
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| TW93103564A TWI269176B (en) | 2004-02-13 | 2004-02-13 | Access device with a multi-channel transmission |
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