TW200402586A - Reflection-transmission type liquid crystal display device and method for manufacturing the same - Google Patents
Reflection-transmission type liquid crystal display device and method for manufacturing the same Download PDFInfo
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- TW200402586A TW200402586A TW91133412A TW91133412A TW200402586A TW 200402586 A TW200402586 A TW 200402586A TW 91133412 A TW91133412 A TW 91133412A TW 91133412 A TW91133412 A TW 91133412A TW 200402586 A TW200402586 A TW 200402586A
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- Prior art keywords
- electrode
- layer
- liquid crystal
- crystal display
- display device
- Prior art date
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 113
- 238000000034 method Methods 0.000 title claims abstract description 108
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 65
- 229910052751 metal Inorganic materials 0.000 claims abstract description 113
- 239000002184 metal Substances 0.000 claims abstract description 113
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 230000005540 biological transmission Effects 0.000 claims abstract description 10
- 239000010410 layer Substances 0.000 claims description 515
- 230000004888 barrier function Effects 0.000 claims description 68
- 239000010409 thin film Substances 0.000 claims description 39
- 239000011229 interlayer Substances 0.000 claims description 34
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 28
- 238000005530 etching Methods 0.000 claims description 20
- 239000003990 capacitor Substances 0.000 claims description 18
- 230000000903 blocking effect Effects 0.000 claims description 17
- 238000000137 annealing Methods 0.000 claims description 14
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 12
- 238000009413 insulation Methods 0.000 claims description 11
- 238000000151 deposition Methods 0.000 claims description 10
- 238000000059 patterning Methods 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 7
- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 claims description 7
- 239000004575 stone Substances 0.000 claims description 7
- 229910052786 argon Inorganic materials 0.000 claims description 6
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 6
- 150000004767 nitrides Chemical class 0.000 claims description 5
- 238000009832 plasma treatment Methods 0.000 claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 230000002496 gastric effect Effects 0.000 claims description 2
- 229910052692 Dysprosium Inorganic materials 0.000 claims 1
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 claims 1
- YZCKVEUIGOORGS-NJFSPNSNSA-N Tritium Chemical compound [3H] YZCKVEUIGOORGS-NJFSPNSNSA-N 0.000 claims 1
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical compound [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 claims 1
- KBQHZAAAGSGFKK-UHFFFAOYSA-N dysprosium atom Chemical compound [Dy] KBQHZAAAGSGFKK-UHFFFAOYSA-N 0.000 claims 1
- 210000002784 stomach Anatomy 0.000 claims 1
- 229910052722 tritium Inorganic materials 0.000 claims 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 1
- 238000005260 corrosion Methods 0.000 abstract description 9
- 230000007797 corrosion Effects 0.000 abstract description 9
- 238000001459 lithography Methods 0.000 description 27
- 239000011651 chromium Substances 0.000 description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- 238000011161 development Methods 0.000 description 9
- 229910052581 Si3N4 Inorganic materials 0.000 description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 8
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 7
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- 229910052804 chromium Inorganic materials 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 6
- 239000011521 glass Substances 0.000 description 6
- 239000010408 film Substances 0.000 description 5
- 239000012535 impurity Substances 0.000 description 5
- 238000005468 ion implantation Methods 0.000 description 5
- 239000010453 quartz Substances 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 4
- 229910052594 sapphire Inorganic materials 0.000 description 4
- 239000010980 sapphire Substances 0.000 description 4
- WGLPBDUCMAPZCE-UHFFFAOYSA-N Trioxochromium Chemical compound O=[Cr](=O)=O WGLPBDUCMAPZCE-UHFFFAOYSA-N 0.000 description 3
- 229910000423 chromium oxide Inorganic materials 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 239000011368 organic material Substances 0.000 description 3
- 230000000149 penetrating effect Effects 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- UQZIWOQVLUASCR-UHFFFAOYSA-N alumane;titanium Chemical compound [AlH3].[Ti] UQZIWOQVLUASCR-UHFFFAOYSA-N 0.000 description 2
- QQHSIRTYSFLSRM-UHFFFAOYSA-N alumanylidynechromium Chemical compound [Al].[Cr] QQHSIRTYSFLSRM-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 238000005224 laser annealing Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052716 thallium Inorganic materials 0.000 description 1
- BKVIYDNLLOSFOA-UHFFFAOYSA-N thallium Chemical compound [Tl] BKVIYDNLLOSFOA-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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- Liquid Crystal (AREA)
Abstract
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200402586 玖、發明說明 (發明說明應敘明:發明所屬之技術領域、先前技術、内容、實施方式及圖式簡單說明) 【發明所屬之技術領域3 發明領域 本發明係有關一種反射·透射式液晶顯示裝置及其製 5 造方法,特別係有關一種反射-透射式液晶顯示裝置及其 製造方法,該方法中襯墊電極係以透明電極之同一層製成 ,俾提高襯墊可靠度。 【先前技術3 發明背景 10 平面面板裝置中,液晶顯示(LCD)裝置由於又輕又薄 、電力耗散低且可顯示高品質影像,因而廣用於多種電子 裝置。 LCD裝置通常包含透射式、反射式及反射_透射式。 透射式LCD裝置係使用光源(例如背光源)顯示資訊。反射 15式LCD裝置係使用自然光顯示資訊。反射-透射式LCD果置 於需要時例如於無光源的暗室中,係以透射模式操作用以 顯示影像,而於其它時間係以反射模式操作,用以藉反射 入射光顯示影像。 目前薄膜電晶體·液晶顯示裝置(TFT_LCDs)廣為人使 20用。TFT-LCD之結構為二基板各別設置電極,以及薄膜電 晶體(TFT)概略开> 成於基板之一的像素區,TFT用以切換施 加於電極之電壓。 第1A至1C圖為剖面圖顯示習知反射透射式液晶顯示 裝置。第m1C圖中,反射_透射式液晶顯示裝置為具有 5 200402586 玖、發明說明 底閘結構之非晶形矽類型TFT-LCD。第1A圖顯示液晶顯示 裝置之一顯示區,於該處形成薄膜電晶體15。第16圖及第 1C圖分別顯示液晶顯示裝置之閘襯墊區及資料襯墊區。 參照第1A至1C圖,沉積第一金屬層於玻璃、石英或 5 藍寶石等絕緣材料組成之基板10上後,使用第一光罩藉微 影術方法將第一金屬層製作圖案而形成閘佈線。閘佈線包 括一閘線(圖中未顯示)其係於第一方向延伸,一閘極12其 係由閘線分支,以及一閘襯墊丨丨,其係連結至閘線末端用 以施加掃描電壓至閘極12。 10 氮化矽組成之閘絕緣層14係形成於基板1〇上,於其上 形成閘佈線,以及然後,非晶矽層及攙雜非晶矽層循序 形成於閘絕緣層14上。隨後非晶矽層及n+攙雜非晶矽層使 用第二光罩藉微影術方法製作圖案,而形成主動圖案16以 及電阻接觸圖案18。如此,主動圖案16係由非晶矽組成, 15而電阻接觸圖案18係由n+攙雜非晶石夕製成。 沉積第二金屬層於電阻接觸圖案18及閘絕緣層14後, 第一金屬層使用第三光罩經由微影術方法製作圖案而形成 資料佈線。資料佈線包括一資料線(圖中未顯示)其係於垂 直第一方向的第二方向延伸,源極/汲極2〇及22,其係由 2〇貝料線分支,以及一資料襯塾,其係連結至資料線末端用 以施加影像電壓至源極20。 然後部分暴露於源極20與汲極22間之電阻接觸圖案18 經乾蝕刻去除而形成薄膜電晶體之通道區。 於無機被動層25成形於資料佈線及閘絕緣層14後,部 6 200402586 玖、發明說明 分於汲極22上之無機被動層25使用第四光罩藉微影術方法 去除。此處暴露閘襯墊11及資料襯墊19之襯墊接觸孔33及 35同時形成。 於形成有機被動層26於所得結構之全部表面後,有機 5 被動層26於汲極22以及襯墊區部分使用第五光罩,藉曝光 及顯影方法去除,因而形成暴露汲極22之第一接觸孔28。 同時,複數個用以散射光之切槽使用第六光罩成形於有機 被動層26表面。換言之,第一接觸孔28及切槽係使用二光 罩之二次曝光方法但藉一次顯影方法同時形成。 10 沉積銦錫氧化物(ITO)或銦鋅氧化物(IZO)之透明導電 層於所得結構後,透明導電層使用第七光罩藉微影術方法 製作圖案,如此形成一透明電極30,其透過第一接觸孔28 而連結至汲極22。 由例如氮化矽之無機材料製成之緩衝層32形成於所得 15 結構全部表面上(包括透明電極30),然後緩衝層32使用第 八光罩藉微影術方法蝕刻去除,形成部分暴露出汲極22之 第二接觸孔34。 一沉積有高反射率之金屬如鋁-鈥(Al-Nd)製成之反射 層於第二接觸孔34及緩衝層32後,反射層使用第九光罩藉 20 微影術方法製作圖案而形成反射電極36,其係經由第二接 觸孔34連結至汲極22。反射電極36有個反射窗乃暴露出下 方透明電極30。同時製成閘襯墊電極38及資料襯墊電極40 。閘襯墊電極38及資料襯墊電極40分別係連結至閘襯墊11 及資料襯墊19。 7 200402586 玖、發明說明 根據習知方法,反射-透射式非晶矽類型薄膜電晶體_ 液晶顯示裝置係使用九光罩製造。此時氮化石夕製成之緩衝 層32成形於透明電極30與反射電極36間,防止因透明電極 30與反射電極36間之直接接觸產生的電蝕。特別當透明電 5極30為多層像素電極底層時,絕緣層須插置於透明電極3〇 與反射電極36間,俾防止於用以對反射電極%製作圖案之 光阻層顯影期間,反射電極36因透明電極3〇與反射電極% 間之電壓差而剝離。如此因需要額外微影術方法,蝕刻絕 緣層,來形成連結反射電極36至薄膜電晶體之接觸孔,因 10 而製造過程變複雜。 又因緩衝層32係位於有機被動層26上方,故緩衝層% 需藉低溫化學氣相沉積(CVD)方法製成。此外,因襯墊電 極38及40係由反射電極36之同一層製成,故於隨後之玻璃 上晶片(COG)連結過程,金屬可能被腐蝕。 15 於有透明電極作為底電極之像素電極中,緩衝層係使 用有機金屬替代使用氮化矽製成,來防止金屬的腐蝕以及 反射電極的剝離。但因至少需要一個光罩來對緩衝層製作 圖案,因而此種方法複雜。此外,因有機緩衝層係位於有 機被動層上方,故反射電極之反射率降低,緩衝層難以製 2〇作圖案。此外,因襯墊電極及反射電極係由同一層製成, 故於隨後COG連結過程,金屬被腐蝕。 第2A至2C圖為剖面圖顯示另一種習知反射_透射式液 晶顯示裝置。第2A至2C圖中,反射·透射式液晶顯示裝置 之結構為,透明電極直接接觸反射電極。第2A圖顯示液晶 200402586 玖、發明說明 顯示裝置之顯示區,於該顯示區形成薄膜電晶體55。第2b 圖及第2C圖分別顯示液晶顯示裝置之閘襯墊區及資料概塾 區。 參照第2A至第2C圖,沉積卜金屬層於基板%(玻璃 5等絕緣材料製成)上後,第一金屬層係使用第一光罩藉微 影術方法製作圖案而形成閘佈線。閘佈線包括於第一方向 延伸之閘線(圖中未顯示),由閘線分支之閘極52,以及連 結至閘線末端用以施加掃描電壓至閘極52之閘襯墊Η。 氮化矽製成之閘絕緣層5 4成形於基板5 〇 (其上形成閘 10佈線)上,然後非晶矽層及n+攙雜非晶矽層循序成形於閘絕 緣層54上。隨後非晶矽層及n+攙雜非晶矽層使用第二光罩 藉微影術方法製作圖案而形成非晶矽製成之主動圖案%、 以及n+攙雜非晶矽製成之電阻接觸圖案58。 沉積第二金屬層於電阻接觸圖案58及閘絕緣層54後, 15第二金屬層係經由使用第三光罩藉微影術方法製作圖案而 形成資料佈線。資料佈線包括於垂直第一方向之第二方向 延伸的資料線(圖中未顯示),由資料線分支之源極/汲極6〇 及62 ’以及連結至資料線末端用以施加影像電壓至源極6〇 之資料襯墊。隨後,電阻接觸圖案58之暴露於源極60與汲 20 極62間之部分經乾蝕刻去除而形成薄膜電晶體之通道區。 於形成無機被動層65於資料佈線及閘絕緣層54上後, 無機被動層6 5之於閘極6 2上方部分使用第四光罩藉微影術 方法去除。此處用以暴露閘極襯墊51與資料襯墊59之襯塾 接觸孔69及71同時製成。於形成有機被動層66於所得結構 200402586 玖、發明說明 之全部表面後,有機被動層66使用第五光罩及第六光罩藉 曝光及顯影方法製作圖案,如此同時形成暴露汲極62之接 觸孔68及複數個切槽。 於沉積具有高反射率金屬如銘-歛(Al-Nd)製成之反射 5層於所得結構後,反射層使用第七光罩藉微影術方法製作 圖案而形成反射電極70、閘襯墊電極74及資料襯墊電極76 。反射電極70係經由接觸孔68連結至汲極62。閘襯墊電極 74及資料襯墊電極76分別係經由接觸孔69及71連結至閘襯 墊51及資料襯墊59。 10 隨後於沉積IZO製成之透明導電層於反射電極70後, 透明導電層使用第八光罩藉微影術方法製作圖案而形成透 明電極72 ’其直接接觸反射電極7〇。此處有透明電極72而 不具有反射電極70之區域形成透射窗丁2。 根據前述方法,因透明電極72係直接接觸反射電極70 15 ,而不含緩衝層,故比較第1圖之習知方法,製造過程可 免除一個光罩。又因透明電極72需設置為頂層,故不會發 生反射電極70的剝離。但反射電極7〇與透明電極72間通常 會出現電蝕。此外當透明電極72由ιζο製成時,因ΙΖ0與 紹#刻劑或鉻蝕刻劑反應,故透明電極72及反射電極7〇不 20會同時製作圖案。此外,透明電極72須位於頂電極,俾直 接接觸反射電極70及透明電極72。 L發明内容3 發明概要 本發明解決前述問題,如此本發明之一目的係提供一 10 200402586 玖、發明說明 種液晶顯示裝置’其中透明電極係直接接觸反射電極俾簡 化製程,且襯墊電極係由透明電極之透明導電層製成俾提 升襯墊可靠度。 本發明之另一目的係提供一種製造液晶顯示裝置之方 5法,其中透明電極係直接接觸反射電極俾簡化製程,且概 墊電極係由透明電極之透明導電層製成俾提升襯墊可靠度 〇 為了達成本發明之一目的,提供一種液晶顯示裝置, 其包含一基板,該基板有一顯示區於其上形成像素、以及 10 一襯墊區其係位於該顯示區周邊,該顯示區有一透明電極 ,該襯墊區有一襯墊電極,透明電極及襯墊電極係由同一 層製成,以及一反射電極其係成形於透明電極上,且有一 個暴露透明電極之一部分之透射窗。 根據本發明之較佳具體實施例,形狀係與反射電極完 15全相同之阻擋金屬層係成形於透明電極與反射電極間。 阻擋層係由一種材料製成,該材料之蝕刻速率實質係 等於反射電極之餘刻速率。像素包括非晶石夕類型薄膜電晶 體。像素包括非晶石夕類型薄膜電晶體。透明電極包含銦锡 氧化物(ITO),反射電極包含鋁-鈦(A1_Nd)以及阻擔金屬層 20 圖案包含鉬-鹤(Mo_W)。 此外為了達成本發明之一目的,也提供一種液晶顯示 裝置’其包含一基板,該基板有一顯示區以及一位於顯示 區周邊之襯墊區;一薄膜電晶體(TFT)形成於基板顯示區 上,TFT包括一閘極、第一及第二電極以及一主動圖案; 200402586 玖、發明說明 一被動層形成於TFT及基板上,被動層有一孔暴露第二電 極;一透明電極其係形成於被動層顯示區上;一襯墊電極 其係形成於被動層襯墊區上,襯墊電極係由透明電極之同 一層製成;一反射電極形成於透明電極上,且有一個透射 ®暴4透明電極之一部分;以及一阻擋金屬層圖案形成於 透明電極與反射電極間,其形狀係與反射電極形狀相同。 根據本發明之一特色,透明電極係形成於該孔及被動 層上,因而經由該孔連結至第二電極。 根據本發明之第二特色,透明電極只形成於被動層上 1〇 (孔除外),阻擋金屬層圖案及反射電極係形成於孔及透明 電極上,因而經由孔連結至第二電極。 根據本發明之又另一特色,阻擋金屬層圖案及反射電 極只形成於透明電極上,孔除外。 為了達成本發明之另一目的,提供一種製造液晶顯示 15裝置之方法,該方法包括下列步驟:形成一透明導電層於 一基板上’該基板有一顯示區以及一於顯示區周邊之襯塾 區;形成一反射層於具有透明導電層之基板上;反射層退 火以防反射層剝離;以及反射層製作圖案而形成反射電極 〇 20 根據本發明之一具體實施例,進行氬(A〇電漿處理俾 增強透明導電層與下層間之黏著。該方法進一步包括下述 步驟··於形成反射層之步驟前,將透明導電層製作圖案而 形成一透明電極於顯示區上以及一襯墊電極於襯墊區上。 該方法進一步包括下列步驟:於將透明導電層製作圖案步* 200402586 玖、發明說明 驟前,退火透明導電層用以獲得透明導電層之圖案均勻度 ;以及硬烤乾透明導電層用以提高透明導電層之黏著性。 · 該方法進一步包括下述步驟:於形成反射電極後,將 · 透明導電層製作圖案而形成一透明電極於顯示區上、以及 · 5 一襯墊電極於襯墊區上。反射電極、透明電極及襯墊電極 係使用一個光罩製成。該光罩為半調光罩或狹縫光罩。反 射層之退火步驟係於高於約1〇〇°C之溫度進行多於約3〇分 鐘時間。 該方法進一步包括於形成反射層之步驟前,形成阻擔 10金屬層之步驟。當反射層製作圖案時,阻擋金屬層同時被 製作圖案而形成阻擋金屬層圖案。 透明導電層、阻擋金屬層、及反射層係於約2(rc至約 150°C溫度製成。阻擋金屬層包含之材料具有類似反射層 蝕刻速率之蝕刻速率。透明導電層包含銦錫氧化物(Ιτ〇) 15 ,阻擋金屬層包含鉬-鎢(Mo-W),以及反射層包含鋁-鈦 (Al-Nd) 〇 根據本發明之一具體實施例,提供一種製造液晶顯示 裝置之方法,該方法包括下列步驟:形成一閘極於基板顯 不區上’以及一閘襯墊於基板上位於顯示區周邊襯墊區上 20 ;形成一閘絕緣層,因而該閘絕緣層覆蓋閘極及閘襯墊; 开/成主動圖案以及一電阻接觸圖案於該閘絕緣層上;形 成一第一電極以及一第二電極於電阻接觸圖案上,且同時 形成一資料襯墊於襯墊區之閘絕緣層上;形成一被動層於 第一及第二電極、資料襯墊及閘絕緣層上;蝕刻被動層俾 13 200402586 玖、發明說明 形成第-、第二及第三接觸孔其係分別用以暴露第二電極 閘襯墊及資料襯墊;形成一透明電極於顯示區,且同時形 成-閘襯墊電極以及一資料襯墊電極,分別用以經由第二 及第三接觸孔接觸閘襯塾及資料概塾;循序形成_阻擔金 5屬層及-反射層於透明電極及襯墊電極上;退火反射層用 以防止反射層之剝離;以及將反射層及阻擋金屬層製作圖 案而形成一阻擋金屬層圖案及一反射電極。 根據本發明之另一具體實施例提供_種製造液晶顯示 裝置之方法,該方法包括下列步驟:形成一主動圖案於一 10基板上;形成一閘絕緣層於帶有主動圖案之基板上;形成 1極於閘絕緣層之形成主動圖案位置;循序形成第一及 第二層間介電層於閘極及閘絕緣層上;韻刻第一及第二層 間介電層及閘絕緣層,俾形成接觸孔用以分別暴露主動圖 案之第一及第二區;形成第一及第二電極,其係經由接觸 15孔分別連結至第一及第二區;形成一被動層於第一及第二 電極上以及具有該第一及第二電極之第二層間介電層上; 關被動層形成一通孔用以暴露第二電# ;形成一透明電 極於被動層上,循序形成一阻擋金屬層及一反射層於透明 電極上,退火该反射層用以防止反射層的剝離;以及將反 2〇射層及阻擔金屬層製作圖案,俾形成阻擔金屬層及反射電 極於透明電極上。 根據本發明,一種液晶顯示裝置之多層像素電極有一 種結構,其中該透明電極係形成為下層,且透明電極直接 接觸反射層。較佳為了防止透明電極與反射電極間產生電200402586 发明 Description of the invention (The description of the invention should state: the technical field to which the invention belongs, the prior art, the content, the embodiments, and the drawings are briefly explained. A display device and a manufacturing method thereof are particularly related to a reflection-transmission liquid crystal display device and a manufacturing method thereof. In this method, a pad electrode is made of the same layer of a transparent electrode, thereby improving the reliability of the pad. [Prior Art 3 Background of the Invention 10] In flat panel devices, liquid crystal display (LCD) devices are widely used in a variety of electronic devices because they are light and thin, have low power consumption, and can display high-quality images. LCD devices generally include transmissive, reflective, and reflective-transmissive. A transmissive LCD device uses a light source (such as a backlight) to display information. The 15-type LCD device uses natural light to display information. Reflective-transmissive LCDs are placed in a dark room without a light source when needed, and operate in transmission mode to display images, and at other times operate in reflective mode to display images by reflecting incident light. At present, thin film transistors and liquid crystal display devices (TFT_LCDs) are widely used. The structure of the TFT-LCD is that electrodes are provided on the two substrates, and a thin film transistor (TFT) is roughly formed in a pixel region on one of the substrates. The TFT is used to switch the voltage applied to the electrodes. 1A to 1C are sectional views showing a conventional reflection-transmission type liquid crystal display device. In the m1C diagram, the reflective-transmissive liquid crystal display device is an amorphous silicon type TFT-LCD with a bottom-gate structure. Fig. 1A shows a display area of a liquid crystal display device, and a thin film transistor 15 is formed there. FIG. 16 and FIG. 1C show the gate pad area and the data pad area of the liquid crystal display device, respectively. Referring to FIGS. 1A to 1C, after depositing a first metal layer on a substrate 10 made of insulating material such as glass, quartz, or 5 sapphire, the first metal layer is patterned by lithography using a first photomask to form a gate wiring. . The gate wiring includes a gate wire (not shown) extending in the first direction, a gate electrode 12 branched from the gate wire, and a gate pad 丨 丨 connected to the end of the gate wire for applying scanning Voltage to gate 12. A gate insulating layer 14 composed of 10 silicon nitride is formed on the substrate 10, a gate wiring is formed thereon, and then an amorphous silicon layer and a doped amorphous silicon layer are sequentially formed on the gate insulating layer 14. Subsequently, the amorphous silicon layer and the n + doped amorphous silicon layer are patterned by lithography using a second photomask to form an active pattern 16 and a resistive contact pattern 18. As such, the active pattern 16 is composed of amorphous silicon, and the resistive contact pattern 18 is made of n + doped amorphous stone. After the second metal layer is deposited on the resistive contact pattern 18 and the gate insulating layer 14, the first metal layer is patterned by a lithography method using a third photomask to form a data wiring. The data wiring includes a data line (not shown in the figure) extending in a second direction perpendicular to the first direction, source / drain 20 and 22, which are branched from a 20-meter material line, and a data lining , Which is connected to the end of the data line for applying an image voltage to the source electrode 20. Then, a portion of the resistive contact pattern 18 exposed between the source electrode 20 and the drain electrode 22 is removed by dry etching to form a channel region of the thin film transistor. After the inorganic passive layer 25 is formed on the data wiring and the gate insulating layer 14, the part 6 200402586 (ii) Description of the invention The inorganic passive layer 25 divided on the drain electrode 22 is removed by a lithography method using a fourth photomask. Here, the pad contact holes 33 and 35 that expose the gate pad 11 and the data pad 19 are formed at the same time. After the organic passive layer 26 is formed on the entire surface of the resulting structure, the organic 5 passive layer 26 uses a fifth mask on the drain electrode 22 and the pad area, and is removed by exposure and development methods, thereby forming the first exposed drain electrode 22 Contact hole 28. At the same time, a plurality of slits for scattering light are formed on the surface of the organic passive layer 26 using a sixth mask. In other words, the first contact hole 28 and the notch are formed simultaneously by a double exposure method using two masks but by a single development method. 10 After depositing a transparent conductive layer of indium tin oxide (ITO) or indium zinc oxide (IZO) on the resulting structure, the transparent conductive layer is patterned by a lithography method using a seventh photomask to form a transparent electrode 30. Connected to the drain electrode 22 through the first contact hole 28. A buffer layer 32 made of an inorganic material such as silicon nitride is formed on the entire surface of the resulting structure 15 (including the transparent electrode 30), and then the buffer layer 32 is removed by lithography using an eighth photomask, and the formed part is exposed. The second contact hole 34 of the drain electrode 22. After depositing a reflective layer made of a highly reflective metal such as aluminum (Al-Nd) on the second contact hole 34 and the buffer layer 32, the reflective layer uses a ninth photomask to make a pattern by 20 lithography. A reflective electrode 36 is formed, which is connected to the drain electrode 22 via the second contact hole 34. The reflective electrode 36 has a reflective window to expose the lower transparent electrode 30. The gate pad electrode 38 and the data pad electrode 40 are made at the same time. The gate pad electrode 38 and the data pad electrode 40 are connected to the gate pad 11 and the data pad 19, respectively. 7 200402586 发明, description of the invention According to a conventional method, a reflective-transmissive amorphous silicon type thin film transistor _ liquid crystal display device is manufactured using a nine-light mask. At this time, the buffer layer 32 made of nitride stone is formed between the transparent electrode 30 and the reflective electrode 36 to prevent electric corrosion caused by the direct contact between the transparent electrode 30 and the reflective electrode 36. Especially when the transparent electrode 5 is the bottom layer of the multilayer pixel electrode, the insulating layer must be interposed between the transparent electrode 30 and the reflective electrode 36 to prevent the reflective electrode from being developed during the development of the photoresist layer used to pattern the reflective electrode. 36 peeled off due to a voltage difference between the transparent electrode 30 and the reflective electrode%. As a result, an additional lithography method is needed to etch the insulating layer to form a contact hole connecting the reflective electrode 36 to the thin film transistor, which complicates the manufacturing process due to 10. Since the buffer layer 32 is located above the organic passive layer 26, the buffer layer% needs to be made by a low temperature chemical vapor deposition (CVD) method. In addition, since the pad electrodes 38 and 40 are made of the same layer of the reflective electrode 36, the metal may be corroded during the subsequent COG bonding process. 15 In a pixel electrode having a transparent electrode as a bottom electrode, the buffer layer is made of organic metal instead of silicon nitride to prevent metal corrosion and peeling of the reflective electrode. However, this method is complicated because at least one photomask is needed to pattern the buffer layer. In addition, since the organic buffer layer is located above the organic passive layer, the reflectance of the reflective electrode is reduced, and it is difficult to pattern the buffer layer. In addition, because the pad electrode and the reflective electrode are made of the same layer, the metal is corroded during the subsequent COG connection process. Figures 2A to 2C are sectional views showing another conventional reflection-transmission liquid crystal display device. In FIGS. 2A to 2C, the reflective and transmissive liquid crystal display device has a structure in which a transparent electrode directly contacts a reflective electrode. Fig. 2A shows a liquid crystal 200402586. Description of the Invention A display area of a display device, and a thin film transistor 55 is formed in the display area. Figures 2b and 2C show the gate pad area and data summary area of the liquid crystal display device, respectively. Referring to FIGS. 2A to 2C, after depositing a metal layer on a substrate (made of an insulating material such as glass 5), the first metal layer is patterned by a photolithography method using a first photomask to form a gate wiring. The gate wiring includes a gate line (not shown) extending in the first direction, a gate electrode 52 branched from the gate line, and a gate pad Η connected to the end of the gate line to apply a scanning voltage to the gate electrode 52. A gate insulating layer 54 made of silicon nitride is formed on the substrate 50 (on which a gate 10 wiring is formed), and then an amorphous silicon layer and an n + doped amorphous silicon layer are sequentially formed on the gate insulating layer 54. Subsequently, the amorphous silicon layer and the n + doped amorphous silicon layer are patterned by lithography to form an active pattern% made of amorphous silicon and a resistive contact pattern 58 made of n + doped amorphous silicon. After the second metal layer is deposited on the resistive contact pattern 58 and the gate insulating layer 54, the second metal layer is formed by using a third photomask to make a pattern by lithography to form a data wiring. The data wiring includes a data line (not shown) extending in a second direction perpendicular to the first direction, and the source / drain electrodes 60 and 62 'branched from the data line and connected to the end of the data line for applying an image voltage to Source pad for source 60. Subsequently, a portion of the resistive contact pattern 58 exposed between the source electrode 60 and the drain electrode 62 is removed by dry etching to form a channel region of the thin film transistor. After the inorganic passive layer 65 is formed on the data wiring and the gate insulating layer 54, the portion of the inorganic passive layer 65 above the gate electrode 62 is removed by a lithography method using a fourth photomask. Here, the contact holes 69 and 71 for exposing the gate pad 51 and the data pad 59 are made at the same time. After forming the organic passive layer 66 on the entire surface of the resulting structure 200402586 (the invention description), the organic passive layer 66 uses the fifth and sixth reticles to make a pattern by exposure and development methods, so as to form the contact of the exposed drain electrode 62 at the same time. The hole 68 and a plurality of notches. After depositing five reflective layers made of a metal with high reflectance such as Al-Nd on the resulting structure, the reflective layer is patterned by lithography using a seventh mask to form reflective electrodes 70 and gate pads. The electrode 74 and the data pad electrode 76. The reflective electrode 70 is connected to the drain electrode 62 via a contact hole 68. The gate pad electrode 74 and the data pad electrode 76 are connected to the gate pad 51 and the data pad 59 via contact holes 69 and 71, respectively. 10 After a transparent conductive layer made of IZO is deposited on the reflective electrode 70, the transparent conductive layer is patterned by lithography using an eighth mask to form a transparent electrode 72 'which directly contacts the reflective electrode 70. The area where the transparent electrode 72 is present without the reflective electrode 70 forms the transmission window 2. According to the foregoing method, since the transparent electrode 72 is directly in contact with the reflective electrode 70 15 without a buffer layer, compared with the conventional method of FIG. 1, a photomask can be eliminated in the manufacturing process. Since the transparent electrode 72 needs to be provided as a top layer, peeling of the reflective electrode 70 does not occur. However, electrical corrosion usually occurs between the reflective electrode 70 and the transparent electrode 72. In addition, when the transparent electrode 72 is made of ιζο, since IZ0 reacts with the etchant or the chromium etchant, the transparent electrode 72 and the reflective electrode 70 will be patterned at the same time. In addition, the transparent electrode 72 must be located on the top electrode, and directly contact the reflective electrode 70 and the transparent electrode 72. L SUMMARY OF THE INVENTION 3 Summary of the Invention The present invention solves the aforementioned problems, so one object of the present invention is to provide a 10 200402586, a description of the invention of a liquid crystal display device in which the transparent electrode system directly contacts the reflective electrode, and the manufacturing process is simplified, and the pad electrode system consists of The transparent conductive layer of the transparent electrode is made of 俾 to improve the reliability of the pad. Another object of the present invention is to provide a method 5 for manufacturing a liquid crystal display device, in which the transparent electrode is directly in contact with the reflective electrode, which simplifies the manufacturing process, and the pad electrode is made of a transparent conductive layer of the transparent electrode, which improves the reliability of the pad. In order to achieve one of the objectives of the present invention, a liquid crystal display device is provided. The liquid crystal display device includes a substrate, the substrate has a display area on which pixels are formed, and a pad area is located around the display area, and the display area is transparent. Electrode, the pad region has a pad electrode, the transparent electrode and the pad electrode are made of the same layer, and a reflective electrode is formed on the transparent electrode, and has a transmission window exposing a part of the transparent electrode. According to a preferred embodiment of the present invention, a barrier metal layer having the same shape as that of the reflective electrode is formed between the transparent electrode and the reflective electrode. The barrier layer is made of a material whose etch rate is substantially equal to the remaining etching rate of the reflective electrode. The pixel includes an amorphous stone type thin film transistor. The pixel includes an amorphous stone type thin film transistor. The transparent electrode includes indium tin oxide (ITO), the reflective electrode includes aluminum-titanium (A1_Nd), and the barrier metal layer 20 The pattern includes molybdenum-crane (Mo_W). In addition, in order to achieve one of the objectives of the present invention, a liquid crystal display device is also provided. The liquid crystal display device includes a substrate having a display area and a pad area located around the display area. A thin film transistor (TFT) is formed on the substrate display area. The TFT includes a gate electrode, first and second electrodes, and an active pattern. 200402586 发明, description of the invention A passive layer is formed on the TFT and the substrate, the passive layer has a hole to expose the second electrode; a transparent electrode is formed on the passive Layer display area; a pad electrode is formed on the passive layer pad area, the pad electrode is made of the same layer as the transparent electrode; a reflective electrode is formed on the transparent electrode, and there is a transmission ®storm 4 transparent A part of the electrode; and a barrier metal layer pattern is formed between the transparent electrode and the reflective electrode, and its shape is the same as the shape of the reflective electrode. According to a feature of the present invention, the transparent electrode is formed on the hole and the passive layer, and thus is connected to the second electrode through the hole. According to a second feature of the present invention, the transparent electrode is formed only on the passive layer 10 (except for the hole), and the barrier metal layer pattern and the reflective electrode are formed on the hole and the transparent electrode, and thus are connected to the second electrode through the hole. According to still another feature of the present invention, the barrier metal layer pattern and the reflective electrode are formed only on the transparent electrode, except for the hole. In order to achieve another object of the present invention, a method for manufacturing a liquid crystal display 15 device is provided. The method includes the following steps: forming a transparent conductive layer on a substrate; the substrate has a display area and a lining area around the display area; Forming a reflective layer on a substrate having a transparent conductive layer; annealing the reflective layer to prevent the reflective layer from peeling off; and patterning the reflective layer to form a reflective electrode. 20 According to a specific embodiment of the present invention, argon (A0 plasma) is performed. Treating 俾 enhances the adhesion between the transparent conductive layer and the lower layer. The method further includes the following steps: before the step of forming the reflective layer, patterning the transparent conductive layer to form a transparent electrode on the display area and a pad electrode on The method further comprises the steps of: patterning the transparent conductive layer in the step of 200402586 (2), and explaining the invention step, annealing the transparent conductive layer to obtain the pattern uniformity of the transparent conductive layer; and baking the transparent conductive layer hard. The layer is used to improve the adhesion of the transparent conductive layer.The method further includes the following steps: Then, the transparent conductive layer is patterned to form a transparent electrode on the display area and a pad electrode on the pad area. The reflective electrode, transparent electrode, and pad electrode are made of a photomask. The photomask is a half-tone photomask or a slit photomask. The annealing step of the reflective layer is performed at a temperature higher than about 100 ° C for more than about 30 minutes. The method further includes before the step of forming the reflective layer The step of forming a barrier metal layer is formed. When the reflective layer is patterned, the barrier metal layer is patterned at the same time to form a barrier metal layer pattern. The transparent conductive layer, the barrier metal layer, and the reflective layer are at about 2 (rc to about Made at 150 ° C. The material included in the barrier metal layer has an etching rate similar to that of the reflective layer. The transparent conductive layer contains indium tin oxide (Ιτ〇) 15, the barrier metal layer contains molybdenum-tungsten (Mo-W), And the reflective layer includes aluminum-titanium (Al-Nd). According to a specific embodiment of the present invention, a method for manufacturing a liquid crystal display device is provided. The method includes the following steps: forming a gate electrode on a display area of a substrate; A gate pad is located on the substrate on the periphery of the display area on the pad area 20; a gate insulating layer is formed, so the gate insulating layer covers the gate electrode and the gate pad; an on / off active pattern and a resistive contact pattern are insulated on the gate Layer; forming a first electrode and a second electrode on the resistive contact pattern, and simultaneously forming a data pad on the gate insulating layer of the pad area; forming a passive layer on the first and second electrodes and the data pad On the pad and the gate insulation layer; etch the passive layer 俾 13 200402586 玖, description of the invention to form the first, second and third contact holes which are used to expose the second electrode gate pad and the data pad respectively; forming a transparent electrode on The display area, and-a gate pad electrode and a data pad electrode are formed at the same time, which are used to contact the gate pad and the data through the second and third contact holes, respectively. Layer on the transparent electrode and the pad electrode; annealing the reflective layer to prevent the peeling of the reflective layer; and patterning the reflective layer and the barrier metal layer to form a barrier metal layer pattern and a reflective electrode. According to another embodiment of the present invention, a method for manufacturing a liquid crystal display device is provided. The method includes the following steps: forming an active pattern on a 10 substrate; forming a gate insulating layer on the substrate with the active pattern; forming 1 pole forms the active pattern position on the gate insulating layer; sequentially forms the first and second interlayer dielectric layers on the gate and the gate insulating layer; engraved the first and second interlayer dielectric layers and the gate insulating layer, forming The contact holes are used to expose the first and second regions of the active pattern, respectively; forming the first and second electrodes, which are connected to the first and second regions respectively through the contact 15 holes; forming a passive layer on the first and second regions On the electrode and on the second interlayer dielectric layer having the first and second electrodes; forming a through hole for the passive layer to expose the second electrical layer; forming a transparent electrode on the passive layer, and sequentially forming a barrier metal layer and A reflective layer is on the transparent electrode, and the reflective layer is annealed to prevent the peeling of the reflective layer; and a pattern of the reflective 20 layer and the barrier metal layer is patterned to form the barrier metal layer and the reflective electrode on the transparent electrode.According to the present invention, a multilayer pixel electrode of a liquid crystal display device has a structure in which the transparent electrode system is formed as a lower layer, and the transparent electrode directly contacts the reflective layer. It is preferable to prevent electricity from being generated between the transparent electrode and the reflective electrode.
14 200402586 玖、發明說明 刻速率同反射電極蝕刻速率之阻擋金屬層圖案係插 置於透明電極與反射電極間。因此經由比較習知方法,( 胃&方法中緩衝層形成於透明電極與反射電極間)減少至 少一個光罩,因而簡化製造過程。此外,因利用半調光罩 5或狹縫光罩時,像素電極係使用一個光罩形成,故可進一 步簡化製造過程。 此外’於沉積反射層後,反射層之退火係於約2〇〇t: 溫度進行約1至約2小時,因而防止帶有透明電極作為底層 之像素電極中反射電極的剝離。 10 此外’襯墊電極係由透明電極(導電氧化物層組成)之 同一層製成,故COG連結方法期間不會發生金屬腐蝕,因 而可提高襯塾之可靠度。 圖式簡單說明 前述及其它本發明之目的及優點經由參照後文詳細說 15明連同附圖一起考慮將顯然自明,附圖中: 第1A至1C圖為剖面圖顯示習知反射-透射式液晶顯示 裝置; 第2A至2C圖為剖面圖顯示另一習知反射-透射式液晶 顯示裝置; 20 第3A至3C圖為剖面圖顯示根據本發明之第一具體實 施例之反射-透射式液晶顯示裝置; 第4A至10C圖為剖面圖說明根據本發明之第一具體實 施例,製造反射-透射式液晶顯不裝置之方法; 弟11圖為剖面圖顯示根據本發明之第二具體實施例之 15 200402586 玖、發明說明 反射-透射式液晶顯示裝置; 第12圖為剖面圖顯示根據本發明之第三具體實施例之 反射-透射式液晶顯示裝置; 第13圖為剖面圖顯示根據本發明之第四具體實施例之 5 反射-透射式液晶顯示裝置; 第14A至14G圖為剖面圖說明根據本發明之第四具體 實施例,製造反射-透射式液晶顯示裝置之方法; 苐15圖為剖面圖顯示根據本發明之第五具體實施例之 反射-透射式液晶顯示裝置;以及 10 苐16圖為剖面圖顯示根據本發明之第六具體實施例之 反射-透射式液晶顯示裝置。 L貧:方式3 較佳實施例之詳細說明 後文將參照附圖說明根據本發明之較佳具體實施例之 15 液晶顯示裝置及製造液晶顯示裝置之方法。 具體實施例1 第3A至3C圖為剖面圖顯示根據本發明之第一具體實 施例之反射-透射式液晶顯示裝置。第3A至3C圖之液晶顯 示裝置包括一個具有底閘結構之非晶矽類型薄膜電晶體。 20 第3A圖顯示顯示區,於該處形成薄膜電晶體。第3B及3C 圖分別顯示閘槪塾區及資料槪塾區。 參照第3A至3C圖,第一金屬層如鉻(Cr)或鋁-鈥(A1-Nd)製成之閘佈線形成於玻璃、石英或藍寶石製成之絕緣 基板100。閘佈線包括於第一方向延伸之閘線(圖中未顯示) 16 200402586 玖、發明說明 ,由閘線分支之薄膜電晶體150之閘極102,以及連結至閘 線末端,用以施加掃描電壓至閘極1〇2之閘襯墊1〇4。 閘絕緣層106係形成於閘佈線及基板1〇〇上。閘絕緣層 106包含無機材料如氮化碎。 5 主動圖案及電阻接觸圖案11〇循序形成於閘絕緣層 106上,於閘極1〇2之所在。主動圖案1〇8包含非晶矽,電 阻接觸圖案110包含n+攙雜非晶矽。 此外,第二金屬層如鉻(Cr)或鋁(A1)製成之資料佈線 形成於閘絕緣層106上。資料佈線包括於垂直第一方向的 10 第二方向延伸之資料線(圖中未顯示),第一及第二電極in 及114,以及連結至資料線末端用以施加影像電壓至第一 電極112之資料襯墊115。第一電極ιΐ2(源極及汲極)係由資 料線分支,且疊置於主動圖案1〇8之第一區。第二電極 114(汲極或源極)疊置於第二區,第二區係與第一區相對。 15 後文中,第二電極112稱作為「源極」以及第二電極114稱 作為「汲極」。 如此於基板100之顯示區上,形成薄膜電晶體15〇,包 含閘極102、閘絕緣層1〇6、主動圖案1〇8、電阻接觸圖案 110、源極112及沒極114。 20 包含氮化矽之無機被動層116以及包含丙烯酸系樹脂 之有機被動層120循序形成於資料佈線及閘絕緣層1〇6上。 設置無機被動層116,俾維持電晶體及襯墊之可靠度,且 提升COG連結強度。有機被動層12〇較佳係形成於顯示區 17 200402586 玖、發明說明 第一接觸孔122係經由無機被動層116及有機被動層 120开y成於汲極114上方。另一電極例如像素電極可形成於 無機被動層116上,俾經由第一接觸孔122接觸且連結汲極 114。 5 此外,第二接觸孔118及第三接觸孔119係經由無機被 動層116及閘絕緣層1〇6而形成於閘襯墊1〇4及資料襯墊u5 上方。然後形成閘襯墊電極125及資料襯墊電極126,因而 刀別經由第二接觸孔118及第三接觸孔丨19直接接觸閘襯墊 104及資料襯墊115。 10 像素電極係由堆疊結構製成’其中透明電極124及反 射電極130係位於閘線與資料線所界定之像素區。透明電 極124包含導電氧化物如銦錫氧化物(ITO),反射電極130 包含反射金屬如紹•歛(Al-Nd)。像素電極接收來自薄膜電 晶體150之影像信號,俾使用濾色鏡基板電極(圖中未顯示) 15產生電場。此種情況下,反射電極130位於透明電極124上 方區域係作為反射窗,以及只有透明電極124所在區域係 作為透射窗T3。 根據本發明之一具體實施例,阻擋金屬層圖案128進 一步成形於透明電極124與反射電極130間,俾防止形成電 20 #。阻擋金屬層圖案128包含一種金屬,該金屬就用以蝕 刻反射電極130之預定蝕刻劑而言,具有類似反射電極丨3〇 之韻刻速率之蝕刻速率。較佳阻擋金屬層圖案128包含鉬_ 嫣(Mo-W),經製作圖案,而具有形狀類似反射電極13〇之 圖案。 18 200402586 玖、發明說明 根據習知方法,其中緩衝層係由氮化矽製成,或有機 材料係形成於透明電極與反射電極間,該種情況下,若透 明電極係位於反射電極下方,則需額外微影術處理來蝕刻 緩衝層,形成連結反射電極至汲極之接觸孔。如此製造過 5 程較為複雜。較佳根據本發明之具體實施例,包含金屬之 阻擔金屬層圖案128係成形於透明電極124與反射電極13〇 間’讓透明電極124電連結於反射電極130。如此因可刪除 形成連結反射電極13 〇至沒極114之接觸孔之製程,因而比 習知方法可減少至少一次微影術製程。 1〇 此外,根據本具體實施例,閘襯墊電極125及資料襯 墊電極126係由透明電極124之同一層製成。習知方法中, 襯墊電極係由金屬製成之反射電極之同一層製成,故當 LCD面板之襯塾電極藉由COG方法連結至外部驅動器積體 電路(ICs)時,產生金屬腐蝕,因而劣化襯墊可靠度。 15 但本具體實施例中,於COG連結期間,因襯墊電極 125及126係由包含導電氧化物之透明電極124之同一層製 成,故襯墊電極125及126不會腐蝕,俾提升襯墊可靠度。 第4A至10C圖為剖面圖,舉例說明根據本發明之第_ 具體實施例,製造反射-透射式液晶顯示裝置之方法。第 20 4A、5A、6A、7A、8A、9A及10A圖顯示形成薄膜電晶體 之該顯示區。第4B、5B、6B、7B、8B、9B及10B圖顯示 閘襯墊區以及第4C、5C、6C、7C、8C、9C及10C圖顯示 資料襯墊區。 參照第4A至4C圖,於沉積第一層於包含絕緣材料(如 19 200402586 玖、發明說明 玻璃、石英或陶竟)之基板刚後,使用第一光罩藉微影術 方法將第-金屬層製作圖案而形成間佈線。第一金屬層包 括厚約500埃之鉻(Cr)以及厚約25〇〇埃之鋁_鈥(Ai-Nd)。閘 佈線包括於第一方向延伸之閘線(圖中未顯示),由閘線分 5支之閘極102,以及連結至閘線末端用以施加掃描電壓給 閘極102之閘襯墊。此時,閘極1〇2侧壁較佳有錐形侧繪。 參照第5A至5C圖,氮化矽藉電漿加強之化學氣相沉 積(PECVD)方法沉積於基板100(其上方形成閘佈線)之全部 表面上至約4500埃厚度,藉此形成閘絕緣層1〇6。 1〇 主動層如非晶矽層藉PECVD方法沉積於閘絕緣層1〇6 上至約2000埃厚度,然後電阻接觸層如^攙雜非晶矽層係 藉PECVD方法沉積於主動層上至約5〇〇埃厚度。其次,主 動層及電阻接觸層係使用第二光罩藉微影術方法製作圖案 ,俾分別形成主動圖案108及電阻接觸圖案11〇。主動圖案 15 108留在閘絕緣層106之閘極1〇2所在位置。 參照第6A至6C圖,沉積第二金屬層於電阻接觸圖案 110及閘絕緣層106上至約1500至約4000埃厚度後,第二金 屬層係使用第三光罩藉微影術方法製作圖案而形成資料佈 線。弟一金屬層包含鉻(Cr)、鉻-銘(Cr-Al)或鉻-銘-鉻(Cr_ 20 Al-Cr)。資料佈線包括於垂直第一方向之第二方向延伸之 資料線(圖中未顯示),由資料線分支之源極/汲極丨12及114 ,以及連結至資料線末端用以施加影像電壓至源極112之 資料襯墊115。 隨後,暴露於源極112與汲極114間之電阻接觸圖案 200402586 玖、發明說明 110藉反應性離子蝕刻(RIE)方法去除,讓暴露於源極112與 汲極114間之主動區作為薄膜電晶體15〇之通道區。此時, 閘絕緣層106插置於閘線與資料線間,藉此防止閘線與資 料線彼此接觸。 5 本具體實施例中,主動圖案108、電阻接觸圖案11〇及 二貝料佈線係使用二光罩製成。但主動圖案丨〇8、電阻接觸 圖案110及源極/汲極112/114可使用如韓國專利申請案第 1998-49710號所述之單一光罩製成,因而減少製造具有底 閘結構之薄膜電晶體-液晶顯示裝置之光罩數目。此種薄 10膜電晶體-液晶顯示裝置之製造方法於後文將使用與本具 體實施例相同之相關文件參考編號說明。 首先,主動層、電阻接觸層及第二金屬層循序沉積於 閘絕緣層106上。光阻層塗覆於第二金屬層上後,光阻層 藉曝光與顯影方法製作圖案而形成光阻圖案(圖中未顯示) 15 ,該光阻圖案包括第一部分、第二部分及第三部分。第一 部分具有第一厚度且係形成於薄膜電晶體之通道區上。第 二部分具有大於第一部分之厚度之第二厚度,且係形成於 形成負料佈線區。第三部分為未留下光阻層區域。 然後,第三部分下方之第二金屬層、電阻接觸層及主 20動層、第一部分下方之第二金屬層、以及第二部分之部分 厚度被蝕刻去除而同時形成第二金屬層組成之資料佈線、 n+非晶矽層組成之電阻接觸圖案11〇、及非晶矽層組成之 主動圖案108。其次,去除其餘光阻圖案。如此,主動圖 案108、電阻接觸圖案110及源極/汲極112/114係同時使用 21 200402586 玖、發明說明 單一光罩製成。 曰參照第7Am氮㈣沉積於基板之形成薄膜電 晶體150時之全部表面上,至約2〇〇〇埃厚度,藉此形成無 機被動層116。無機被動層116可提升電晶體15〇及概塾⑽ 5及115之可靠度。此外,無機被動層116加強隨後c〇g連結 期間積體電路的連結強度。 隨後,無機被動層116及閘絕緣層106係使用第四光罩 精微影術方法蝕刻去除,藉此形成供暴露汲極ιΐ4之第四 接觸孔117、供暴露閘襯墊104之第二接觸孔118、以及供 10 暴露資料襯墊115之第三接觸孔119。 參照第8A至8C圖,具有低介電常數之感光有機材料 塗覆於所得結構包括第四、第二及第三接觸孔117_119之 全部表面上,至大於2微米厚度,因而形成有機被動層12〇 。因有機被動層120可防止資料佈線與(欲形成之)像素電極 15間形成寄生電容,故可形成像素電極,疊置閘線及資料線 ’藉此形成有高孔隙效率之薄膜電晶體·液晶顯示裝置。 於具有圖案對應第一接觸孔122之第五光罩(圖中未顯 示)設置於有機被動層120上方而形成貫穿有機被動層12〇 之第一接觸孔122,有機被動層12〇與汲極114上方部分以 20 及有機被動層120與閘襯墊104及資料襯墊115上方部分主 要係藉全曝光法曝光。其次形成微透鏡之第六光罩(圖中 未顯示)設置於有機被動層120上方,然後有機被動層12〇 之第一接觸孔122旁侧部分藉透鏡曝光處理二次曝光。 隨後使用包括四甲基氫氧化銨(TMAH)之溶液進行顯 200402586 玖、發明說明 衫處理因而形成第一接觸孔122以及多個切槽123。第一接 觸孔122係由第四接觸孔117延伸因而暴露汲極114。此例 中,閘襯墊104及資料襯墊115上方之有機被動層12〇被部 分去除。 5 然後於約130至230溫度進行硬化處理約1〇〇分鐘而 再流動且硬化有機被動層120。 參照第9A至9C圖,對有機被動層120進行氬氣(Ar)電 漿處理,俾提高有機被動層120與將形成於其上之透明導 電層間之黏著性。其次導電材料如IT〇製成之透明導電層 1〇於低於約200°C溫度沉積於所得結構之全部表面上。較佳 透明導電層係於約20至約150°C溫度沉積且具有厚度約4〇〇 埃。隨後,透明導電層於約l〇(TC退火大於3〇分鐘且較佳 於200 C退火約1至約2小時,俾提升透明導電層製作圖案 之均勻一致性。 15 然後於局於12 0 C溫度對透明導電層進行硬烤乾處理 經歷大於30分鐘時間,俾提高透明導電層與(將於隨後微 影術方法形成之)感光層圖案間之黏著性,透明導電層係 使用第七光罩,藉微影術及濕蝕刻方法製作圖案而形成透 明電極124。透明電極124係經由第一接觸孔122連結至汲 20 極114。同時,形成閘襯墊電極125及資料襯墊電極126。 閘襯墊電極125係經由第二接觸孔118連結至閘襯墊1〇4, 資料襯墊電極126係經由第三接觸孔119連結至資料襯墊 115 〇14 200402586 发明. Description of the invention The barrier metal layer pattern with the etch rate and the reflection electrode etching rate is interposed between the transparent electrode and the reflective electrode. Therefore, by comparing the conventional methods (the buffer layer is formed between the transparent electrode and the reflective electrode in the gastric method), at least one photomask is reduced, thereby simplifying the manufacturing process. In addition, since the pixel electrode is formed using a single photomask when the half photomask 5 or the slit photomask is used, the manufacturing process can be further simplified. In addition, after the reflective layer is deposited, the annealing of the reflective layer is performed at about 2000 t: temperature for about 1 to about 2 hours, thereby preventing peeling of the reflective electrode in a pixel electrode with a transparent electrode as a bottom layer. 10 In addition, the 'pad electrode is made of the same layer of a transparent electrode (conducting oxide layer), so metal corrosion does not occur during the COG connection method, so the reliability of the liner can be improved. The drawings briefly explain the foregoing and other objects and advantages of the present invention by referring to the following 15 details in detail with reference to the drawings, which will be self-explanatory. In the drawings: Figures 1A to 1C are cross-sectional views showing conventional reflection-transmissive liquid crystals. Display device; FIGS. 2A to 2C are sectional views showing another conventional reflective-transmissive liquid crystal display device; 20 FIGS. 3A to 3C are sectional views showing a reflective-transmissive liquid crystal display according to a first embodiment of the present invention 4A to 10C are sectional views illustrating a method for manufacturing a reflection-transmission liquid crystal display device according to a first embodiment of the present invention; FIG. 11 is a sectional view showing a second embodiment according to the present invention 15 200402586 (1) Description of the invention A reflection-transmission type liquid crystal display device; FIG. 12 is a sectional view showing a reflection-transmission type liquid crystal display device according to a third embodiment of the present invention; FIG. 13 is a sectional view showing a reflection-transmission type liquid crystal display device according to the present invention The fifth embodiment of the fourth embodiment is a reflection-transmission type liquid crystal display device. FIGS. 14A to 14G are cross-sectional views illustrating the production of a reflection-transmission method according to a fourth embodiment of the present invention.液晶 15 is a sectional view showing a reflection-transmission type liquid crystal display device according to a fifth embodiment of the present invention; and 10 1016 is a sectional view showing a sixth embodiment according to the present invention Reflection-transmission liquid crystal display device. L-poor: Detailed description of the preferred embodiment of Mode 3 Hereinafter, a liquid crystal display device and a method for manufacturing the same according to a preferred embodiment of the present invention will be described with reference to the accompanying drawings. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Figs. 3A to 3C are sectional views showing a reflection-transmission type liquid crystal display device according to a first embodiment of the present invention. The liquid crystal display device of FIGS. 3A to 3C includes an amorphous silicon type thin film transistor having a bottom gate structure. 20 Figure 3A shows the display area where a thin film transistor is formed. Figures 3B and 3C show the gate and data areas, respectively. Referring to FIGS. 3A to 3C, a first metal layer such as a gate wiring made of chromium (Cr) or aluminum (A1-Nd) is formed on an insulating substrate 100 made of glass, quartz, or sapphire. The gate wiring includes a gate line (not shown in the figure) extending in the first direction. 16 200402586 发明, description of the invention, the gate 102 of the thin film transistor 150 branched from the gate line, and the gate line connected to the end of the gate line for applying a scanning voltage Gate pad 104 to gate 102. The gate insulating layer 106 is formed on the gate wiring and the substrate 100. The gate insulating layer 106 contains an inorganic material such as nitride. 5 The active pattern and the resistive contact pattern 110 are sequentially formed on the gate insulating layer 106, where the gate electrode 102 is located. The active pattern 108 includes amorphous silicon, and the resistive contact pattern 110 includes n + doped amorphous silicon. In addition, a data wiring made of a second metal layer such as chromium (Cr) or aluminum (A1) is formed on the gate insulating layer 106. The data wiring includes data lines (not shown in the figure) extending in 10 second directions perpendicular to the first direction, first and second electrodes in and 114, and ends connected to the data lines for applying an image voltage to the first electrode 112. The information pad 115. The first electrode ιΐ2 (source and drain) is branched from the data line and is stacked on the first region of the active pattern 108. The second electrode 114 (drain or source) is stacked on the second region, and the second region is opposite to the first region. 15 Hereinafter, the second electrode 112 is referred to as a "source" and the second electrode 114 is referred to as a "drain". In this way, a thin film transistor 150 is formed on the display area of the substrate 100, and includes the gate electrode 102, the gate insulating layer 106, the active pattern 108, the resistance contact pattern 110, the source electrode 112, and the electrode 114. 20 An inorganic passive layer 116 including silicon nitride and an organic passive layer 120 including an acrylic resin are sequentially formed on the data wiring and the gate insulating layer 106. The inorganic passive layer 116 is provided to maintain the reliability of the transistor and the pad and improve the strength of the COG connection. The organic passive layer 120 is preferably formed in the display area 17 200402586. Description of the invention The first contact hole 122 is formed above the drain electrode 114 through the inorganic passive layer 116 and the organic passive layer 120. Another electrode, such as a pixel electrode, may be formed on the inorganic passive layer 116, and may contact and connect the drain electrode 114 through the first contact hole 122. 5 In addition, the second contact hole 118 and the third contact hole 119 are formed over the gate pad 104 and the data pad u5 via the inorganic passive layer 116 and the gate insulating layer 106. Then, the gate pad electrode 125 and the data pad electrode 126 are formed, so that the knife directly contacts the gate pad 104 and the data pad 115 through the second contact hole 118 and the third contact hole 19. 10 The pixel electrode is made of a stacked structure. The transparent electrode 124 and the reflective electrode 130 are located in a pixel area defined by a gate line and a data line. The transparent electrode 124 includes a conductive oxide such as indium tin oxide (ITO), and the reflective electrode 130 includes a reflective metal such as Al-Nd. The pixel electrode receives the image signal from the thin film transistor 150, and uses a color filter substrate electrode (not shown in the figure) 15 to generate an electric field. In this case, the area above the transparent electrode 124 serves as a reflection window, and only the area where the transparent electrode 124 is located serves as a transmission window T3. According to a specific embodiment of the present invention, the blocking metal layer pattern 128 is further formed between the transparent electrode 124 and the reflective electrode 130 to prevent the formation of electrical 20 #. The barrier metal layer pattern 128 includes a metal having an etching rate similar to that of the reflective electrode 30 as far as a predetermined etchant for etching the reflective electrode 130 is concerned. The preferred blocking metal layer pattern 128 includes molybdenum (Mo-W), which is patterned and has a pattern similar to the shape of the reflective electrode 130. 18 200402586 发明 Description of the invention According to the conventional method, wherein the buffer layer is made of silicon nitride, or an organic material is formed between the transparent electrode and the reflective electrode. In this case, if the transparent electrode system is located below the reflective electrode, then Additional lithography is required to etch the buffer layer to form a contact hole connecting the reflective electrode to the drain electrode. The manufacturing process is more complicated. Preferably, according to a specific embodiment of the present invention, the barrier metal layer pattern 128 including a metal is formed between the transparent electrode 124 and the reflective electrode 130, and the transparent electrode 124 is electrically connected to the reflective electrode 130. In this way, the process of forming the contact holes connecting the reflective electrode 130 to the electrode 114 can be deleted, so that the lithography process can be reduced at least once compared to the conventional method. 10 In addition, according to this embodiment, the gate pad electrode 125 and the data pad electrode 126 are made of the same layer of the transparent electrode 124. In the conventional method, the pad electrode is made of the same layer of the reflective electrode made of metal, so when the pad electrode of the LCD panel is connected to external driver integrated circuits (ICs) by the COG method, metal corrosion occurs. As a result, the reliability of the gasket is deteriorated. 15 However, in this specific embodiment, during the COG connection, since the pad electrodes 125 and 126 are made of the same layer of the transparent electrode 124 including a conductive oxide, the pad electrodes 125 and 126 will not corrode, and the pad electrode is improved. Pad reliability. 4A to 10C are cross-sectional views illustrating a method of manufacturing a reflection-transmission type liquid crystal display device according to the _ specific embodiment of the present invention. Figures 20 4A, 5A, 6A, 7A, 8A, 9A and 10A show the display area where the thin film transistor is formed. Figures 4B, 5B, 6B, 7B, 8B, 9B, and 10B show the brake pad area and Figures 4C, 5C, 6C, 7C, 8C, 9C, and 10C show the data pad area. Referring to Figures 4A to 4C, after depositing the first layer on a substrate containing an insulating material (such as 19 200402586 玖, invention description glass, quartz, or ceramics), use the first photomask to photolithography the first metal Layers are patterned to form inter-wiring. The first metal layer includes chromium (Cr) with a thickness of about 500 Angstroms and aluminum (Ai-Nd) with a thickness of about 2500 Angstroms. The gate wiring includes a gate line (not shown) extending in the first direction, a gate 102 divided by five gate lines, and a gate pad connected to the end of the gate line to apply a scanning voltage to the gate 102. At this time, the side wall of the gate electrode 102 is preferably tapered. Referring to FIGS. 5A to 5C, silicon nitride is deposited on the entire surface of the substrate 100 (the gate wiring is formed thereon) by a plasma-enhanced chemical vapor deposition (PECVD) method to form a gate insulating layer. 1〇6. 10 An active layer such as an amorphous silicon layer is deposited on the gate insulating layer 106 by a PECVD method to a thickness of about 2000 angstroms, and then a resistive contact layer such as a doped amorphous silicon layer is deposited on the active layer by a PECVD method to about 5 〇〇angstrom thickness. Secondly, the active layer and the resistive contact layer are patterned by a lithography method using a second photomask to form the active pattern 108 and the resistive contact pattern 11 respectively. The active pattern 15 108 remains at the position of the gate electrode 102 of the gate insulation layer 106. Referring to FIGS. 6A to 6C, after depositing a second metal layer on the resistive contact pattern 110 and the gate insulation layer 106 to a thickness of about 1500 to about 4000 angstroms, the second metal layer is patterned by a lithography method using a third mask. The data wiring is formed. The first metal layer includes chromium (Cr), chromium-Cr (Al-Cr), or chromium-Cr (Al-Cr). The data wiring includes a data line (not shown) extending in a second direction perpendicular to the first direction, source / drain branches 12 and 114 branched from the data line, and a connection to the end of the data line for applying an image voltage to Data pad 115 of source 112. Subsequently, the resistive contact pattern 200402586 exposed between the source 112 and the drain 114 was removed by the reactive ion etching (RIE) method, and the active region exposed between the source 112 and the drain 114 was used as a thin film electrode. Channel area of crystal 15o. At this time, the gate insulation layer 106 is interposed between the gate line and the data line, thereby preventing the gate line and the data line from contacting each other. 5 In this embodiment, the active pattern 108, the resistive contact pattern 110, and the two-material wiring are made using two photomasks. However, the active pattern 丨 〇8, the resistance contact pattern 110, and the source / drain 112/114 can be made using a single photomask as described in Korean Patent Application No. 1998-49710, thereby reducing the production of a thin film with a bottom gate structure. Transistor-number of photomasks for liquid crystal display devices. The manufacturing method of such a thin-film transistor-liquid crystal display device will be described later using the same reference numbers of related documents as those of the specific embodiment. First, an active layer, a resistive contact layer, and a second metal layer are sequentially deposited on the gate insulating layer 106. After the photoresist layer is coated on the second metal layer, the photoresist layer is patterned by exposure and development methods to form a photoresist pattern (not shown) 15. The photoresist pattern includes a first part, a second part, and a third part. section. The first portion has a first thickness and is formed on a channel region of the thin film transistor. The second portion has a second thickness greater than the thickness of the first portion and is formed in the negative wiring area. The third part is the area where no photoresist layer is left. Then, the second metal layer under the third part, the resistive contact layer and the main 20 movable layer, the second metal layer under the first part, and a part of the thickness of the second part are etched away to form the second metal layer composition information at the same time. Wiring, a resistive contact pattern 110 composed of an n + amorphous silicon layer, and an active pattern 108 composed of an amorphous silicon layer. Second, remove the remaining photoresist patterns. In this way, the active pattern 108, the resistive contact pattern 110, and the source / drain 112/114 are simultaneously used. 21 200402586 发明 Description of the invention A single photomask is used. That is, referring to the 7Am nitrogen thallium is deposited on the entire surface of the substrate when the thin film transistor 150 is formed to a thickness of about 2000 angstroms, thereby forming the inorganic passive layer 116. The inorganic passive layer 116 can improve the reliability of the transistors 150 and 5 and 115. In addition, the inorganic passive layer 116 strengthens the connection strength of the integrated circuit during the subsequent cog connection. Subsequently, the inorganic passive layer 116 and the gate insulating layer 106 are etched and removed using a fourth photolithography method, thereby forming a fourth contact hole 117 for exposing the drain electrode 4 and a second contact hole for exposing the gate pad 104. 118, and a third contact hole 119 for 10 exposing the data pad 115. Referring to FIGS. 8A to 8C, a photosensitive organic material having a low dielectric constant is coated on the entire surface of the resulting structure including the fourth, second, and third contact holes 117_119 to a thickness greater than 2 micrometers, thereby forming an organic passive layer 12 〇. Since the organic passive layer 120 can prevent parasitic capacitance from being formed between the data wiring and the pixel electrode 15 (to be formed), the pixel electrode can be formed, and the gate line and the data line can be stacked to form a thin film transistor and liquid crystal with high pore efficiency. Display device. A fifth photomask (not shown) having a pattern corresponding to the first contact hole 122 is disposed above the organic passive layer 120 to form a first contact hole 122 penetrating the organic passive layer 120, the organic passive layer 12 and the drain electrode. The upper part of 114, 20 and the organic passive layer 120, and the upper part of the gate pad 104 and the data pad 115 are mainly exposed by the full exposure method. A sixth photomask (not shown) forming a microlens is disposed above the organic passive layer 120, and then a portion of the side of the first contact hole 122 of the organic passive layer 120 is subjected to a second exposure by lens exposure processing. Subsequently, a solution including tetramethylammonium hydroxide (TMAH) was used to perform the display 200402586, and the invention was processed to form a first contact hole 122 and a plurality of slits 123. The first contact hole 122 extends from the fourth contact hole 117 to expose the drain electrode 114. In this example, the organic passive layer 120 above the gate pad 104 and the data pad 115 is partially removed. 5 Then, a hardening treatment is performed at a temperature of about 130 to 230 for about 100 minutes, and then the organic passive layer 120 is reflowed and hardened. Referring to FIGS. 9A to 9C, an argon (Ar) plasma treatment is performed on the organic passive layer 120 to improve the adhesion between the organic passive layer 120 and a transparent conductive layer to be formed thereon. Secondly, a transparent conductive layer 10 made of a conductive material such as IT0 is deposited on the entire surface of the resulting structure at a temperature below about 200 ° C. Preferably, the transparent conductive layer is deposited at a temperature of about 20 to about 150 ° C and has a thickness of about 400 Angstroms. Subsequently, the transparent conductive layer is annealed at about 10 ° C. for more than 30 minutes and preferably at 200 C for about 1 to about 2 hours, thereby improving the uniformity of the pattern of the transparent conductive layer. 15 Then at 12 0 C The transparent conductive layer is subjected to a hard baking process at a temperature of more than 30 minutes to increase the adhesion between the transparent conductive layer and the photosensitive layer pattern (which will be formed by the subsequent lithography method). The seventh layer is used for the transparent conductive layer. The transparent electrode 124 is formed by patterning by lithography and wet etching. The transparent electrode 124 is connected to the drain electrode 114 through the first contact hole 122. At the same time, a gate pad electrode 125 and a data pad electrode 126 are formed. The pad electrode 125 is connected to the gate pad 104 via a second contact hole 118, and the data pad electrode 126 is connected to the data pad 115 via a third contact hole 119.
參照第10A至10C圖,阻擔金屬層係於約20至約150°C 23 200402586 玖、發明說明 且較佳約50。(:溫度沉積於所得結構(包括透明電極124及襯 塾電極125及126)之全部表面上至厚約500埃。阻擋金屬層 包含金屬如鉬-鎢(Mo-W),對蝕刻組成反射電極之反射層 之餘刻劑,具有蝕刻速率類似反射電極之蝕刻速率。 5 然後於阻擋層上,鋁-鈥(Al-Nd)組成之反射層於約20 至約150°C較佳约50°C溫度形成至約1500埃厚度。其次反 射層於高於l〇〇°C溫度退火大於約3〇分鐘,較佳於約2〇〇 溫度退火大於1小時,俾防止反射層於隨後之顯影過程被 剝離。然後反射層及阻擋金屬層使用第八光罩透過微影術 10及濕姓刻方法製作圖案,因而形成反射電極13 0及阻擔金 屬層圖案128。 若多層像素電極使用透明電極作為下電極,則當感光 層使用TMAH顯影溶液顯影用以將反射層製作圖案時,反 射層易因包含氧化物之透明電極與反射層間之電位差而被 15剝離。如此反射層沉積後,反射層於約2〇(rc溫度退火約置 至約2小時,讓因透明電極之氧化物造成之電位差減少, 防止反射層被剝離。 具體實施例2 第11圖為剖面圖顯示根據本發明之第二具體實施例之 20反射-透射式液晶顯示裝置。 參照第11圖,根據第二具體實施例之反射_透射式液 晶顯示裝置係同第一具體實施例之液晶顯示裝置,但有一 項除外。第二具體實施例與第一具體實施例間之差異為透 明電極124係形成於被動層12〇之上(第一接觸孔122除外), ,ν ,ύ 24 200402586 玖、發明說明 阻擋金屬層圖案128及反射電極130係形成於第一接觸孔 122及透明電極124上,因而經由第一接觸孔122直接接觸 薄膜電晶體150之汲極114。 當包括汲極114之資料佈線係由含鉻(Cr)之金屬薄膜製 5 成時,薄氧化鉻膜生長於金屬膜表面上。氧化鉻膜易藉 ITO#刻劑去除。如此當第一接觸孔122上之透明電極124 係It濕姓刻方法去除時,形成於沒極114表面上之氧化鉻 膜同時被去除。此種情況下,阻擋金屬層圖案128及反射 層130直接接觸汲極114,因而增強薄膜電晶體與像素電極 1〇 間之接觸特性。 此時,因透明電極124係透過阻擋金屬層圖案128直接 連結至反射電極13〇,故信號通常由薄膜電晶體傳輸至像 素電極。 具體實施例3 15 第12圖為剖面圖顯示根據本發明之第三具體實施例之 反射-透射式液晶顯示裝置。 參照第12圖,第三具體實施例之反射_透射式液晶顯 不裝置係同第一具體實施例,但有一項除外。第三具體實 施例與第一具體實施例間之差異為阻擋金屬層圖案128及 20反射電極130只形成於透明電極124上,第一接觸孔122除 外。 此時’因反射電極13〇係透過阻擋金屬層圖案128直接 連結至透明電極124,故信號通常由薄膜電晶體傳輸至像 素電極。 200402586 玖、發明說明 具體實施例4 第13圖為剖面圖顯示根據本發明之第四具體實施例之 反射-透射式液晶顯示裝置。第13圖之液晶顯示裝置包括 有頂閘結構之非晶矽薄膜電晶體。第13圖顯示像素區,於 像素區形成N-型薄膜電晶體(TFT);以及驅動器區,於驅 動器區形成N-型TFT及P-型TFT。 ίο 參照第13圖,氧化物如矽氧化物製成之封阻層202形 成於玻璃、石英或藍寶石之絕緣基板202上。非晶矽組成 之主動圖案204形成於封阻層202上。氧化矽製成之閘絕緣 層206形成於主動圖案204及封阻層202上。 N-型TFT閘極208係形成於閘絕緣層206之像素區上。 主動圖案204重疊閘極208之相交部分變成N-型TFT之通道 區212C。主動圖案204藉通道區212C被分成兩部分。主動 圖案204之一部分變成源區212S,另一部分變成212D。 15 它方面,主動圖案204之一部分為汲極212D,主動圖 案204之另一部分為源區212S。此外,電容器下電極209係 由閘絕緣層206像素區上,閘極208之同一層製成。 20 於驅動器區之閘絕緣層206上,形成一閘極212其界定 N-型TFT之源區213S、汲極213D、及通道區213C,以及形 成一閘極211,其界定P-型TFT之源區214S、汲極214D及 通道區214C。此種情況下,N-型TFT之源極/汲極可由輕度 攙雜之汲極(LDD)結構製成俾提高電晶體可靠度。參考編 號212L及213L表示LDD區。 第一層間介電層216及第二層間介電層218循序形成於 26 X J1 200402586 玖、發明說明 閘極208、210及211、電容器下電極209及閘絕緣層206上 。第一層間介電層216係由氧化矽製成’第二層間介電層 218係由氮化物如氮化矽製成。 於電容器之下電極209上方,暴露第一層間介電層216 5 之開口 220係經由第二層間介電層218形成。此外,接觸孔 222係經由第一層間介電層216、第二層間介電層218、以 及像素區之源區/ >及區212S及212D上方之閘絕緣層206,以 及驅動器區之源區/汲區213S、213D、214S及214D上方之 閘絕緣層206形成。 10 源極224及汲極225形成於第二層間介電層218上,因 而分別經由接觸孔222連結至像素區之源區及沒區212S及 212D。此外,源極226及汲極227係形成於第二層間介電層 218上’因而經由接觸孔222分別連結至N-型TFT於驅動琴 區之源區及沒區213S及213D。此外,源極228及汲極229係 15形成於第二層間介電層218上,因而分別經由接觸孔222連 結至P-型TFT於驅動器區之源區及汲區214S及214D。 像素區之汲極225也形成於開口 220 ,俾疊置電容器之 下電極209,因此疊置部分提供作為電容器之上電極。如 此位於電容器下電極2 〇 9上方之第一層間介電層2丨6係作為 20 電容器之介電層。 於習知液晶顯示裝置,n+攙雜矽製成之緩衝層額外形 外,閘絕緣層用作為電容器之介電層 閘極之同一層製成。但本發明中,因 成於主動圖案下方,然後緩衝層作為電容器之下電極。此 ,電容器上電極係由 下電極209係由閘極 Λ 4 / 27 200402586 玖、發明說明 208之同一層製成,汲極225用作為電容器之上電極,故無 需額外沉積與蝕刻方法用以製成電容器之下電極。因此製 造方法簡化。 感光有機材料製成之被動層2 3 0形成於源極及汲極2 2 4 5 、225、226、227、228及229以及第二層間介電層218上。 像素電極形成於被動層230上,透過形成於被動層230於像 素區汲極225上方之通孔232而連結至汲極225。Referring to FIGS. 10A to 10C, the barrier metal layer is at about 20 to about 150 ° C 23 200402586 玖, description of the invention, and preferably about 50. (: The temperature is deposited on the entire surface of the obtained structure (including the transparent electrode 124 and the lining electrodes 125 and 126) to a thickness of about 500 angstroms. The barrier metal layer contains a metal such as molybdenum-tungsten (Mo-W), and forms a reflective electrode for etching After the reflective layer, the etching layer has an etching rate similar to that of the reflective electrode. 5 Then, on the barrier layer, the reflective layer composed of aluminum (Al-Nd) is at about 20 to about 150 ° C, preferably about 50 ° C temperature is formed to a thickness of about 1500 angstroms. Second, the reflective layer is annealed at a temperature higher than 100 ° C for more than about 30 minutes, and preferably annealed at a temperature of about 200 for more than 1 hour. It is peeled off. Then, the reflective layer and the barrier metal layer are patterned using the eighth photomask through lithography 10 and the wet engraving method, thereby forming the reflective electrode 130 and the barrier metal layer pattern 128. If the multilayer pixel electrode uses a transparent electrode as the For the lower electrode, when the photosensitive layer is developed with TMAH developing solution to pattern the reflective layer, the reflective layer is easily peeled off by the potential difference between the transparent electrode containing the oxide and the reflective layer. After the reflective layer is deposited, the reflection The layer is annealed at about 20 ° C for about 2 hours to reduce the potential difference caused by the oxide of the transparent electrode and prevent the reflective layer from being peeled off. Specific Embodiment 2 FIG. 11 is a cross-sectional view showing a first layer according to the present invention. 20 reflection-transmission type liquid crystal display device of the second embodiment. Referring to FIG. 11, the reflection-transmission type liquid crystal display device according to the second embodiment is the same as the liquid crystal display device of the first embodiment, except for one item. The difference between the second embodiment and the first embodiment is that the transparent electrode 124 is formed on the passive layer 120 (except for the first contact hole 122), ν, ύ 24 200402586 发明, description of the barrier metal layer pattern 128 and the reflective electrode 130 are formed on the first contact hole 122 and the transparent electrode 124, so the drain 114 of the thin film transistor 150 is directly contacted through the first contact hole 122. When the data wiring including the drain 114 is made of chromium ( When Cr) is made of a metal thin film, a thin chromium oxide film grows on the surface of the metal film. The chromium oxide film can be easily removed with ITO # etchant. Thus, when the transparent electrode 124 on the first contact hole 122 is its wet name When the method is removed, the chromium oxide film formed on the surface of the electrode 114 is removed at the same time. In this case, the blocking metal layer pattern 128 and the reflective layer 130 directly contact the drain electrode 114, thereby enhancing the space between the thin film transistor and the pixel electrode 10. At this time, since the transparent electrode 124 is directly connected to the reflective electrode 13 through the barrier metal layer pattern 128, the signal is usually transmitted from the thin film transistor to the pixel electrode. Specific Example 3 15 The 12th figure is a cross-sectional view A reflection-transmission type liquid crystal display device according to a third embodiment of the present invention. Referring to FIG. 12, the reflection-transmission type liquid crystal display device of the third embodiment is the same as the first embodiment, except for one item. The difference between the third embodiment and the first embodiment is that the barrier metal layer patterns 128 and 20 and the reflective electrode 130 are formed only on the transparent electrode 124, except for the first contact hole 122. At this time, since the reflective electrode 13 is directly connected to the transparent electrode 124 through the barrier metal layer pattern 128, the signal is usually transmitted from the thin film transistor to the pixel electrode. 200402586 (ii) Description of the invention Embodiment 4 Fig. 13 is a sectional view showing a reflection-transmission type liquid crystal display device according to a fourth embodiment of the present invention. The liquid crystal display device of FIG. 13 includes an amorphous silicon thin film transistor having a top-gate structure. FIG. 13 shows a pixel region in which an N-type thin film transistor (TFT) is formed in the pixel region; and a driver region in which an N-type TFT and a P-type TFT are formed. Referring to FIG. 13, a blocking layer 202 made of an oxide such as silicon oxide is formed on an insulating substrate 202 of glass, quartz, or sapphire. An active pattern 204 composed of amorphous silicon is formed on the blocking layer 202. A gate insulating layer 206 made of silicon oxide is formed on the active pattern 204 and the blocking layer 202. The N-type TFT gate 208 is formed on the pixel region of the gate insulating layer 206. The intersection of the active pattern 204 overlapping the gate 208 becomes the channel region 212C of the N-type TFT. The active pattern 204 is divided into two parts by the channel region 212C. One part of the active pattern 204 becomes the source region 212S, and the other part becomes 212D. In other respects, one part of the active pattern 204 is a drain electrode 212D, and another part of the active pattern 204 is a source region 212S. In addition, the capacitor lower electrode 209 is made of the same layer of the gate electrode 208 on the pixel region of the gate insulating layer 206. 20 On the gate insulating layer 206 in the driver region, a gate 212 is formed, which defines a source region 213S, a drain 213D, and a channel region 213C of the N-type TFT, and a gate 211, which defines the P-type TFT, is formed. The source region 214S, the drain electrode 214D, and the channel region 214C. In this case, the source / drain of the N-type TFT can be made of a slightly doped drain (LDD) structure to improve the reliability of the transistor. Reference numbers 212L and 213L indicate the LDD area. The first interlayer dielectric layer 216 and the second interlayer dielectric layer 218 are sequentially formed on 26 X J1 200402586 (2), the description of the invention, the gate electrodes 208, 210, and 211, the capacitor lower electrode 209, and the gate insulation layer 206. The first interlayer dielectric layer 216 is made of silicon oxide 'and the second interlayer dielectric layer 218 is made of nitride such as silicon nitride. Above the capacitor lower electrode 209, the opening 220 exposing the first interlayer dielectric layer 216 5 is formed through the second interlayer dielectric layer 218. In addition, the contact hole 222 passes through the first interlayer dielectric layer 216, the second interlayer dielectric layer 218, and the source region / > of the pixel region and the gate insulating layer 206 above the regions 212S and 212D, and the source of the driver region. The gate / layer regions 213S, 213D, 214S, and 214D are formed with a gate insulating layer 206. The source electrode 224 and the drain electrode 225 are formed on the second interlayer dielectric layer 218, and thus are connected to the source region and the non-region 212S and 212D of the pixel region through the contact hole 222, respectively. In addition, the source electrode 226 and the drain electrode 227 are formed on the second interlayer dielectric layer 218 ', and thus are connected to the source region and the non-region 213S and 213D of the N-type TFT driving region through the contact hole 222, respectively. In addition, the source electrode 228 and the drain electrode 229 are formed on the second interlayer dielectric layer 218, and thus are connected to the source region and the drain regions 214S and 214D of the P-type TFT in the driver region through the contact hole 222, respectively. The drain electrode 225 of the pixel region is also formed in the opening 220, and the lower electrode 209 of the capacitor is stacked, so that the stacked portion is provided as the upper electrode of the capacitor. Thus, the first interlayer dielectric layer 2 and 6 located above the capacitor lower electrode 209 is used as the dielectric layer of the capacitor. In the conventional liquid crystal display device, a buffer layer made of n + doped silicon is extra shape, and the gate insulating layer is made of the same layer as the dielectric layer of the capacitor. However, in the present invention, it is caused under the active pattern, and then the buffer layer serves as the lower electrode of the capacitor. Therefore, the upper electrode of the capacitor is made of the lower electrode 209 and the gate Λ 4/27 200402586 玖, the same layer as the invention description 208, and the drain electrode 225 is used as the upper electrode of the capacitor, so no additional deposition and etching methods are needed to make Become the electrode below the capacitor. Therefore, the manufacturing method is simplified. A passive layer 2 30 made of a photosensitive organic material is formed on the source and drain electrodes 2 2 4 5, 225, 226, 227, 228, and 229 and the second interlayer dielectric layer 218. The pixel electrode is formed on the passive layer 230 and is connected to the drain electrode 225 through a through hole 232 formed on the passive layer 230 above the pixel region drain electrode 225.
像素電極包括透明電極234及反射電極238。透明電極 234包含導電氧化物如ITO,反射電極238由金屬如鋁-鈥 10 (Al-Nd)製成。阻擋金屬層圖案236形成於透明電極234與 反射電極238間,俾防止透明電極234與反射電極238間產 生電蝕。阻擋金屬層圖案236包含一種金屬,該金屬就用 以蝕刻反射電極238之預定蝕刻劑而言,具有蝕刻速率等 於反射電極23 8之蝕刻速率。較佳阻擋金屬層圖案236包含 15 鉬-鎢(Mo-W),製作圖案而具有形狀同反射電極238形狀。The pixel electrode includes a transparent electrode 234 and a reflective electrode 238. The transparent electrode 234 contains a conductive oxide such as ITO, and the reflective electrode 238 is made of a metal such as aluminum (Al-Nd). The barrier metal layer pattern 236 is formed between the transparent electrode 234 and the reflective electrode 238, and prevents electric corrosion between the transparent electrode 234 and the reflective electrode 238. The barrier metal layer pattern 236 includes a metal having an etching rate equal to the etching rate of the reflective electrode 238 for a predetermined etchant used to etch the reflective electrode 238. Preferably, the barrier metal layer pattern 236 includes 15 molybdenum-tungsten (Mo-W), and is patterned to have a shape similar to that of the reflective electrode 238.
如前述,因阻擋金屬層圖案236係形成於透明電極234 與反射電極238間,透明電極234電連結至反射電極238, 可免除用以形成連結反射電極238至汲極225之接觸孔之該 蝕刻方法步驟。因而簡化製造過程。 20 第14A至14G圖為剖面圖說明根據本發明之第四具體 實施例,製造反射-透射式液晶顯示裝置之方法。 參照第14A圖,氧化矽藉PECVD方法沉積於玻璃、石 英或藍寶石製成之基板200上至約2000埃厚度,藉此形成 封阻層。封阻層202可跳過,但較佳係形成封阻層202,以 28 200402586 玖、發明說明 防於隨後非晶矽結晶過程中,基板200之雜質經由封阻層 202滲透入非晶矽層。 於藉低壓化學氣相沉積(LPCVD)方法或PECVD方法, 沉積厚約500埃之非晶矽層(圖中未顯示)於封阻層202後, 5 非晶矽層藉雷射退火或烤爐退火而被結晶化成為多晶矽層 。然後多晶矽層使用第一光罩藉微影術方法製作圖案形成 為主動圖案204。As described above, since the barrier metal layer pattern 236 is formed between the transparent electrode 234 and the reflective electrode 238, the transparent electrode 234 is electrically connected to the reflective electrode 238, and the etching for forming a contact hole connecting the reflective electrode 238 to the drain electrode 225 can be eliminated. Method steps. This simplifies the manufacturing process. 20 Figures 14A to 14G are sectional views illustrating a method of manufacturing a reflection-transmission type liquid crystal display device according to a fourth embodiment of the present invention. Referring to FIG. 14A, silicon oxide is deposited on a substrate 200 made of glass, quartz, or sapphire by a PECVD method to a thickness of about 2000 angstroms, thereby forming a blocking layer. The blocking layer 202 can be skipped, but it is preferable to form the blocking layer 202. 28 200402586 发明, description of the invention to prevent the impurities of the substrate 200 from penetrating into the amorphous silicon layer through the blocking layer 202 during the subsequent amorphous silicon crystallization process. . After the low-pressure chemical vapor deposition (LPCVD) method or the PECVD method, an amorphous silicon layer (not shown) having a thickness of about 500 angstroms is deposited on the blocking layer 202, and then the amorphous silicon layer is subjected to laser annealing or an oven. Annealed and crystallized into a polycrystalline silicon layer. Then, the polycrystalline silicon layer is patterned into an active pattern 204 by a lithography method using a first photomask.
參照第14B圖,氧化矽藉PECVD方法沉積於主動圖案 204及封阻層202上至約1000埃厚度,因而形成閘絕緣層 10 206 。Referring to FIG. 14B, silicon oxide is deposited on the active pattern 204 and the blocking layer 202 by a PECVD method to a thickness of about 1000 angstroms, thereby forming a gate insulating layer 10 206.
鋁-鈥(Al-Nd)組成之閘極沉積於閘絕緣層206上至約 2500埃厚度後,P-型TFT於驅動器區部分開啟,然後暴露 之閘極使用第二光罩藉微影術方法蝕刻,因而形成於驅動 器區之P-型TFT閘極211。隨後,P+雜質藉離子植入法植入 15 ,因而形成P-型TFT之源區214S及汲區214D於驅動器區。 離子植入過程中,P+雜質未植入閘極211,因而界定主動 圖案204之通道區214C。After the gate of Al-Nd is deposited on the gate insulating layer 206 to a thickness of about 2500 angstroms, the P-type TFT is partially turned on in the driver region, and then the exposed gate is lithographically processed by a second photomask. It is etched by the method, and thus a P-type TFT gate 211 is formed in the driver region. Subsequently, the P + impurity is implanted 15 by ion implantation, thereby forming a source region 214S and a drain region 214D of the P-type TFT in the driver region. During the ion implantation process, the P + impurity is not implanted into the gate electrode 211, thereby defining a channel region 214C of the active pattern 204.
於使用第三光罩藉微影術方法開啟N-型TFTs於像素區 及驅動器區部分後,暴露閘層經蝕刻而形成電容器之下電 20 極209以及N-型TFTs之閘極208及210。然後藉離子植入法 植入N+雜質,因而形成N_型TFT之源區2128及汲極212D於 像素區,以及N-型TFT之源區2138及汲極213D於驅動器區 。離子植入過程中,N+雜質未植入閘極208及210,因而界 定通道區212C及213C於主動圖案204。此種情況下,LDD 29 Λύ Μ 200402586 玖、發明說明 質於N-型TFTs而形成, 區212L及213L係藉離子植入N-雜 俾完成帶有LDD結構之電晶體。After the third photomask is used to turn on the N-type TFTs in the pixel area and the driver area by the lithography method, the exposed gate layer is etched to form the under-capacitance 209 and N-type TFTs gates 208 and 210 . Then, N + impurities are implanted by ion implantation, thereby forming a source region 2128 and a drain 212D of the N-type TFT in the pixel region, and a source region 2138 and the drain 213D of the N-type TFT in the driver region. During the ion implantation, N + impurities are not implanted in the gates 208 and 210, and thus the channel regions 212C and 213C are defined in the active pattern 204. In this case, LDD 29 Λύ Μ 200402586 (invention description) is formed by N-type TFTs, and regions 212L and 213L are formed by ion implantation of N-heterofluoride to complete the transistor with LDD structure.
參照第14C圖,進行雷射退火或烤爐退火俾激發於源 區及没區之攙雜離子,且硬化受損石夕層。然後包含氧化石夕 5之第-層間介電層216形成於所得結構全部表面上至約 1000埃厚度。形成包含氮化♦之第二層間介電層218於第 一層間介電層上至約4000埃厚度後,第二層間介電層218 使用第四光罩藉微影術方法蝕刻,因而形成開口 22〇,暴 露出電容器下電極209上方之第一層間介電層216。 0 參照第14D圖,第二層間介電層218、第一層間介電層 216、及閘絕緣層206係使用第五光罩藉微影術方法循序姓 刻,因而形成暴露像素區及驅動器區之源極及汲區之接觸 孔 222。 於包含鉬-鎢(Mo-W)之資料層形成於開口 220、接觸孔 15 222、及第二層間介電層218上至約3000埃厚度後,資料層Referring to FIG. 14C, laser annealing or oven annealing is performed to excite dopant ions in the source region and the no-zone region, and harden the damaged stone layer. A first-interlayer dielectric layer 216 containing oxidized stone 5 is then formed on the entire surface of the resulting structure to a thickness of about 1000 angstroms. After the second interlayer dielectric layer 218 including nitride is formed on the first interlayer dielectric layer to a thickness of about 4000 Angstroms, the second interlayer dielectric layer 218 is etched by a lithography method using a fourth photomask, thereby forming The opening 22o exposes the first interlayer dielectric layer 216 above the capacitor lower electrode 209. 0 Referring to FIG. 14D, the second interlayer dielectric layer 218, the first interlayer dielectric layer 216, and the gate insulating layer 206 are sequentially carved using a fifth photolithography method by lithography, thereby forming exposed pixel areas and drivers. The source of the region and the contact hole 222 of the drain region. After the data layer containing molybdenum-tungsten (Mo-W) is formed on the opening 220, the contact hole 15 222, and the second interlayer dielectric layer 218 to a thickness of about 3000 Angstroms, the data layer
使用第六光罩藉微影術方法因而形成像素區之源極224及 汲極225、N-型TFT之源極226及汲極227於驅動器區、以 及P-型TFT之源極228及汲極229於驅動器區。源極及汲極 224、 225、226、227、228及229分別係經由接觸孔222而 20 連結至源區及汲區。此時,像素區之汲極225也形成於開 口 220俾疊置電容器下電極209,因而設置疊置部分作為電 容器上電極。 參照第14E圖,感光有機薄膜塗覆於源極及汲極224、 225、 226、227、228及229以及第二層間介電層218上至約 30 ό:)ΰ 200402586 玖、發明說明 3微米厚度,藉此形成被動層230。 為了形成貫穿被動層230之通孔232,於對應通孔232 之第七光罩(圖中未顯示)設置於被動層230上後,被動層 230於像素區汲極225上方部分使用第七光罩初步藉全曝光 5 法曝光。隨後於形成微透鏡之第八光罩(圖中未顯示)置於 被動層230上方後,部分被動層230(通孔區除外)使用第八 光罩藉透鏡曝光法二次曝光。然後使用含TMAH溶液進行 顯影處理,藉此形成通孔232及複數個切槽233。像素區之 汲極225經通孔232曝光。然後於約130°C至約230°C溫度進 10 行硬化處理約100分鐘俾再流動且硬化被動層230。 參照第14F圖,對被動層230進行氬電漿處理,俾提高 有機被動層230與欲形成於其上之透明導電層間之黏著。 導電材料(如ITO)製成之透明導電層於低於200°C且較佳約 20至約150°C溫度形成於通孔232及被動層230上至約450埃 15 厚度。隨後透明導電層於高於100°C溫度退火大於30分鐘 ,且較佳於200°C退火約1至約2小時,俾提升透明導電層 製作圖案之均勻一致性。 然後對透明導電層於高於120°C溫度進行硬烤乾處理 經歷大於約30分鐘,俾提高透明導電層與(將於隨後微影 20 術方法形成於其上之)感光層圖案間之黏著性,透明導電 層係使用第九光罩藉微影術及濕蝕刻方法製作圖案而形成 透明電極234。透明電極234經由通孔232連結至像素區之 汲極225。 參照第14G圖,阻擋金屬層形成於含透明電極234之所 31 200402586 玖、發明說明 得結構全部表面上。阻擔金屬層係由金屬例如鉑-鹤(Mo-W)製成,該金屬就蝕刻後來形成之反射層之預定蝕刻劑而 言,具有蝕刻速率類似反射電極之蝕刻速率。厚約500埃 之阻擋金屬層係於約20至約150°C且較佳於約50°C溫度製 5 成。隨後包含鋁-鈥(Al-Nd)之反射層於約20至約150°C且較 佳約50°C溫度於阻擋金屬層上形成至約2000埃厚度。然後 反射層於高於100。(:溫度退火大於約30分鐘,且較佳於約 200°C退火1小時,俾防止反射層於隨後顯影過程剝離。隨 後’反射層及有機阻擋層使用第十光罩藉攝影及濕蝕刻方 10 法製作圖案,因而形成反射電極238及金屬阻擋層圖案236 。反射電極238直接接觸透明電極234。 具體實施例5 弟15圖為剖面圖顯示根據本發明之第五具體實施例之 反射-透射式液晶顯示裝置。 15 參照第15圖,根據第五具體實施例之反射-透射式液 晶顯示裝置係同第四具體實施例,但只有一項除外。第五 具體實施例與第四具體實施例間之差異為透明電極234係 形成於被動層230上(通孔232除外),阻擋金屬層圖案236及 反射電極238係形成於通孔232及透明電極234上,因而經 20由通孔232直接接觸薄膜電晶體之汲極225。 具體貫施例6 第16圖為剖面圖顯示根據本發明之第六具體實施例之 反射-透射式液晶顯示裝置。 參照第16圖,根據第六具體實施例之反射-透射式液 32 200402586 玫、發明說明 晶顯示裝置係同第四具體實施例,但只有一項除外。第六 具體實施例與第四具體實施例間之差異為阻擋金屬層圖案 236及反射電極238只形成於透明電極234之上,通孔232除 外。 5 前述具體實施例中,透明電極及反射電極係使用二光 罩製作圖案。較佳透明電極及反射電極根據本發明之第七 具體實施例,係使用單一光罩製作圖案。 例如於進行氬電漿處理俾提高有機被動層與透明導電 層間之黏著性後,透明導電層、阻擋金屬層及反射層係於 10低於約2〇〇°C溫度循序形成於所得結構上。此種情況下, 透明導電層係由ITO製成,金屬阻擋層及反射層分別係由 Mo_W及Al_Nd製成。然後於高於約度進行退火處 理約1小時,俾防止反射層於隨後顯影過程剝離後,感光 層塗覆於反射層上。其次感光層使用半調光罩或狹縫光罩 15曝光及顯影,因而形成於透射窗及反射窗具有不同厚度之 感光層圖案。 於反射層及阻擋金屬層使用感光層圖案作為蝕刻光罩 蝕刻後,感光層圖案藉灰化法或乾蝕刻法被部分去除而有 預定厚度。透射窗及反射窗係於透明導電層被蝕刻時同時 20形成,較佳係經由使用感光層圖案其餘部分作為蝕刻光罩 製成。透明電極所在位置實質上重合透射窗,而反射電極 係經由反射窗暴露。 因此透明電極、襯墊電極、阻擋金屬層圖案及反射電 極係根據本發明之第七具體實施例使用一光罩製成,藉此 200402586 玫、發明說明 減少光罩數目。 根據本發明,於帶有透明電極作為下層之多層像素電 極中’透明電極直接接觸反射電極。較佳為了防止透明電 極與反射電極間產生電蝕,阻擋金屬層圖案係插置於透明 5電極與反射電極間。因此,因透明電極直接連結反射電極 ,免除形成連結反射電極至薄膜電晶體之接觸孔之製程, 因而裝造過程簡化。特別因多層像素電極可使用單一光罩 且幸乂佺使用半調光罩或狹縫光罩製成,故可更進一步簡化 製造過程。 10 此外,反射層係於約2〇〇°C溫度退火約i至約2小時時 間,因而防止(帶有透明電極作為下層之)多層像素電極之 反射電極的剝離。 此外,因襯墊電極係由透明電極之同一層製成,當液 晶顯示面板之襯墊電極係藉C0G方法連結至外部積體電路 15時,不會發生金屬腐蝕,因而襯墊可靠度增高。 雖然已經說明本發明之較佳具體實施例,但需了解本 發明絕非限於該等較佳具體實施例,反而熟諳技藝人士於 後文申請專利範圍之本發明之精髓及範圍内可做出多種變 化及修改。 20 【圖式4簡軍^ 明】 第1A至1C圖為剖面圖顯示習知反射_透射式液晶顯示 裝置; 第2A至2C圖為剖面圖顯示另一習知反射-透射式液晶 顯示裝置; 200402586 玖、發明說明 第3A至3C圖為剖面圖顯示根據本發明之第—具體實 施例之反射-透射式液晶顯示裝置; 第4A至1GC圖為剖面圖說明根據本發明之第—具體實 施例,製造反射-透射式液晶顯示裝置之方法,· 5 帛11圖為剖面圖顯示根據本發明之第二具體實施例之 反射-透射式液晶顯示裝置;The sixth photomask is used to form the source region 224 and the drain region 225 of the pixel region, the source region 226 and the drain region 227 of the N-type TFT in the driver region, and the source region 228 and the channel region of the P-type TFT by lithography. The pole 229 is in the driver area. The source and drain electrodes 224, 225, 226, 227, 228, and 229 are connected to the source and drain regions through the contact holes 222 and 20, respectively. At this time, the drain electrode 225 of the pixel region is also formed in the opening 220 俾, and the capacitor lower electrode 209 is stacked, so that the stacked portion is set as the capacitor upper electrode. Referring to FIG. 14E, a photosensitive organic thin film is coated on the source and drain electrodes 224, 225, 226, 227, 228, and 229 and the second interlayer dielectric layer 218 up to about 30 .: 200402586 发明, description of the invention 3 microns Thickness, thereby forming the passive layer 230. In order to form a through hole 232 penetrating the passive layer 230, after a seventh photomask (not shown) corresponding to the through hole 232 is disposed on the passive layer 230, the passive layer 230 uses the seventh light above the drain region 225 of the pixel region. The hood was initially exposed by 5 methods of full exposure. Subsequently, after the eighth mask (not shown in the figure) forming the microlens is placed on the passive layer 230, part of the passive layer 230 (except for the through-hole area) is exposed twice by the lens exposure method using the eighth mask. Then, a TMAH-containing solution is used for development processing, thereby forming a through hole 232 and a plurality of slits 233. The drain electrode 225 of the pixel region is exposed through the through hole 232. It is then hardened at a temperature of about 130 ° C to about 230 ° C for about 100 minutes, and then flows and hardens the passive layer 230. Referring to FIG. 14F, an argon plasma treatment is performed on the passive layer 230 to improve the adhesion between the organic passive layer 230 and the transparent conductive layer to be formed thereon. A transparent conductive layer made of a conductive material (such as ITO) is formed on the through hole 232 and the passive layer 230 to a thickness of about 450 angstroms at a temperature of less than 200 ° C and preferably about 20 to about 150 ° C. Subsequently, the transparent conductive layer is annealed at a temperature higher than 100 ° C for more than 30 minutes, and preferably annealed at 200 ° C for about 1 to about 2 hours, so as to improve the uniformity of the pattern of the transparent conductive layer. Then, the transparent conductive layer is subjected to hard baking and drying treatment at a temperature higher than 120 ° C for more than about 30 minutes, and the adhesion between the transparent conductive layer and the photosensitive layer pattern (which will be formed on the subsequent lithography method) will be improved. The transparent conductive layer is formed by using a ninth photomask by lithography and wet etching to form a transparent electrode 234. The transparent electrode 234 is connected to the drain electrode 225 of the pixel region through the through hole 232. Referring to FIG. 14G, a barrier metal layer is formed on the entire surface of the structure including the transparent electrode 234. The barrier metal layer is made of a metal such as platinum-crane (Mo-W), which has an etching rate similar to that of a reflective electrode, in terms of a predetermined etchant for etching a later-formed reflective layer. The barrier metal layer having a thickness of about 500 angstroms is formed at a temperature of about 20 to about 150 ° C and preferably about 50 ° C. A reflective layer comprising aluminum- (Al-Nd) is then formed on the barrier metal layer to a thickness of about 2000 angstroms at a temperature of about 20 to about 150 ° C and preferably about 50 ° C. The reflective layer is then above 100. (: The temperature annealing is greater than about 30 minutes, and preferably about 200 ° C for 1 hour, to prevent the reflective layer from peeling in the subsequent development process. Subsequently, the tenth photomask is used for photographic and wet etching methods for the reflective layer and the organic barrier layer. The patterning method is used to form a pattern, thereby forming a reflective electrode 238 and a metal barrier layer pattern 236. The reflective electrode 238 directly contacts the transparent electrode 234. Embodiment 5 FIG. 15 is a cross-sectional view showing the reflection-transmission according to the fifth embodiment 15 liquid crystal display device. Referring to FIG. 15, the reflection-transmission liquid crystal display device according to the fifth embodiment is the same as the fourth embodiment, except for only one item. The fifth embodiment and the fourth embodiment The difference is that the transparent electrode 234 is formed on the passive layer 230 (except for the through hole 232), and the blocking metal layer pattern 236 and the reflective electrode 238 are formed on the through hole 232 and the transparent electrode 234. The drain electrode 225 of the thin film transistor is contacted. Specific Embodiment 6 FIG. 16 is a sectional view showing a reflection-transmission type liquid crystal display device according to a sixth specific embodiment of the present invention. According to FIG. 16, the reflection-transmission type liquid 32 according to the sixth embodiment 32 200402586 The crystal display device is the same as the fourth embodiment, except for only one item. The sixth embodiment and the fourth embodiment are implemented. The difference between the examples is that the barrier metal layer pattern 236 and the reflective electrode 238 are formed only on the transparent electrode 234, except for the through hole 232. 5 In the foregoing specific embodiment, the transparent electrode and the reflective electrode are patterned using two photomasks. Transparent electrode and reflective electrode According to the seventh specific embodiment of the present invention, a single photomask is used for patterning. For example, after performing argon plasma treatment to improve the adhesion between the organic passive layer and the transparent conductive layer, the transparent conductive layer and the barrier metal The layer and the reflective layer are sequentially formed on the resulting structure at a temperature of less than about 200 ° C. In this case, the transparent conductive layer is made of ITO, and the metal barrier layer and the reflective layer are made of Mo_W and Al_Nd, respectively. After that, an annealing treatment is performed for about 1 hour at a temperature higher than about 1 °. After the reflective layer is prevented from being peeled off in the subsequent development process, the photosensitive layer is coated on the reflective layer. Secondly, the photosensitive layer Exposure and development are performed using a half-tone mask or slit mask 15. Therefore, the photosensitive layer patterns with different thicknesses are formed in the transmission window and the reflective window. The photosensitive layer pattern is used as the etching mask on the reflective layer and the barrier metal layer. The layer pattern is partially removed by ashing or dry etching to have a predetermined thickness. The transmission window and reflection window are formed at the same time as the transparent conductive layer is etched, preferably by using the remaining part of the photosensitive layer pattern as an etching mask. The position of the transparent electrode substantially coincides with the transmission window, and the reflection electrode is exposed through the reflection window. Therefore, the transparent electrode, the pad electrode, the barrier metal layer pattern, and the reflection electrode use a photomask according to the seventh embodiment of the present invention. It was made to take advantage of 200,402,586, invention description to reduce the number of photomasks. According to the present invention, in a multilayer pixel electrode with a transparent electrode as a lower layer, the 'transparent electrode' directly contacts the reflective electrode. Preferably, in order to prevent electric corrosion between the transparent electrode and the reflective electrode, the blocking metal layer pattern is interposed between the transparent 5 electrode and the reflective electrode. Therefore, since the transparent electrode is directly connected to the reflective electrode, the process of forming a contact hole connecting the reflective electrode to the thin-film transistor is eliminated, so the fabrication process is simplified. Especially since the multilayer pixel electrode can be made of a single photomask and, fortunately, a half photomask or a slit photomask is used, the manufacturing process can be further simplified. 10 In addition, the reflective layer is annealed at a temperature of about 200 ° C for about i to about 2 hours, thereby preventing peeling of the reflective electrode of the multilayer pixel electrode (with a transparent electrode as the lower layer). In addition, since the pad electrode is made of the same layer of the transparent electrode, when the pad electrode of the liquid crystal display panel is connected to the external integrated circuit 15 by the COG method, metal corrosion does not occur, so the reliability of the pad is increased. Although the preferred embodiments of the present invention have been described, it should be understood that the present invention is by no means limited to these preferred embodiments. Instead, a person skilled in the art can make a variety of the essence and scope of the present invention within the scope of the patent application. Changes and modifications. 20 [Schema 4 Jian Jun ^ Ming] Figures 1A to 1C are sectional views showing a conventional reflection-transmissive liquid crystal display device; Figures 2A to 2C are sectional views showing another conventional reflection-transmissive liquid crystal display device; 200402586 发明 Description of the invention Figures 3A to 3C are sectional views showing a reflection-transmission type liquid crystal display device according to the first embodiment of the present invention; Figures 4A to 1GC are sectional views illustrating the first-specific embodiment according to the present invention A method for manufacturing a reflection-transmission type liquid crystal display device. · 5 帛 11 is a sectional view showing a reflection-transmission type liquid crystal display device according to a second specific embodiment of the present invention;
弟12圖為剖面圖顯示根據本發明之第三具體實施例之 反射-透射式液晶顯示裝置; 第U圖為剖面圖顯示根據本發明之第四具體實施例之 10反射-透射式液晶顯示裝置; —弟14A至14G圖為剖面圖說明根據本發明之第四具體 貫施例’製造反射·透射式液晶顯示裝置之方法; 第15圖為剖面圖顯示根據本發明之第五具體實施例之 反射-透射式液晶顯示裝置;以及 15 # 16圖為剖面圖顯示根據本發明之第六具體實施例之Figure 12 is a sectional view showing a reflection-transmission type liquid crystal display device according to a third embodiment of the present invention; Figure U is a sectional view showing a reflection-transmission type liquid crystal display device 10 according to a fourth embodiment of the present invention 14A to 14G are cross-sectional views illustrating a method of manufacturing a reflective and transmissive liquid crystal display device according to a fourth specific embodiment of the present invention; and FIG. 15 is a cross-sectional view illustrating a fifth specific embodiment according to the present invention. A reflection-transmission type liquid crystal display device; and FIG. 15 is a cross-sectional view showing a sixth embodiment of the present invention.
反射-逯射式液晶顯示裝置。 【囷武之主要元件代表符號表】 22···汲極 25···無機被動層 26…有機被動層 28 ’ 34···接觸孔 30···透明電極 32···緩衝層 33,35···襯墊接觸孔 36···反射電極 38···閘襯墊電極 10 · · ·基板 I1.··閘概塾 12 · · •閘杨 14...閘絶緣層 15···薄祺電晶體 16···主動圖案 18…電卩且接觸圖案 19…資料概墊 20···源;(¾ 200402586 玖、發明說明 40.. .資料襯墊電極 50…基板 51.. .閘襯墊 52…閘極 54.. .閘絕緣層 55.. .薄膜電晶體 56.. .主動圖案 5 8...電阻接觸圖案 59…資料襯墊 60."源極 62.. .汲極 65.. .無機被動層 66.. .有機被動層 68.. .接觸孔 69,71...襯墊接觸孔 70.. .反射電極 74.. .閘襯墊電極 76.. .資料襯墊電極 100.. .絕緣基板 102…閘極 104.. .閘襯墊 106…閘絕緣層 108··.主動圖案 110.. .電阻接觸圖案 112,114…電極 115…資料襯墊 116.. .無機被動層 117 , 118 , 119 , 122 …接觸孔 120.. .有機被動層 124.. .透明電極 125.. .閘襯墊電極 126.. .資料襯墊電極 128.. .阻擋金屬層 13 0...反射電極 150…薄膜電晶體 200.. .絕緣基板 202.. .封阻層 204.. .主動圖案 206…閘絕緣層 208,210,211···閘極 209···下電極 212C,213C,214C ...通道區 212D , 213D , 214D ... >及區 212L,213L...LDD區 212S,213S,214S…源極 216,218…層間介電層 220···開口 222.. .接觸孔 224,226,228…源極 225,227,229…汲極 230.. .被動層 232…通孑L 234…透明電極 236.. .阻擋金屬層圖案 238.. .反射電極Reflection-emissive liquid crystal display device. [Representative Symbols of the Main Elements of the Armed Forces] 22 ··· Drain 25 ··· Inorganic Passive Layer 26 ·· Organic Passive Layer 28 '34 ·· Contact Hole 30 ·· Transparent Electrode 32 ·· Buffer Layers 33, 35 ·························································· Thin Qi transistor 16 ... Active pattern 18 ... Electron and contact pattern 19 ... Data source pad 20 ... Source; (¾ 200402586), Invention description 40 ... Data pad electrode 50 ... Substrate 51 ... Gate pad 52 ... Gate 54 ... Gate insulation 55 .. Thin film transistor 56 ... Active pattern 5 8 ... Resistive contact pattern 59 ... Data pad 60. " Source 62 ... Drain electrode 65 .. Inorganic passive layer 66 .. Organic passive layer 68 .. Contact hole 69, 71 ... Pad contact hole 70 .. Reflective electrode 74 .. Gate pad electrode 76 .. Data pad electrode 100 .. Insulating substrate 102 ... Gate 104 .. Gate pad 106 ... Gate insulation layer 108 ... Active pattern 110. Resistive contact pattern 112, 114 ... Electrode 115 ... Data pad 116 .. .. inorganic passive layer 117, 118, 119, 12 2… contact hole 120... Organic passive layer 124... Transparent electrode 125... Gate pad electrode 126... Information pad electrode 128... Barrier metal layer 13 0 ... reflective electrode 150 ... film Transistor 200 ... Insulating substrate 202 ... Blocking layer 204 ... Active pattern 206 ... Gate insulating layer 208, 210, 211 ... Gate 209 ... Lower electrodes 212C, 213C, 214C ... Channel regions 212D, 213D, 214D ... > and regions 212L, 213L ... LDD regions 212S, 213S, 214S ... source 216, 218 ... interlayer dielectric layer 220 ... opening 222 ... contact hole 224 226, 228 ... Source 225, 227, 229 ... Drain 230 ... Passive layer 232 ... L 234 ... Transparent electrode 236 ... Blocking metal layer pattern 238 ... Reflective electrode
3636
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| KR1020020046877A KR100858297B1 (en) | 2001-11-02 | 2002-08-08 | Reflective-transmissive type liquid crystal display device and method of manufacturing the same |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110959192A (en) * | 2017-11-27 | 2020-04-03 | 首尔伟傲世有限公司 | LED unit for display and display device having the same |
| US12040351B2 (en) | 2017-11-27 | 2024-07-16 | Seoul Viosys Co., Ltd. | Light emitting diode stack including organic and inorganic layers |
| US12062684B2 (en) | 2017-11-27 | 2024-08-13 | Seoul Viosys Co., Ltd. | Light emitting diode (LED) stack for a display |
| US12107081B2 (en) | 2017-12-20 | 2024-10-01 | Seoul Viosys Co., Ltd. | LED unit for display and display apparatus having the same |
| US12550482B2 (en) | 2022-06-22 | 2026-02-10 | Seoul Viosys Co., Ltd. | Passivation covered light emitting unit stack |
-
2002
- 2002-11-14 TW TW91133412A patent/TWI260459B/en not_active IP Right Cessation
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110959192A (en) * | 2017-11-27 | 2020-04-03 | 首尔伟傲世有限公司 | LED unit for display and display device having the same |
| US12040351B2 (en) | 2017-11-27 | 2024-07-16 | Seoul Viosys Co., Ltd. | Light emitting diode stack including organic and inorganic layers |
| US12062684B2 (en) | 2017-11-27 | 2024-08-13 | Seoul Viosys Co., Ltd. | Light emitting diode (LED) stack for a display |
| US12107081B2 (en) | 2017-12-20 | 2024-10-01 | Seoul Viosys Co., Ltd. | LED unit for display and display apparatus having the same |
| US12550482B2 (en) | 2022-06-22 | 2026-02-10 | Seoul Viosys Co., Ltd. | Passivation covered light emitting unit stack |
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| Publication number | Publication date |
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| TWI260459B (en) | 2006-08-21 |
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