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TW200301896A - Programming circuit for a programmable microelectronic device, system including the circuit, and method of forming the same - Google Patents

Programming circuit for a programmable microelectronic device, system including the circuit, and method of forming the same Download PDF

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Publication number
TW200301896A
TW200301896A TW92100098A TW92100098A TW200301896A TW 200301896 A TW200301896 A TW 200301896A TW 92100098 A TW92100098 A TW 92100098A TW 92100098 A TW92100098 A TW 92100098A TW 200301896 A TW200301896 A TW 200301896A
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Taiwan
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circuit
switch
patent application
scope
item
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TW92100098A
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Chinese (zh)
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TWI260629B (en
Inventor
Michael N Kozicki
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Axon Technologies Corp
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0009RRAM elements whose operation depends upon chemical change
    • G11C13/0011RRAM elements whose operation depends upon chemical change comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • G11C2013/009Write using potential difference applied between cell electrodes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/10Resistive cells; Technology aspects
    • G11C2213/15Current-voltage curve
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70Resistive array aspects
    • G11C2213/72Array wherein the access device being a diode
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70Resistive array aspects
    • G11C2213/79Array wherein the access device being a transistor

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Abstract

A circuit for programming a microelectronic device is disclosed. The circuit is configured to provide a reversible bias across the microelectronic device to perform erase and write functions. One configuration of the programming circuit includes one or more inputs coupled to the programmable device and a complimentary metal-oxide semiconductor circuit coupled to the programmable device. This design allows for writing and erasing of the programmable cell using a low and high voltage input.

Description

200301896 五、發明說明(1) 相關申請案的對照: 本申請案為2002年1月3曰提出申請之美國專利 案號60/345, 931「用於可程式金屬化細胞元之可程式電路 (PROGRAMMABLE CIRCUITRY FOR THE PROGRAMMABLE METALLIZATION CELL)」一案的延續。 一、【發明所屬之技術領域】 本發明係與可程式微電子裝置有關,特別是與一種 施加寫入以及/或者抹除電壓的電路有關。此電路 縱供給裝置的能量大小/或者能量極性,將裝 = 性予以可變異程式化。 丁符 存類 儲的 來同 置不 裝為 體分 隐性 記特。 到其點 用依缺 使可優 常置的 經裝同 中體不 腦憶其 電記有 1與些都 術統這型 技系。類 前子料種 先電資一 L在的每 、 位, 二 進型 舉例來說,個人f腦巾可以看到的隨機存取記憶體 (RAM) —般屬於揮發性半導體記憶體(v〇Utiie semiconductor memory)。換句話說,當電源被切斷 拔掉的時候,㈣存的資訊就會流失。動態隨機存取 體(Dynamic DRAM)必須每幾個百萬分之—秒 〜 (microsecond)就更新(refreshed),也就是重新充電— 次,才能夠留住所儲存的資料,因此具有高度的揮發性。200301896 V. Description of the invention (1) Comparison of related applications: This application is US Patent No. 60/345, 931 "Programmable Circuit for Programmable Metallized Cells (applied on January 3, 2002) PROGRAMMABLE CIRCUITRY FOR THE PROGRAMMABLE METALLIZATION CELL ". 1. [Technical Field to which the Invention belongs] The present invention relates to a programmable microelectronic device, and particularly to a circuit for applying a write and / or erase voltage. This circuit longitudinally supplies energy to the device and / or the polarity of the energy. The Dingfu storage class is stored in the same place and is not presumed to be a hidden recessive record. To its point, the use of Yiqiu can make the habitually installed warp suits the same as the Chinese body without the brain to remember its telegraph. There are 1 and some technical systems of this type. The pre-class material is the first charge per digit. The binary type is, for example, a random access memory (RAM) that can be seen by a personal brainband. It generally belongs to volatile semiconductor memory (v. Utiie semiconductor memory). In other words, when the power is cut off and unplugged, the stored information will be lost. The dynamic random access memory (Dynamic DRAM) must be refreshed every few millionths of a second to (microsecond), that is, recharged, to retain the stored data, so it is highly volatile .

第5頁 200301896 五、發明說明(2) 靜態隨機存取記憶體(Static DRAM)可以在寫入一次後保 留貧料,只,電源不切斷就會一直保持原有狀態。但是電 源切斷,貝料也會消失。因此,在這類揮發性記憶體 1,2有在系統沒有斷電的時候才會保有資訊。一般來 ,二=些1^^1裝置佔了相當可觀的晶片面積,製造時會比 較昂貝而為了要儲存資料,也會消耗相當可觀的能源。 由上可知,我們需要更進步的記憶體裝置,用在個人電腦 與類似的裝置上。 其=儲存襞置像是磁碟片、硬碟與磁帶等磁性記憶 裝置,逛有光碟片、CD —Rw和評!) —Rw等都算是非揮發性記 ?體二它們具有超高的容量,而且可以多次覆寫。不幸 疋,這些記憶體裝置的體積大,容易受撞擊/震動影變。、 :且傳動機構貴,t消耗相當大量的功率。這些負面二 素使得此類記憶體裝置不適用於膝上型、掌上型 因 人數位助理(PDA)等低功率的可攜式應用上。 自固 小巧、低功率、可經常更換儲存資料的可攜式 統與手持型設備的數量迅速成長,是低功率讀/寫二糸 吕己憶體越來越受重視與普及的部份原因。此外,由=體 可攜式系統通常需要在關機的時候儲存資料,戶斤::類 揮發性儲存裝置是較好的選擇。 知用非Page 5 200301896 V. Description of the invention (2) The static random access memory (Static DRAM) can keep the poor material after writing once. Only the power will keep the original state without being cut off. But if the power is cut off, the shell material will disappear. Therefore, this type of volatile memory 1, 2 will only retain information when the system is not powered off. Generally speaking, two = 1 ^^ 1 devices occupy a considerable amount of chip area, which will be more expensive during manufacturing, and in order to store data, it will also consume considerable energy. From the above, we need more advanced memory devices for personal computers and similar devices. Its = storage devices such as magnetic disks, hard disks and magnetic tapes, etc. Magnetic disks, CDs, CDs — Rw and comments!) — Rw, etc. are considered non-volatile memory. Second, they have extremely high capacity. , And can be overwritten multiple times. Unfortunately, these memory devices are bulky and vulnerable to impact / vibration. ,: And the transmission mechanism is expensive, t consumes a considerable amount of power. These negative factors make this type of memory device unsuitable for low-power portable applications such as laptops and handheld digital assistants (PDAs). Self-fixation The number of small, low-power, portable systems and handheld devices that can frequently change stored data has grown rapidly, which is part of the reason why low-power read / write devices such as Lu Jiyi's body are becoming more and more important. In addition, portable systems usually need to store data when shutting down. Households :: volatile storage devices are a better choice. Know-how

200301896200301896

I置。在PRQJ{之中有一種稱為 裝置’使用可燒熔(fusible) 程式化以後,就不能再重複程 五、發明說明(3) 程式非揮發性半導體記憶體 寫入一次可讀多次(WORM)的 的接線陣列。WORM裝置經過 式化。I 置。 I set. In PRQJ {, there is a device called “Using fusible” programming, you cannot repeat the process. 5. Description of the invention (3) Program non-volatile semiconductor memory can be written once and read many times (WORM ) 'S wiring array. The WORM device is formalized.

PjOM的類型中還包括可抹除(erasaMe)的可程式唯讀 ,ΐ μ稱為EPRQM,還有電子可抹除的可程式唯讀記憶 體衣置(EEPR0M)。這種裝置經過程式化以後還可以再變 更乂EPROM I置一般需要經過抹除的動作,通常是程式化 之前先經過紫外線的照射。因此這類裝置並不適合用在可 払式電子I置上。裝置比較容易程式化,但是也有 一些缺點,特別是EEPR〇M裝置都相當複雜、製造上相當困 f,體積相對也比較大。除此之外,包含EEpR〇M的電路必 肩承X得起用來程式化的高電壓。所以EEpR〇M和其他資料 儲存方法相較,每個位元的成本非常高。EEpR〇M雖然在斷 電的日守候仍然可以保有資料,但是在程式化過程中卻需要 大量的功率才行。對於以電池供電的可攜式系統來說,這 樣的功率負擔是相當可觀的。 主其他像是快閃記憶體(FLASH) —類的記憶體也相當昂 貝’製作過程也相當複雜。因此,我們需要易於製造,且 製造成本相對不貴的改良型記憶體裝置。除此之外,我們 也需要可程式化這類裝置的電路。PjOM types also include erasable (erasaMe) programmable read-only, ΐ μ is called EPRQM, and electronically erasable programmable read-only memory (EEPR0M). This kind of device can be changed after being programmed. EPROM I generally needs to be erased. Usually, it is irradiated with ultraviolet rays before being programmed. Therefore, this type of device is not suitable for use in a portable electronic device. The device is relatively easy to program, but it also has some disadvantages. In particular, the EEPROM devices are quite complicated, and they are quite difficult to manufacture, and their volume is relatively large. In addition, the circuit containing EEPROM must bear the high voltages that X can use to program. Therefore, compared with other data storage methods, EEPROM is very costly per bit. Although EEpROM can keep data on the day of power failure, it needs a lot of power in the process of programming. For a battery-powered portable system, this power burden is considerable. The main memory like flash memory (FLASH) -type memory is also quite expensive. The production process is also quite complicated. Therefore, we need an improved memory device that is easy to manufacture and relatively inexpensive to manufacture. In addition, we need circuits that can be programmed for such devices.

200301896 五、發明說明(4) 三、【發明内容】 本發明提供改良的微電子可程式電路 (microelectronic programmable circuit)、結構與勺人 程式電路之系統及其形成方法。更特別的是,本發明提2 程式電路(programming circuit),用以提供寫入以及//、 或者抹除的電壓給可程式裝置。而包含這類電路與相關可 程式結構的系統可以取代傳統的非揮發性與揮發性記情 接下來將詳細探討本發明如何克服現行可程式襄置的 一些缺點。整體來說,本發明所揭示的程式電路與^關的 可程式裝置相當容易製造,且成本相當便宜,同時也相當 容易達到程式化的目的。 在本發明的各種實施例中,可程式結構包含一個離子 導體(ion conductor)與至少二個電極(electr〇de)。當外 加第一極性偏壓於二電極之間時,會改變結構的一或多個 電子特性。在此實施例的一個情形中,當外加第一極性偏 壓於二電極之間時,會改變結構的阻抗(resistance)。在 另一個情形下,當外加第一極性偏壓於二電極之間時,會 改變結構的電容(capaci tance)或其他的電子特性。根據 本實施例的另一情形,我們可以藉由施加一足量的第二極 性的偏壓’逆轉可程式特性的變化量。而一或多個電子特 性的變化以及改變量可以偵測得到,因此,我們可以從包200301896 V. Description of the invention (4) III. [Summary of the invention] The present invention provides an improved microelectronic programmable circuit, a structure and a system of a programmable circuit, and a method for forming the same. More specifically, the present invention provides a programming circuit for providing a voltage for writing and / or erasing to a programmable device. A system containing such circuits and related programmable structures can replace traditional non-volatile and volatile memorabilia. Next, it will be discussed in detail how the present invention overcomes some of the shortcomings of the current programmable architecture. On the whole, the program circuit and the programmable device disclosed in the present invention are relatively easy to manufacture, the cost is relatively cheap, and the purpose of programming is also quite easy to achieve. In various embodiments of the present invention, the programmable structure includes an ion conductor and at least two electrodes. When a first polarity is applied between the two electrodes, one or more electronic characteristics of the structure are changed. In one case of this embodiment, when a first polarity bias is applied between the two electrodes, the resistance of the structure is changed. In another case, when a first polarity is applied between the two electrodes, the capacitance or other electronic characteristics of the structure are changed. According to another situation of this embodiment, we can reverse the change amount of the programmable characteristic by applying a sufficient amount of the second polar bias'. And the change of one or more electronic characteristics and the amount of change can be detected, so we can

200301896 五、發明說明(5) 含此一結構的電路令取出所儲存的資訊。 根據本發明,用以程式化以及,或者抹除可程式裝置 的電路包含複數個電壓輸入端以及複數個開關, 在一 電壓源與接地(gr〇und)以及電壓輸入端之間。在本實施例 =各種情況下’程式電路使用第一電a (比方說一個正電 =)和第二電® (比如說一個負電壓)來程式化以及/或 ί in程弋置。在本實施例的一個特別情況下,程式 接至電壓輸入端和可程式化裝置的互補金 式ί: 電路。在本實施例的其他不同情況下,程 式電路is被動負載以及//或者主動負載。 除可另一實施例…程式化以及/或者抹 關,/1二ί的電路包含單一寫入電壓輸入端,複數個開 在電二關(seleet switeh) °複數個開關連接 開關、查垃=合 ground)以及寫入電壓輸入端之間。選擇 可以讓結槿隍1電壓輸入端與可程式化裝置間。選擇開關 除的^程。歹1内的特殊可程式結構選擇地進行寫入或抹 座的^ 么明的另一實施例,可程式裝置可以在一個基 式電2。而,成丄在本實施例的一個情況下,基座包含程 於程式電 本貫施例的另一個情況下,記憶體裝置覆蓋 " 之上,而程式電路與記憶體間的導線則是利用200301896 V. Description of the invention (5) The circuit containing this structure can retrieve the stored information. According to the present invention, a circuit for programming and / or erasing a programmable device includes a plurality of voltage input terminals and a plurality of switches between a voltage source and a ground and a voltage input terminal. In this embodiment = the programming circuit uses the first power a (for example, a positive power =) and the second power ® (for example, a negative voltage) to program and / or set the circuit. In a special case of this embodiment, the program is connected to a voltage input and a complementary circuit of the programmable device. In other different cases of this embodiment, the program circuit is a passive load and / or an active load. Except for another embodiment ... stylized and / or wiped off, the circuit of 1 2 ί includes a single write voltage input terminal, a plurality of seleet switeh are turned on, a plurality of switches are connected to the switch, and the check = Ground) and the write voltage input. The selection can be made between the voltage input terminal and the programmable device. Select the switch to delete. The special programmable structure in 歹 1 can be selectively written or erased. In another embodiment, the programmable device can be in a basic circuit. However, in one case of Cheng Yi in this embodiment, the base contains a program in another embodiment of the electric program embodiment, the memory device is covered by ", and the wire between the program circuit and the memory is use

200301896 五、發明說明(6) 基压铃了私式結構内的導線構造(conductive wiring scheme)幵)成。 四、【實施方式】 在此’本發明可以用各種不同的功能元件加以說明。 要注意的是這裏所指的功能元件可以用任何數目的硬體或 是可執行特定功能的架構元件(structural c〇mp〇nent)來 貫施。舉例來說,本發明可以採用各種積體元件,其中包 含不同電子裝置,比如說電阻、電晶體、電容、二極體及 類似元件等組成,而元件的數值可經過適當調整以達到特 定的目的。除此之外,本發明可以利用各種積體電路應 用,施以一有效的可逆性偏壓來實施。熟悉此技藝者應可 透過本發=的說明而了解此等廣泛應用,故不在此詳述。 另2要注意的是,儘管在圖示的電路中各種元件已經透過 適當的方式與其他元件耦合或連接,此類的連線和耦合方 式也可以透過元件之間的直接連線或位於其間的其他元件 或裝置來連接。 八。本發明一般與用於可程式微電子裝置之程式電路與包 =程式電路之系統及其形成方法有關。圖1與圖2所示為本 發明所揭示的程式電路及其系統中,形成於基座110的表 面的可权式微電子結構100與200,離子導體140,還有選 擇性包含的緩衝或障壁層或區域155以及/或255。結 100與200包含電極120與130。 1200301896 V. Description of the invention (6) The base pressure bell has a conductive wiring scheme (私) in the private structure. 4. [Embodiment] Here, the present invention can be described with various different functional elements. It should be noted that the functional elements referred to here can be implemented by any number of hardware or structural elements that can perform specific functions. For example, the present invention can use various integrated components, including different electronic devices, such as resistors, transistors, capacitors, diodes, and similar components, and the value of the components can be adjusted appropriately to achieve a specific purpose . In addition, the present invention can be implemented by using various integrated circuit applications and applying an effective reversible bias. Those familiar with this technique should be able to understand these wide applications through the instructions in this publication, so they are not described in detail here. Another thing to note is that although various components have been coupled or connected with other components through appropriate means in the circuit shown, such connections and coupling methods can also be through direct connections between the components or between them. Other components or devices to connect. Eight. The present invention relates generally to a program circuit and a package circuit for a programmable microelectronic device and a method for forming the same. Figures 1 and 2 show the weightable microelectronic structures 100 and 200, the ion conductor 140, and the optional inclusion of a buffer or barrier in the program circuit and its system disclosed in the present invention. Layer or region 155 and / or 255. The junctions 100 and 200 include electrodes 120 and 130. 1

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I 第10頁 200301896 五、發明說明(7) 一般來說,結構100與20 0的作用為,當有一個大於臨 界電壓(threshold voltage) VT的偏壓加在電極120與130之 間時’結構1 0 0的電子特性就會變化。以下將會對臨界電 壓做進一步的說明。舉例來說,根據本發明的一個實施 例,當有一個電壓V -VT加在電極120與130之間,離子導體 140中的導電離子開始遷移。並且在或靠近電極12〇與13〇 中較負的一端形成一個區域丨6〇,即電沈澱物 (electrodeposit),其導電性較離子導體其他大部分的區 域要高。當有區域16〇形成時,電極丨2〇與丨3〇之間的阻抗 會降低’而其他的電子特性也可能會改變。在沒有任何絕 緣障壁的情況下,用來從一個電極到另一電極成長區域 I/ 0的臨界電壓將會大幅降低裝置阻抗。臨界電壓約等於 系統的氧化還原電位(reducti〇n/〇xidati〇n potential),一般在幾百mV左右。上述的絕緣障壁在底下 ,會詳細說明。如果反轉同樣電壓的極性,區域1 6 〇將會 溶回離子導體,而裝置也會回復高阻抗或抹除的狀態。曰 、口 =100與20 0可用來儲存資訊’ gj此可用在記憶體電 处。牛例來說,在本發明中的結構1 00與其他可程式化 fTr二用/取代DRAM、SRAM、PR〇M、EPR0M、EEPR0M 以及 a寻兄—憶體裝置,或者是上述的組合。除此之外,本 斤揭示的可私式結構可用在需要程式化或改變電路 系4份電子特性的應用。I Page 10 200301896 V. Description of the invention (7) Generally, the function of the structures 100 and 20 0 is that when a bias voltage greater than the threshold voltage VT is applied between the electrodes 120 and 130, the structure The electronic characteristics of 100 will change. The critical voltage will be further explained below. For example, according to an embodiment of the present invention, when a voltage V-VT is applied between the electrodes 120 and 130, the conductive ions in the ion conductor 140 begin to migrate. And a region is formed at or near the negative end of the electrodes 12 and 13, that is, the electrodeposit, which has higher conductivity than most other areas of the ionic conductor. When a region 160 is formed, the impedance between the electrodes 丨 20 and 丨 30 will decrease 'and other electronic characteristics may also change. In the absence of any insulating barriers, the critical voltage used to grow the I / O from one electrode to another will significantly reduce the device impedance. The critical voltage is approximately equal to the redox potential of the system (reductioon / 〇xidati〇n potential), which is usually around several hundred mV. The above insulation barrier is underneath and will be explained in detail. If the polarity of the same voltage is reversed, the area 160 will dissolve back to the ionic conductor and the device will return to a high impedance or erased state. Said, mouth = 100 and 20 0 can be used to store information ’gj This can be used in memory. For example, the structure 100 and other programmable fTr in the present invention use / replace DRAM, SRAM, PROM, EPR0M, EEPR0M, and a brother-memory-memory device, or a combination thereof. In addition, the private structure disclosed in this article can be used in applications that need to program or change the four electronic characteristics of the circuit system.

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根據本發明的各種實施例, 胞元100或2 0 0的揮發性·大°己L、體比如呪細 r ·+ Cvolatlllty)可藉由改變寫入過裎 (wnte operatlon)中的能源量,如時間、、 熱能或類似的東西來4 %。4 + ;,L 、 宜入%和士 ^上 在迫個情況下,區域1 60會在 .,、、t壬中形成。在寫入過程中的能源量(其電壓超過寫 所需的臨界電壓)越高,區賴。長得越多因此寫 ::體=發性也越低。反之,*果提供細胞元的能量相According to various embodiments of the present invention, the volatility of the cell 100 or 200 is large, and the volume such as the thin r + Cvolatlllty can be changed by changing the amount of energy written in the wnte operatlon. 4% like time, heat or something like that. 4 +;, L, 入 %% and 士 上 Under the circumstances, the area 1 60 will be formed in. ,,, and t. The higher the amount of energy in the writing process (its voltage exceeds the critical voltage required for writing), it depends. The more you grow, the less :: body = hair is. Conversely, * fruit provides the energy phase of the cell

相當容易抹除的揮發記憶體。戶斤以用來形 軍H己te體和非揮發性記憶體的結構可以相同 T,;=成揮發性/易於抹除的記憶體的能量可以較 i 太 Iti 裝置(portable electr〇nic device)需要 量,因此耗電越少越好。揮發性與非揮發 。己隐體可以在相同的基座上形成,並藉由分隔Quite easy to erase volatile memory. The structure of the household body and the non-volatile memory can be the same T, and the energy of the volatile / easy-to-erase memory can be lower than that of the Iti device (portable electronic device). Demand, so less power is better. Volatile and non-volatile. The hidden body can be formed on the same base and separated by

(Partitioned)或隔離方式來分開,讓每一個部份都可以 專注於揮發性或非揮發性記憶體的功能。或者,記情體㈣ 列可利用程式化技術做成揮發性或非揮發性記憶、 體二瓖記憶體的特性,如揮發性或非揮發性,可藉由改變 "己憶體陣列中個別部份所受能量來控制。 ,到圖丨與圖2,基座110可以包含任何合適的物質。 舉例來說,基座11 〇可以包含半導體、導體、半絕緣 (^emiinsulatlve)與絕緣物質等物質,或上述物y的袓 5。根據本發明的一個實施例,基座11〇包含絕緣物質ιι2(Partitioned) or isolation, so that each part can focus on the function of volatile or non-volatile memory. Alternatively, the memory queue can be programmed to make volatile or non-volatile memory, and the characteristics of the body memory, such as volatile or non-volatile, can be changed by changing the individual memory array. Controlled by part of the energy. As shown in FIG. 1 and FIG. 2, the base 110 may contain any suitable substance. For example, the base 11 may include a semiconductor, a conductor, a semi-insulating (^ emiinsulatlve), an insulating substance, or the like, or 袓 5 of the aforementioned substance y. According to an embodiment of the invention, the base 11 contains an insulating substance ιι2

第12頁 200301896 五、發明說明(9) -^ 以及包含形成於半導體基座上的微電子裝置的一區域 1 1 4。微電子裝置1 1 4可包含用以程式化結構丨〇 〇以及 者1 0 2的程式電路,以下將詳加討論。裝置層11 2與11 4 3 藉由額外的層(layer)區隔’比如說,一般用來形成積$ 電路的層。由於這種可程式結構可以在絕緣物質或其$他 質上形成,因此本發明中所揭示的可程式結構特別適用= 注重基座大小的應用上’比如說半導體物質。此外,在^ 電子裝置上覆蓋記憶體細胞元的好處是,這樣的配置可$ 讓記憶體細胞元陣列以及微電子裝置間達到更高的資料2 輸率。這是因為可在112與150兩層間形成導電路徑厂 (conductive plugs)的緣故。 電極120與130也可以用各種合適的導電材料形成〉舉 例來說,電極120與130可以用摻雜多晶矽物質(d〇ped牛 polysilicon)或金屬來形成。 根據本發明的一個實施例,電極丨2 〇與丨3 〇的其中之一 可以用包含可溶解在離子導體140卞的金屬的物質形成。一 當足夠偏壓(V - VT)加在電極之間時,其中一個是可氧化電 極,而另一個是相當惰性、不會在操作可程式裝置過程中 溶解的電極’也就是惰性電極。舉例來說,電極丨2 〇在寫 入過程中可以是陽極(anode ),並且包含可溶解在離子導 體140中的物質,其中包含銀。而電極13〇在寫入過程中可 以是陰極’並且包含鎢(tungsten)、鎳(nickel)、翻 111 麵 1 第13頁 200301896Page 12 200301896 V. Description of the invention (9)-^ and an area 1 1 4 containing a microelectronic device formed on a semiconductor substrate. The microelectronic device 1 1 4 may include a program circuit for programming the structure 1 2 0 and 102, which will be discussed in detail below. The device layers 11 2 and 11 4 3 are separated by an extra layer, for example, a layer generally used to form a circuit. Since such a programmable structure can be formed on an insulating substance or other substances, the programmable structure disclosed in the present invention is particularly applicable = for applications that focus on the size of the base, such as semiconductor substances. In addition, the advantage of overlaying the memory cells on the electronic device is that such a configuration can achieve higher data transfer rates between the memory cell array and the microelectronic device. This is because conductive plugs can be formed between the 112 and 150 layers. The electrodes 120 and 130 may also be formed of various suitable conductive materials. For example, the electrodes 120 and 130 may be formed of doped polysilicon or metal. According to an embodiment of the present invention, one of the electrodes 20 and 30 may be formed of a substance containing a metal that is soluble in the ion conductor 140A. -When sufficient bias voltage (V-VT) is applied between the electrodes, one is an oxidizable electrode and the other is a relatively inert electrode that does not dissolve during the operation of the programmable device, that is, an inert electrode. For example, the electrode 2 can be an anode during the writing process, and contains a substance that can be dissolved in the ion conductor 140, including silver. The electrode 13 can be a cathode ’in the writing process, and includes tungsten (tungsten), nickel (nickel), and 111 faces. Page 13 200301896

(molybdenum)、白金、金屬矽化物…^ 似的惰性物質。至少有一個電極包(二==_(molybdenum), platinum, metal silicide ... ^ At least one electrode pack (two == _

Lin : 的程度。從而在使用結構100以及/Μ Ι 如,讓區域160在離子導體140内快速且釋定的 二或者;進其他電子特性改變。此外,採;生的物开質 ?’也就是在寫入操作中當作陰極的電極、 以促進任何區域160電解(electrodissolution)。以及 或者讓可程式裝置受到足夠的電壓時,還原 (erased state) 〇 一、 、可程式結構可以用在各種用途,並且由各種物質組 成’比方說根據所需求的寫入或抹除特性而定。各種可程 式結構組態和形成結構的物質已經在2〇〇2年丨〇月9日於美 國提出申請的案號1 0/268, 1 0 7「可程式微電子裝置、結構 與系統及其形成方法(PROGRAMMABLE MICROELECTRONIC DEVICE, STRUCTURE, AND SYSTEM AND METHOD OF FORMING THE SAME)」中揭示,在此並引用此申請案的内 容作為說明。 根據本發明的一個實施例,電極1 2 0與1 3 0中至少一個 是以適合作為内部連結(i nterconnect)的材料製成。舉例 末3兒’電極130可以在半導體積體電路中作為内部連結架 構的一部分。在本實施例的一個情況下,形成電極丨3 〇的Lin: The degree. Thus, when using the structure 100 and / M1, for example, let the region 160 be quickly and freely within the ionic conductor 140 or other electronic characteristics change. In addition, the raw material is used as an electrode in a write operation to promote electrodissolution of any region 160. And when the programmable device is subjected to a sufficient voltage, the erased state can be used. 1. The programmable structure can be used in various applications and is composed of various substances. 'For example, it depends on the required writing or erasing characteristics. . A variety of programmable structure configurations and structure-forming substances have been filed in the United States on October 9, 2002. Case No. 10/268, 107, "Programmable Microelectronic Devices, Structures, and Systems and Their Applications Forming method (PROGRAMMABLE MICROELECTRONIC DEVICE, STRUCTURE, AND SYSTEM AND METHOD OF FORMING THE SAME) "is hereby incorporated herein by reference. According to an embodiment of the present invention, at least one of the electrodes 120 and 130 is made of a material suitable as an i nterconnect. For example, the electrode 130 can be used as part of an internal connection structure in a semiconductor integrated circuit. In one case of this embodiment, the electrode

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物質實際上不能溶解在離子導體 合内部連結與作為電極13G的物。4二物質中。適 雜 力口/ Ί ,, 刀1家鶴(tungsten)、 (metal Slllcide)等―類物質。白巫以及金屬石夕化物 離子導體140可以用加上足夠偏壓就會傳導離子的物 質,成。適合作為離子導體14()的物質包括高分子聚合物 中:6子導二:半導體物質。在本發明的-個實施例 —40疋以硫系化合物(ChalCOgenide)物質所 組成。 、 離子導體140還可以包含已溶解以及/或者擴散的導 電物I。舉例來說,離子導體14〇可包含溶解金屬以及/ 或者金屬離子的固體溶液。根據本發明的一個實施例,導 體1 4 0包含溶解在硫系化合物玻璃中的金屬以及/或者金 子。根據本發明内含已溶解金屬的硫系化合物玻璃, 匕 §AsxS卜x Ag、AsxSe卜X-Ag、AsxTe卜x-Ag 、GexSe卜X-Ag、 A^Si-x-Ag、GexTe^x —Ag、AsxS卜x —Cu、AsxSe卜X-Cu、 、六x 6l-x Cu、GexSebx-Cu、GexS卜X-Cu 以及GexTe卜X — Ag,的固體 /谷液’其中x約在〇 · 1至0 · 5之間。其他的硫系化合物物質 包括銀、銅以及上述的組合,或者類似的物質。此外,導 ,1 4 〇可包含網路修正器(ne t wor k mod i f i er),能夠影響 ,子穿透導體140時的流動性(m〇bi 1 ity)。舉例來說,像 疋銀一類的金屬,以及函素(hal〇gen)、處化物The substance is practically insoluble in the ion conductor and is internally connected to the substance serving as the electrode 13G. 4 in two substances. It is suitable for miscellaneous Likou / Ί ,, knife, tungsten, (metal Slllcide), etc. White witches and metal oxide compounds The ion conductor 140 can be made of a substance that can conduct ions by applying a sufficient bias voltage. Substances suitable as the ionic conductor 14 () include high-molecular polymers. Among them: 6 sub-guides 2: semiconductor substances. In one embodiment of the present invention, -40% is composed of a chalcogenide substance. The ion conductor 140 may further include a conductive material I that has been dissolved and / or diffused. For example, the ion conductor 140 may include a solid solution that dissolves metal and / or metal ions. According to an embodiment of the present invention, the conductor 140 includes a metal and / or a metal dissolved in a sulfur-based compound glass. According to the present invention, the chalcogenide glass containing dissolved metals, AsxS, Ag, AsxSe, X-Ag, AsxTe, X-Ag, GexSe, X-Ag, A ^ Si-x-Ag, GexTe ^ x —Ag, AsxS, x—Cu, AsxSe, X-Cu,, 6 × 6l-x Cu, GexSebx-Cu, GexS, X-Cu, and GexTe, X—Ag, solid / valley fluid, where x is about 〇. · Between 1 and 0 · 5. Other sulfur-based compounds include silver, copper, combinations thereof, or similar materials. In addition, it can include a network modifier (ne t wor k mod i f i er), which can affect the mobility (m0bi 1 ity) when the sub- penetrating conductor 140. For example, metals such as osmium silver, and halogen,

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五、發明說明(12) (hal ide)、或者是氫等物質。可以加曾 加強離子流動性,從而增加結構在抹除V體1 4 〇上,用以 外,離子導體140可以包含複數個具有寫入的速度。此 域。舉例來說,離子導體1 40可以包含—同=抗數,的區 極的第一區域,其具有相當低的阻抗,固靠近可氧化電 電極的第二區域,其具有相當高的阻抗。一個靠近惰性 根據本發明的一個實施例’至少有—部分的結構1〇〇 疋在絕緣物質150的導孔(via)中形成。將—部分的社構 100形成在絕緣物質150的導孔(via)中有幾個好處其中 像是這樣的形成方式可以讓結構變得相當小,可以達到 lOnm的數量級。此外,絕緣物質150可隔絕多種結構1〇〇與 其他電子元件。 系巴緣物質1 5 0包含可避免結構1 0 0發生不必要的電子以 及/或者離子擴散。根據本發明的一個實施例,物質丨5 〇 包含氮化石夕(silicon nitride)、氮氧化石夕(silicon oxynitride)以及聚合物如聚亞醯胺(polyimide)、聚對苯 二甲基(parylene)或者是以上物質的組合。 接點1 6 5可以通電至一或多個電極1 2 〇、1 3 0,以促進 在個別的電極上形成電子接點。接點1 6 5可以利用任何導 電物質形成,最好是金屬、合金或者是包含铭 (aluminum)、鶴(tungsten)或銅(copper)的組合。5. Description of the invention (12) (hal ide), or hydrogen and other substances. The ion mobility may be enhanced to increase the structure on the erased V body 140. In addition, the ion conductor 140 may include a plurality of write speeds. This domain. For example, the ionic conductor 140 may include a first region of a region having the same impedance, which has a relatively low impedance, and a second region fixed to the oxidizable electrode, which has a relatively high impedance. A near inertia according to an embodiment of the present invention 'at least a part of the structure 1001 is formed in a via of the insulating substance 150. Forming a part of the social structure 100 in the vias of the insulating material 150 has several advantages. Among them, the formation method can make the structure relatively small, which can reach the order of lOnm. In addition, the insulating material 150 can isolate various structures 100 from other electronic components. The tidal margin material 150 contains unnecessary electrons and / or ion diffusions that can prevent the structure 100 from occurring. According to an embodiment of the present invention, the substance 5 includes silicon nitride, silicon oxynitride, and polymers such as polyimide and parylene. Or a combination of the above. Contacts 1 65 can be energized to one or more electrodes 120, 130 to facilitate the formation of electronic contacts on individual electrodes. The contacts 1 6 5 can be formed using any conductive material, preferably a metal, an alloy, or a combination containing aluminum, tungsten or copper.

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五、發明說明(13) 操縱可程式結構的一或多種電子特性,可用來儲存資 訊。舉例來說,在寫入過程中結構的阻抗可以從「〇」戒 關閉狀態變成「丨」或導通狀態。同樣地,裝置在抹除過 程中可以⑼「1」變成「〇」。此外,女口同美國專利案申請 案號1 0/268, 1 0 7中所述,結構可擁有多重可程式狀態,在 單一結構中儲存多位元的資訊。 寫入過程 圖3所示為本發明所揭示的一種可程式結構,例如結 構2 0 0的電流—電壓特性表。在圖示的結構中,導孔直徑卩 大約4微米(micron),導體140大約35nm厚,由Ge3Se7-Ag (接近A gs G es S e?)構成。電極1 3 0為惰性電極,由锦 (nickel)組成,電極120由銀組成。而障壁層255是原始的 氧化鎳(native nickel oxide)。如圖3所示,當施加超過 1 V的電壓於關閉狀態下的結構200時,電流開始增加。不 過當寫入過程執行後,也就是有電沈積物產生,導體14〇 的阻抗會大幅降低至2 0 0 Ω,如圖3的曲線3 2 0所示。如上所 述,當電極1 30連接到一個電源供應器較負的一端。此為 相較於電極1 2 0而言,接近電極1 3 0的地方會形成導電區域 (conductive region),並且朝電極120成長。有效的臨界 電壓(threshold voltage),也就是能夠成長導電區域, 並且打穿障壁層255讓電極120與130導電的電壓,是相當 南的。尤其是電壓V — VT必須施加在結構2 0 0上,讓電子可5. Description of the invention (13) Manipulating one or more electronic characteristics of a programmable structure can be used to store information. For example, the impedance of the structure can be changed from "0" or off to "丨" or on during the writing process. Similarly, the device can change "1" to "0" during the erasing process. In addition, as described in U.S. Patent Application No. 10/268, 107, the structure can have multiple programmable states and store multiple bits of information in a single structure. Writing Process FIG. 3 shows a programmable structure disclosed in the present invention, such as a current-voltage characteristic table of the structure 200. In the structure shown, the diameter of the via hole is about 4 microns (micron), the conductor 140 is about 35 nm thick, and is made of Ge3Se7-Ag (close to Ags Ges Se?). The electrode 130 is an inert electrode composed of nickel, and the electrode 120 is composed of silver. The barrier layer 255 is native nickel oxide. As shown in FIG. 3, when a voltage exceeding 1 V is applied to the structure 200 in the off state, the current starts to increase. However, when the writing process is performed, that is, when an electrodeposition is generated, the impedance of the conductor 14 will be greatly reduced to 200 Ω, as shown in the curve 3 2 0 in FIG. 3. As described above, when the electrode 130 is connected to the negative end of a power supply. This is compared to the electrode 120, where a conductive region is formed near the electrode 130 and grows toward the electrode 120. The effective threshold voltage, that is, the voltage that can grow a conductive region and penetrate the barrier layer 255 to make the electrodes 120 and 130 conductive, is quite south. In particular, the voltage V — VT must be applied to the structure 2 0, so that electrons can

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五、發明說明(14) 以形成導電區域。並藉 導通導體140與至少一 以穿透由絕緣層組成的障壁層2 5 5 由穿透或漏電的方式通過障壁層 部分的障壁層2 5 5。 、發明的另一個實施例,如果沒有絕緣層存在的 治,要啟動寫入過程所需的電壓就會相當低。 離子V體1 4 0與電極1 2 〇或1 3 0任一個之間,沒有5 關係。 α有緣層的 如上所述,要改變本發明中記憶體結構的相對揮發 性,可利用在寫入過程中,施加不同的能量在 ^ j。舉例來說,以數百„^的高電流脈衝施加於圖】和圖2的 …構上約數百ns的時間,可以形成相當非揮發性的記情 細胞匕另外,同樣的電流也可以加在同樣或相似的:構 十二右時間較短,如數個ns,可以形成具有相當揮發性的 記憶體結構。在任一種情況下,本發明的記憶體可以高速 程式化,即使是揮發性的記憶體還比傳統的⑽.更具非揮 發性。舉例來說,揮發性記憶體的操作速度與⑽龍相仿, 但是只需要數個小時更新一次。 讀取過程 要δ買取§己憶體細胞元的狀態,如「〇」或「1」而不會 明顯的干擾到原來的狀態’可以施加正向或反向的偏壓, 大小比形成電沈積物的臨界電壓要低,比如說圖3中的結 200301896 五、發明說明(15) 構約需1 · 4V。或者是通過低於或等於程式化電流最低限度 的電流’電流會產生最高的導通阻抗值。具有約1 m A電流 限制的讀取操作過程示於圖3。在這個情況下,電壓會從〇 升到2 V ’而電流會在電壓從〇至〇 · 2 v時,上升到電流限 制’代表達到了一個低阻抗(歐姆/線性電壓—電流)的 導通狀態。另一個不會干擾記憶體狀態的讀取方法是施加 脈衝’時間要相當短。而電壓會比電化學沈積法所需的臨 界電疋要南’以免產生可感知的法拉第電流(Faradaic cuirirent il〇w),也就是說幾乎所有的電流都會跑去極化 /充電(polarizing/charging)裝置而不會形成電沈積 物0 根據本發明的不同實施例,具有可程式結構的電路包 含 /皿度補償裝置(temperature compensation device), 用以抵銷温度變化對可程式裝置的效能的影響。一個溫度 補償電路的例子包含一個可程式結構,具有已知的抹除狀 態。在本例中,於讀取過程中,同時對具有未知狀態的可 程式結構和具有已知的抹除狀態的可程式結構施以逐漸增 加的電壓。如果未知結構是處於寫入的狀態,那麼此未= 結構會在已知抹除裝置導通前先行導通。若此未知結構係 處於抹除的狀態,兩個裝置將會在差不多的時間導通。另 外,溫度補償電路可用來製造一比較電壓或電流 ',在讀取 過程中和未知狀態的可程式結構所產生的電壓或電流=比 較05. Description of the invention (14) to form a conductive region. Then, the conducting conductor 140 and at least one barrier layer 2 5 5 formed by penetrating or leaking through the barrier layer 2 5 5 composed of the insulating layer are passed through the barrier layer 2 5 5. In another embodiment of the invention, if no insulation layer exists, the voltage required to start the writing process will be quite low. There is no 5 relationship between the ion V body 140 and any of the electrodes 120 or 130. As described above for the α-bounded layer, to change the relative volatility of the memory structure in the present invention, different energy can be applied during the writing process. For example, applying a high current pulse of several hundred ^^ to the graph] and the structure of Fig. 2 for about several hundred ns can form a fairly non-volatile memory cell. In addition, the same current can also be applied In the same or similar: the structure of the twelve right time is short, such as several ns, can form a relatively volatile memory structure. In any case, the memory of the present invention can be programmed at high speed, even volatile memory The body is also more non-volatile than traditional pupae. For example, the volatile memory operates at a speed similar to that of the dragon, but only needs to be updated once a few hours. The reading process requires δ to buy § memory cells State, such as "0" or "1" without significantly interfering with the original state. "Forward or reverse bias can be applied, and the magnitude is lower than the threshold voltage for electrodeposition, as shown in Figure 3. 200200301896 V. Description of the invention (15) The structure needs about 1.4V. Or, a current 'that is lower than or equal to the minimum programmed current will produce the highest on-resistance value. The read operation process with a current limit of about 1 m A is shown in FIG. In this case, the voltage will rise from 0 to 2 V and the current will rise to the current limit when the voltage is from 0 to 0.2 V. It means that a low impedance (ohm / linear voltage-current) conduction state is reached . Another method of reading without disturbing the state of the memory is to apply the pulse 'for a relatively short time. The voltage will be lower than the critical voltage required by the electrochemical deposition method, so as not to generate a sensible Faradaic cuirirent ilw, which means that almost all the current will run to polarizing / charging ) Device without forming electrodeposition. According to different embodiments of the present invention, a circuit with a programmable structure includes a temperature compensation device to offset the effect of temperature changes on the performance of the programmable device. . An example of a temperature compensation circuit includes a programmable structure with a known erase state. In this example, during the reading process, a gradually increasing voltage is applied to the programmable structure having an unknown state and the programmable structure having a known erasing state at the same time. If the unknown structure is in the writing state, then this non- = structure will be turned on before the known erasing device is turned on. If the unknown structure is in the erased state, the two devices will be turned on in about the same time. In addition, the temperature compensation circuit can be used to make a comparison voltage or current ', the voltage or current generated during the reading process and the programmable structure of unknown state = compare 0

第19頁 五、發明說明(16;) 抹除過程 可程式結構如結構2 00可藉由在穹 偏壓來抹除。而所施加偏壓的 寫入過程中施以反向 壓大小相同或更大 σ _ 4 t 用來形成電沈積物的電 X更大’只不過極性相反。 贫施例’足量的抹除電抑 二=發明的-個 2二上。時間長短與寫入過程中施==施加,結構 於1ms,讓結構2㈣回 的此里有關,一般少 (Ω)。在可程式 含二,二抗值超過m萬歐姆 之間的障壁層時,用夹枝^4層位於導體140與電極120 寫入所需的臨界電塵狀態的臨界電屢會遠小於 壁層或讓障壁層崩潰。."、未除過程不需要讓電子穿透障 控制操作 在離 式結構加 導電物質 銀一類的 之一力口入 即可。因 應用需求 壓可以從 加反向偏 電極上的 參數 子導體中 以控制。 的還原電 金屬從溶 離子導體 此,舉例 ’就可以 可氧化電 壓的時間 過量金屬 度可藉由施 溶液中施加 potential 之,導電物 電壓超過物 電物質濃度 促成還原。 金屬離子。 除偏壓可有 適當的微處 的導電物質濃 舉例來說,在 位(reduction 液中取出。反 ’只要施加的 來說,如果導 施加反向偏壓 極提供更多的 或者是增加抹 。我們可利用 加偏壓於可程 的負電壓超過 ),就可以將 質可以從電極 質的氧化電壓 高於裝置特殊 而施加正向偏 此外,延長施 效去除在惰性 理器來自動控 200301896Page 19 V. Description of the invention (16;) Erase process Programmable structures such as structure 200 can be erased by biasing the dome. The reverse voltage applied during the writing process of the applied bias voltage is the same or larger σ _ 4 t, which is used to form the electrodeposited electrode, is larger, but the polarity is opposite. Poor Example 'A sufficient amount of erasure suppression 2 = Invented-2 2 on. The length of time is related to the application of == application during the writing process, the structure is 1ms, and the structure 2 is returned here, generally less (Ω). When the programmable barrier layer with a secondary and secondary impedance value exceeding m 10,000 ohms is used, the critical electricity of the critical electric dust state required for writing by the conductor 140 and the electrode 120 with the clamp ^ 4 layer is often much smaller than the wall layer Or make the barrier layer collapse. . " The unremoved process does not need to let the electron penetrate the barrier. The control operation can be done by adding a conductive substance such as silver to the ionized structure. Due to application requirements, the voltage can be controlled from the parameter subconductor on the reverse bias electrode. The reduction of the metal from the dissolved ionic conductor. For example, it can be used to oxidize the time of the voltage. The excess metal can be applied to the solution by applying a potential. The voltage of the conductive material exceeds the concentration of the material to promote reduction. Metal ion. In addition to the bias voltage, there can be a suitable micro-concentration of the conductive material. For example, the in-situ (reduction solution) is taken out. Conversely, as long as it is applied, if the reverse bias voltage is applied to provide more or increase wipe. We can use a bias voltage that can be applied to the negative voltage of the process to exceed), you can change the quality of the electrode from the oxidation voltage of the electrode is higher than the special device and apply a positive bias. In addition, extend the effect and remove the inertia to automatically control the 200301896.

五、發明說明(17) 制導電物質 的合㈣施例中, 以利用,比如說,上述的寫Λ 4^ J 制臨界電壓可以調整可程式裝 除私序來加以控制。控 讀取或寫入電壓。一般來:衣f:使其符合使用者想要的 物質在離子導體以及/咬:任;;所述,臨界電壓與導電 的因素都有關係。者任何障壁層内的量,以及其他 圖4所示為一部分的積體電路4〇2,其中包含可程 構400,用來提供額外的電子元件隔絕作用。根據本發明° 的一個實施例,結構400包含電極42〇與43(),離子導體 440,接點460以及介於接點46〇與電極42〇間的非結晶 二體二像是㈣,或"接…體。可程式化結; 、订/、列可做成兩密度的組態,用以提供記憶體電路 =的極大儲存容量。一般來說’記憶體裝置的最大儲存 搶度文限於行列解碼器電路(row/coliimn dec〇dei· C1^ClLltry)大小與複雜性。不過,可程式結構儲存堆疊可 以覆盍在積體電路之上,這樣結構4〇〇不會佔去基座的空 間’可將整個半導體晶片面積用在行/列解碼、咸測放大 器以及資料管理電4 (未顯示)的功能。如此, 可程式結構可以達到每平方公分數個⑽汕… 二而可·式結構實⑤上可視為附加的技術,在 見有〇牛-脰積體電路技術上添增功能與容量。V. Description of the Invention (17) In the combined embodiment of making conductive materials, for example, the above-mentioned threshold voltage of Λ 4 ^ J can be adjusted by programming and private sequence to be controlled. Control read or write voltage. Generally speaking: clothing f: make it meet the user's desire substance in ionic conductor and / bite: any; said that the critical voltage has a relationship with the factors of conductivity. The amount in any of the barrier layers, among others, is shown in Figure 4 as a part of the integrated circuit 402, which includes a programmable 400 to provide additional isolation of electronic components. According to an embodiment of the present invention, the structure 400 includes electrodes 42o and 43 (), an ion conductor 440, a contact 460, and an amorphous two-body dimer between the contact 46o and the electrode 42o. " Then ... body. Programmable knots;, order /, rows can be made into a two-density configuration, to provide the maximum storage capacity of the memory circuit =. Generally speaking, the maximum storage latency of a 'memory device' is limited to the size and complexity of the row / column decoder circuit (C1 ^ ClLltry). However, the programmable structure storage stack can be overlaid on the integrated circuit so that the structure 400 will not take up the space of the base. 'The entire semiconductor chip area can be used for row / column decoding, test amplifiers and data management Power 4 (not shown) function. In this way, the programmable structure can reach ⑽shan per square centimeter ... Secondly, the structure of the real structure can be regarded as an additional technology, and the function and capacity are added to the technology of the circuit of 0N- 脰 integrated circuit.

第21頁 200301896 五、發明說明(18) ^ 圖5繪示出記憶體裝置的一部分,其中結構4〇〇擁有獨 立的p - η接面二極體4 7 0,位於記憶體電路的位元線(b 土七 line)510與字元線(word line) 520的交叉處。圖6所示為 另一隔絕方式,係採用介於電極與可程式結構的接點 (con tact )之間的電晶體6 1 〇,可程式結構在記憶體裝置的 位元線610與字元線620的交叉處。 、 圖7所示為一示範電路700,用以改變如圖1、2及4所 示之可程式裝置等微電子裝置之電子特性。一般來說,電 路700可用來提供充足、可逆的壓降於可程式結構上,以 執行上述之寫入和抹除功能。 電路700包含第一輸入702耦合至可程式裝置7〇6之第 一區域704,第二輸入710耦合至第一開關712與第二開關 7 1 4 ’電壓源71 6耗合至開關71 4,而接地71 8搞合至開關 712。在本實施例中,裝置7〇6的第二區域7〇8耦合至第一 開關與第一開關。根據本實施例的一個示範情況,開關 712和開關714形成一個互補金氧半導體(CMOS)裝置。其中 開關714為!)通道(p — channei)電晶體,而開關712為^通道 (η-channel)半導體。CM0S裝置的輸出72〇耦合至可程式装 置70 6的第二區域7〇8。在本例中,輸入71〇係耦合至p通道 電晶體和η通道電晶體的閘級(gate)。開關71 2和714組成 一部份的CMOS裝置,可以讓讀取和寫入操作所消耗的功率Page 21 20031896 V. Description of the invention (18) ^ Figure 5 shows a part of a memory device, in which the structure 400 has an independent p-η junction diode 4 70, which is located in the bit of the memory circuit. The intersection of line (b 土 七 line) 510 and word line 520. FIG. 6 shows another isolation method, which uses a transistor 6 1 0 between an electrode and a programmable contact (con tact). The programmable structure is in bit line 610 and characters of the memory device. Intersection of line 620. Fig. 7 shows an exemplary circuit 700 for changing the electronic characteristics of a microelectronic device such as a programmable device as shown in Figs. Generally, the circuit 700 can be used to provide a sufficient, reversible voltage drop on a programmable structure to perform the write and erase functions described above. The circuit 700 includes a first input 702 coupled to a first region 704 of a programmable device 706, and a second input 710 coupled to a first switch 712 and a second switch 7 1 4 '. The voltage source 71 6 is coupled to the switch 71 4. The ground 71 8 is connected to the switch 712. In this embodiment, the second region 708 of the device 706 is coupled to the first switch and the first switch. According to an exemplary case of this embodiment, the switches 712 and 714 form a complementary metal-oxide-semiconductor (CMOS) device. The switch 714 is a p-channei transistor, and the switch 712 is a n-channel semiconductor. The output of the CMOS device 72 is coupled to the second area 708 of the programmable device 706. In this example, input 71 is coupled to the gate of the p-channel transistor and the n-channel transistor. Switches 71 2 and 714 form part of a CMOS device that allows the power consumed by read and write operations

第22頁 200301896 五、發明說明(19) 相當低,同時讓電路7 0 0易於製造。在本實施例的另一情 況下。P通道電晶體7 1 4可以換成一個被動負載,比如說電 阻(多晶矽電阻)或一個主動負載(比如空乏模式 (depletion mode)的M0S電晶體)。同樣地,如上所述, 此CMOS裝置可以形成在基座,比如說基座11〇内,而可程 式裝置706可覆蓋於基座之上。 在操作中,當可程式裝置7 0 6係處於非寫入或抹除狀 態,且有一低電壓,比如說0V的電壓施加在輸入7〇2與71 〇 上,裝置70 6的惰性電極(區域7〇8 )相較於可溶解電極 (區域7 0 4 )係處於正偏壓。在這個狀態下,將不會發生 寫入的動作。當有正電壓,大約接近5V的正電壓(5V一一 near +V)施於輸入70 2與710上,區域7〇8的電壓將會降至 大約0V。只要輸入端702的正電壓夠大,讓壓降超過寫入 臨界電壓,差不多20 0至30 0mV,電路700將會對裝置7〇6執 行上述的寫入功能。如果要抹除裝置7〇6,可以施加約〇v 的低電壓於輸入702與710上,讓裝置7〇6的區域7〇8相較於 裝置706的區域704為正偏壓。另外,相反極性的電壓也可 施加在輸入702與710上,以達到上述的寫入和抹除功能。 圖8所示為本發明另一實施例中的電路8〇〇,係用來程 式化可程式結構。電路800與電路7 〇〇相似,除了電路8〇〇 僅包含一個單一輸入802,並額外地包含一選擇輸入8〇4和 開關8 0 6,用以啟動讀取或寫入功能。Page 22 200301896 V. Description of the invention (19) is quite low, while making the circuit 700 easy to manufacture. In another case of this embodiment. The P-channel transistor 7 1 4 can be replaced with a passive load, such as a resistor (polycrystalline silicon resistor) or an active load (such as an M0S transistor in depletion mode). Similarly, as described above, the CMOS device may be formed in a base, such as the base 110, and the programmable device 706 may be covered on the base. In operation, when the programmable device 706 is in a non-writing or erasing state and has a low voltage, for example, a voltage of 0V is applied to the inputs 702 and 71, the inert electrode (area of the device 706) 708) compared to the soluble electrode (area 704) is at a positive bias. In this state, no writing will occur. When there is a positive voltage, a positive voltage close to 5V (5V-near + V) is applied to the inputs 70 2 and 710, and the voltage in the area 708 will drop to about 0V. As long as the positive voltage at the input 702 is large enough to allow the voltage drop to exceed the write threshold voltage, approximately 200 to 300 mV, the circuit 700 will perform the write function described above for the device 706. If the device 706 is to be erased, a low voltage of about 0v can be applied to the inputs 702 and 710, so that the area 708 of the device 706 is positively biased compared to the area 704 of the device 706. Alternatively, voltages of opposite polarity can be applied to inputs 702 and 710 to achieve the write and erase functions described above. FIG. 8 shows a circuit 800 in another embodiment of the present invention, which is used to program a programmable structure. The circuit 800 is similar to the circuit 700 except that the circuit 800 includes only a single input 802, and additionally includes a selection input 800 and a switch 806 for activating a read or write function.

200301896 五、發明說明(20) 在電路800操作中,施加_適當的偏壓,比如說丄至^ 的正電壓(1/0 5V ~ near +v)於輸入8〇4以導通開關 巧6,可執行寫人或抹除的功能。㈣關8〇6在本發明的圖示 實施例中為M0S電晶體。一旦啟動後,施加高電愿,比如 况1至5V的正電壓(1 t0 5V — near +v)於輸入8〇2,可執 行寫入的功能。而施加低電壓,大約〇v的電壓於輸入8〇2 可執行抹除的功能。在寫入過程中,裝置7〇6的阻抗备降 低。這個現象可用來限制程式化效應,因為隨著程式化過 程的進行,輸入802處的電壓會被拉低。 圖9所示為本發明的另一電路9〇〇。電路9〇〇與電路 相似,除了可程式結構706相對於輸入8〇2的方向相反。在 這個例子中,施加一低電壓於輸入8〇2會產生寫入的動 作,而施加高電壓於輸入8〇2會產生抹除的動作。 圖ίο所不為包含複數個可程式裝置1002至1〇〇6之電路 1 00 0。電路1 00 0可形成記憶體陣列的一部分,比如說陣列 的某一行的一部分。電路1 0 0 0與電路8〇〇相似,除了電路 1 00 0包含複數個選擇輸入1 0 08至1012,複數個可程式裝 置,以及複數個選擇開關,比如說恥S電晶體1 〇 u至 101 8。根據本發明的一個實施例,單一可程式裝置可藉由 導通相關的選擇開關,進行讀取或寫入的操作。200301896 V. Description of the invention (20) In the operation of the circuit 800, an appropriate bias voltage is applied, for example, a positive voltage of 丄 to ^ (1/0 5V ~ near + v) is input to 804 to turn on the switch. Performs writing or erasing functions. Tongguan 806 is a MOS transistor in the illustrated embodiment of the present invention. Once started, a high voltage is applied, for example, a positive voltage of 1 to 5V (1 t0 5V — near + v) is applied to the input 802 to perform the write function. When a low voltage is applied, a voltage of about OV is applied to the input 802 to perform the erasing function. During the writing process, the impedance of the device 706 decreases. This phenomenon can be used to limit the stylization effect, as the voltage at input 802 will be pulled low as the stylization process proceeds. FIG. 9 shows another circuit 900 of the present invention. The circuit 900 is similar to the circuit except that the programmable structure 706 is in the opposite direction with respect to the input 802. In this example, applying a low voltage to input 802 will cause a write operation, while applying a high voltage to input 802 will cause an erase operation. Figure ο is not a circuit including a plurality of programmable devices 1002 to 1006. The circuit 100 0 may form part of a memory array, such as part of a certain row of the array. The circuit 1 0 0 0 is similar to the circuit 8 0, except that the circuit 1 0 0 0 includes a plurality of selection inputs 1 08 to 1012, a plurality of programmable devices, and a plurality of selection switches, for example, a S transistor 1 0 u to 101 8. According to an embodiment of the present invention, a single programmable device can perform a read or write operation by turning on a relevant selection switch.

第24頁 200301896 五、發明說明(21) 儘管本發明已經配合所附圖示加以說明,但是要注意 的是本發明並不限制於此處所示的特定型態。舉例來說, 雖然在程式電路中以M0S電晶體作為開關,但是本發明並 不在此限。本發明所用的電路可以附加或以雙載子電晶體 (bipolar transistor)或是類似的元件來形成圖示中的開 關。熟悉此技藝者可根據此處所載之說明,在不違背本發 明所載的專利申請範圍之精神與範轉的情況下,針對設計 以及方法與裝置的安排,做各種其他修正、變化或加強。Page 24 200301896 V. Description of the invention (21) Although the present invention has been described in conjunction with the accompanying drawings, it should be noted that the present invention is not limited to the specific form shown here. For example, although a MOS transistor is used as a switch in a program circuit, the present invention is not limited thereto. The circuit used in the present invention can be added with a bipolar transistor or a similar element to form a switch in the figure. Those skilled in the art can make various other amendments, changes or enhancements to the design and arrangement of methods and devices without departing from the spirit and scope of the scope of the patent application contained in the present invention, according to the description contained herein. .

第25頁 200301896 圖式簡單說明 五、【圖式簡單說明】 有關本發明的進一步說明將在接 請專利範圍令逐次闊述,並搭配相關的圖示與申 中類似的參考數字圖示中類似的元件,其令: 其 圖1、2與4係本發明中形成於一基座表 截面圖示; ®的了長式結構的 圖3係電流—電壓圖,係用來繪示本發明所 電流與電壓特性; 丁的衣置的 及與6係本發明的一個實施例中的記憶體裝置的—部份; 圖7至10係本發明所揭示之程式電路。 :亡二藝者可以了解圖中元件係以簡單 埜、’ 定依照實際的尺寸比例繪示。舉例來—兒’ 某些元件的尺寸可w 4 & * * 牛1巧不况,圖中 種實施例。 “父為耗大,以協助了解本發明的各 元件符號說明 110基座 11 4區域 1 3 0、4 3 0 電極 1 5 0絕緣物質 1 6 0區域 402積體電路 I 0 0、2 0 0、4 0 0 結構 II 2絕緣物質 1 2 0、4 2 0 電極 140、440離子導體 1 5 5、2 5 5 區域 1 6 5接點 200301896 圖式簡單說明 4 6 0接點 5 1 0位元線 6 1 0電晶體 6 2 0字元線 702第一輸入 706可程式裝置 710第二輸入 7 1 4第二開關 7 1 8接地 800電路 804選擇輸入 9 0 0電路Page 25, 20031896 Brief description of the drawings V. [Simplified description of the drawings] Further explanation of the present invention will be expounded one by one in the scope of the patent application, and the related figures are similar to those in the reference numbers 1, 2 and 4 are cross-sectional diagrams formed on the surface of a base in the present invention; Figure 3 is a current-voltage diagram with a long structure, which is used to illustrate the invention. Current and voltage characteristics; Ding's clothing and 6 parts of the memory device in one embodiment of the present invention; Figures 7 to 10 are program circuits disclosed in the present invention. : Dead artists can understand that the components in the figure are shown in simple field and are determined according to the actual size ratio. By way of example-the size of certain elements may be w 4 & "The father is expensive to help understand the symbols of the components of the present invention 110 base 11 4 area 1 3 0, 4 3 0 electrode 1 5 0 insulating material 1 6 0 area 402 integrated circuit I 0 0, 2 0 0 , 4 0 0 Structure II 2 Insulating material 1 2 0, 4 2 0 Electrodes 140, 440 Ion conductors 1 5 5, 2 5 5 Area 1 6 5 contact 200301896 Simple illustration of the diagram 4 6 0 contact 5 1 0 bit Line 6 1 0 transistor 6 2 0 character line 702 first input 706 programmable device 710 second input 7 1 4 second switch 7 1 8 ground 800 circuit 804 select input 9 0 0 circuit

1 0 0 2、1 0 0 4、1 0 0 6 可程 1 008、1010、1012 選擇 1014 、 1016 、 1018 MOS 4 7 0二極體 5 2 0字元線 6 1 5位元線 7 0 0示範電路 704第一區域 708第二區域 7 1 2第一開關 7 1 6電壓源 720輸出 802單一輸入 806開關 1 00 0電路 式裝置 輸入 電晶體1 0 0 2, 1 0 0 4, 1 0 0 6 Programmable 1 008, 1010, 1012 Select 1014, 1016, 1018 MOS 4 7 0 Diode 5 2 0 Word line 6 1 5 Bit line 7 0 0 Demonstration circuit 704 first region 708 second region 7 1 2 first switch 7 1 6 voltage source 720 output 802 single input 806 switch 1 0 0 0 circuit type device input transistor

第27頁Page 27

Claims (1)

200301896 六、申請專利範圍 1. 一電路,用以程式化一微電子記憶體裝置 (microelectronic memory device),該電路包含·· 一第一輸入耦合至該記憶體裝置之一第一區域; 一第二輸入耦合至一第一開關與一第二開關,該第一 開關耗合至一電壓源(vol tage source),而該第二開關耦 合至接地(ground);以及 一第二輸入耦合至該第一開關與該第二開關, 其中該電路係用以提供一第一偏壓(bias)與一第二偏 壓給該記憶體裝置,其中該第一偏壓的極性與該第二偏壓 的極性相反。 2·如申請專利範圍第1項所述之電路,其中該第一開關與 第二開關形成一CMOS裝置。 3·如申請專利範圍第2項所述之電路,其中該CMOS裝置之 一輪出係耦合至該記憶體裝置之一第二區域。 4 ·如申請專利範圍第1項所述之電路,其中該記憶體裝置 包含一第一電極、一第二電極以及介於該第一電極與該第 二電極之間的一離子導體(ion conductor)。 5 ·如申請專利範圍第4項所述之電路,其中該離子導體包 s 一硫系化合物(c h a 1 c 〇 g e n i d e)物質。200301896 VI. Scope of patent application 1. A circuit for programming a microelectronic memory device, the circuit includes a first input coupled to a first region of the memory device; a first Two inputs are coupled to a first switch and a second switch, the first switch is dissipated to a voltage source, and the second switch is coupled to ground; and a second input is coupled to the A first switch and a second switch, wherein the circuit is used to provide a first bias and a second bias to the memory device, wherein the polarity of the first bias and the second bias The polarity is opposite. 2. The circuit according to item 1 of the scope of patent application, wherein the first switch and the second switch form a CMOS device. 3. The circuit according to item 2 of the scope of the patent application, wherein a round out of the CMOS device is coupled to a second region of the memory device. 4. The circuit according to item 1 of the scope of patent application, wherein the memory device includes a first electrode, a second electrode, and an ion conductor interposed between the first electrode and the second electrode. ). 5. The circuit as described in item 4 of the scope of the patent application, wherein the ionic conductor includes s-sulphur compound (c h a 1 c 0 g e n i d e) substance. 第28頁 200301896 六、申請專利範圍 6· —電路,用以可逆地(reversibly)改變一微電子裝置之 一電子特性,該電路包含: 寫入輸入(write input)耦合至該微電子裝置之一 第一區域; 一選擇開關(select switch)耦合於該寫入輸入與言亥 微電子裝置之第一區域之間; ” 一第一開關耦合至該寫入輸入與一電壓源;以及 一第二開關耗合至該寫入輸入與接地(ground), 其中該第一開關與該第二開關耦合至該微電子裝置之 一第二區域,以及 其中該電路係用以提供一第一偏壓(bias)與一第二偏 壓給該微電子裝置,其中該第一偏壓的極性與該第二偏壓 的極性相反。 7·如申請專利範圍第7項所述之電路,其中該第一開關與 第一開關形成一 C Μ 0 S裝置。 8 ·如申請專利範圍第7項所述之電路,其中該選擇開關包 έ 電晶體(transistor)。 9 ·如申請專利範圍第6項所述之電路,其中該微電子裝置 包含一離子導體物質,係選自以下的族群:玻璃 (glass)、半導體物質(semiC〇nductor material)、硫系 化合物(chalcogenide)物質以及高分子聚合物(Polymer)Page 28, 20031896 6. Application for Patent Scope 6 · — A circuit for reversibly changing the electronic characteristics of a microelectronic device, the circuit comprising: a write input coupled to one of the microelectronic devices A first region; a select switch is coupled between the write input and the first region of the Yanhai microelectronic device; a first switch is coupled to the write input and a voltage source; and a second A switch is coupled to the write input and ground, wherein the first switch and the second switch are coupled to a second region of the microelectronic device, and wherein the circuit is configured to provide a first bias voltage ( bias) and a second bias voltage to the microelectronic device, wherein the polarity of the first bias voltage is opposite to the polarity of the second bias voltage. 7. The circuit according to item 7 of the scope of patent application, wherein the first The switch and the first switch form a C M 0 S device. 8 · The circuit described in item 7 of the scope of patent application, wherein the selection switch includes a transistor. 9 · As described in item 6 of the scope of patent application Of Road, wherein the microelectronic device comprises an ion conductive material, selected from the following group: glass (Glass), a semiconductor material (semiC〇nductor Material's), sulfur-based compound (Chalcogenide) material and polymer (Polymer) 200301896 六、申請專利範圍 物質。 1 0.如申請專利範圍第6項所述之電路,其中該第一區域包 含可溶性電極物質。 11.如申請專利範圍第6項所述之電路,其中該第二區域包 含惰性電極物質。200301896 VI. Patent Application Substances. 10. The circuit according to item 6 of the scope of patent application, wherein the first region contains a soluble electrode substance. 11. The circuit according to item 6 of the scope of patent application, wherein the second region contains an inert electrode substance. 1 2.如申請專利範圍第6項所述之電路,其中該第一區域包 含惰性電極物質。 1 3.如申請專利範圍第6項所述之電路,其中該第二區域包 含可溶性電極物質。 1 4.如申請專利範圍第6項所述之電路,進一步包含複數個 微電子裝置耦合至該第一開關與該第二開關。1 2. The circuit according to item 6 of the scope of patent application, wherein the first region contains an inert electrode substance. 1 3. The circuit according to item 6 of the scope of patent application, wherein the second region contains a soluble electrode substance. 1 4. The circuit according to item 6 of the scope of patent application, further comprising a plurality of microelectronic devices coupled to the first switch and the second switch. 1 5.如申請專利範圍第1 4項所述之電路,進一步包含複數 個選擇開關耦合至該寫入輸入。 1 6. —用以程式化一可程式結構之電路,該電路包含·· 一寫入輸入(write input)搞合至該結構之一第一區 域; 一CMOS電晶體,該CMOS電晶體之一輸出耦合至該結構15. The circuit as described in item 14 of the patent application scope further comprising a plurality of select switches coupled to the write input. 1 6. —A circuit for programming a programmable structure, the circuit includes ... a write input to a first region of the structure; a CMOS transistor, one of the CMOS transistors Output is coupled to the structure 第30頁 200301896 六、申請專利範圍 之一第二區域與該寫入輸入;以及 一選擇電晶體(select transistor)搞合於該寫入輸 入與該可程式結構之間,其中該可程式結構包含一離子導 體與分佈於該離子導體内之傳導物質(conductive material) ° 1 7.如申請專利範圍第1 6項所述之電路,進一步包含複數 個可程式結構耦合至該CMOS電晶體之輸出。Page 30, 20031896 VI. A second area of the patent application and the write input; and a select transistor fits between the write input and the programmable structure, wherein the programmable structure includes An ionic conductor and a conductive material distributed in the ionic conductor ° 1 7. The circuit described in item 16 of the scope of patent application, further comprising a plurality of programmable structures coupled to the output of the CMOS transistor. 1 8.如申請專利範圍第1 6項所述之電路,進一步包含複數 個選擇電晶體耦合至該寫入輸入。 1 9.如申請專利範圍第1 6項所述之電路,其中該選擇電晶 體係一M0S電晶體。1 8. The circuit as described in item 16 of the patent application scope, further comprising a plurality of select transistors coupled to the write input. 19. The circuit according to item 16 of the scope of patent application, wherein the selection transistor system is a MOS transistor. 第31頁Page 31
TW92100098A 2002-01-03 2003-01-03 Programming circuit for a programmable microelectronic device, system including the circuit, and method of forming the same TWI260629B (en)

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