SU953703A2 - Multi-channel programmable pulse generator - Google Patents

Description

(5) MULTI-CHANNEL PROGRAMMABLE GENERATOR The invention relates to an automatic computer technology. According to the main author. St. No. 860293 is known a multichannel programmable pulse generator, having in its composition a reference generator, a frequency connected to a period former, and pulse shaping channels, each of which contains two triggers, two controllable keys, a counter, a reference comparison, a memory unit, and an account control unit . At the same time, the outputs of the reference frequency generators and the period former through the account control unit of each channel are connected to the counter input, the outputs of which are connected to the first inputs of the comparison unit, the second inputs of which are connected to the outputs of the memory block; the outputs of the controlled keys are separately connected to the inputs of the first trigger, the first inputs of the keys are combined and connected to the output of the comparison unit, and the second inputs are separated

Claims (1)

PULSES are connected to the outputs of the second trigger, the first input of which is connected to the output of the period former, the second to the output of the first key and the additional input of the control unit, the count, and the output of the additional trigger connected to the first key of the comparison unit. In a well-known multi-channel programmable pulse generator, each of the formation channels produces a pulse with predetermined parameters of the leading edge of the pulse (delay) relative to the pulse produced by the period former. and the position of the trailing edge of the pulse relative to the leading edge (duration). In this case, the pulses are produced in each period of the pulse of the period former. The known device provides high accuracy in the formation of pulses, which makes it possible to use it in devices and systems of functional and parametric control of memory devices of logic integrated circuits and simple digital devices of computers. However, the functionality of a known generator is limited due to the fact that it does not provide for the formation of pulses with time parameters of delay and duration longer than the duration of the pulse following period from the period generator, i.e. It has a limited range of programming for both delays and durations, and this range is limited by the length of the pulse following period from the period generator. This circumstance prevents the use of a known generator for circuits whose control requires the formation of pulse sequences in a wide range of programming, both delays and durations. Such schemes include large-scale integrated circuits (LSIs) of the microprocessor set, such as register-arithmetic logic devices (RALU), programmable logic arrays (PLA), etc. Attempt to use the well-known multi-channel programmable pulse generator in the functional and parametric control systems of the BIS microprocessor set leads to their considerable complication. For example, to control RALU circuits, it is necessary to form four synchronization clocks, each of which must be applied to the corresponding one. output of the controlled circuit at a certain time instant, coinciding only with separate periods of operation of the generator of the period of a known generator. To synchronize the operation of the RALU, it is necessary that a synchronization pulse be present on the first synchronization only in the first period of operation of the period generator, on the second synchronization input - in the second, on the third - in the third, etc. In the same generator, the principle of which is based on the formation of channels impulses in each period of work of the period former, each channel will produce impulses in each period. This leads to the fact that all synchronization inputs of the tested LSI present simultaneously all synchronization pulses formed by different channels of formation, while for LSI operation, only one synchronization pulse is needed in this period. In order to isolate the necessary synchronization pulse, the functional control device must incorporate pulse selectors. The more control measurements required to control an LSI, the more difficult such selectors become. For example, the control of one type of PLA requires more measurements, which leads to the fact that during each measurement only one of the four synchronization pulses necessary to control the operation of the LSI need to be selected. In addition to these pulses, additional control pulses are required to switch devices from input to output and vice versa, in order to control the specified LSI, as well as LSIs that have combined outputs (input-output). For the same PLA, four control pulses are required, the selection of which is also performed using a selector and four more channels of a programmable word generator are allocated. The duration of the control switching pulses exceeds the duration of the pulse period of the period former and reaches two or more periods, and this leads to the fact that between the periods of the formation channel a pulse is generated due to the necessary condition of the channel operation, which is false These pulses introduce an error in the accuracy of control of such LSIs, in which, with combined inputs, the information is charged capacity, which is on time or discharged. completely, or reduce its charge under the action of this pulse, which leads to a decrease in the reliability of the control unit. Thus, along with a decrease in the reliability of the control cont. the role of the LSI of the same PLA requires an additional programmable word generator with a large memory space for the selection of pulses. A disadvantage of the known device is expressed in limited functional possibilities leading to complication of the objects of use; reducing their operational parameters. The aim of the invention is to enhance the functionality of the generator. The goal is achieved by the fact that a multichannel programmable pulse generator additionally contains a counter, a memory unit and a comparison unit, the first inputs of which are connected to an additional memory block, the second inputs - to the output of a counter, whose input is connected to the output of the periodizer and the input of the account control unit connected to the input of the additional trigger of each channel of the pulse formation, and the output of the additional comparison unit is connected to the additional input of the account control unit each Nala. With such a multi-channel programmable pulse generator, the formation of the pulse parameters by channels independent of the duration of the pulse period of the period former, which in turn makes it possible to generate pulse sequences with any time parameters of delays and durations. This expands the functionality of the generator, allowing it to be used in test equipment for complex LSIs and VLSI microprocessor sets, such as RALU and PLA. FIG. 1 is a block diagram of the proposed multi-channel programmable generator; Figure 2 is time diagrams explaining his work. The multichannel programmable pulse generator contains 1 reference frequency generator, 2 periods shaper, 3-1, ..., 1 pulse channels, each of which has a counter, a count control block 5, a memory block 6, a comparison block 7, the triggers 8 and 9 and the keys TO and 11. In addition, the device additionally contains a memory block 12, a counter 13 and a comparison block I. The reference frequency generator 1 is designed to generate reference frequency pulses for the former 2 periods and 3 channels .-- 3 -N pulse formation. The reference frequency generator 1 is a kvar, circuit generator. The output of the generator 1 is connected to the input of the period mapper 2 and the channels 3-1, ... forming a pulse. Period period generator 2 is designed to generate clock pulses with a predetermined following peroid, which are designed to start channels 3-1, ..., 3-N fi rms pulse and counter 13. Period shaper 2 is performed on binary part-time counters, which serve to count generator 1 pulses reference frequency, and the comparison circuit, performed on the elements EXCLUSIVE OR. Each of the channels 3-1 ,, .., 3-N pulse shaping is designed to generate pulses of predetermined duration and delay of the leading edge relative to the time of arrival of the clock pulse. The estimator k of each channel is a binary decimal counter. By its input, it is connected to the output of the account control unit 5, designed to enable its operation and performed on the trigger, and the AND and OR gates. The inputs of the control unit 5h are separately connected to the outputs of the reference frequency generator 1, the driver of the 2 periods and the AND block of the comparison. Memory block 6 is designed to store information in. the form of digital codes defining the delay and pulse duration. Memory block 6 can be executed on triggers. The outputs of the counter and the memory block 6 are separately connected to the inputs of the comparison block 7 performed on the EXCLUSIVE OR logic gates and intended to compare the codes installed on the binary-decimal counter C with the code received from the memory block 6. The trigger 8 is designed to control the operation of the channel, the trigger 9 is used to form the output pulse of each channel. The inputs of the trigger 9 are separately connected to the outputs of the controlled keys 10 and 11, performed on the logic gates And, and intended together with the trigger 8 to organize the operation of the pulse shaping channel in the modes of forming the pulse duration or delay. 7 The additionally inserted memory block 12, the counter 13 and the comparison block H are collectively intended to form a channel enable signal, ..., 3-N pulse shaping. In this case, the memory unit 12 is intended to store information in the form of digital codes about the period during which the generator 2 is operated during which the channel should turn on. A counter 13 is used to count the number of clock pulses (periods) from the output of the generator 2 periods to the input of the counter 13. Comparison unit 14 is used to compare the codes set at the outputs of the counter 13 with the codes of the memory 12. The operation of a multi-channel programmable pulse generator is as follows. When the reference pulses arrive from the reference frequency generator 1 (Fig. 2a), the period shaper 2 generates clock pulses with a specified follow-up period (Fig. 2b), which arrive at the input of the control unit 5 by counting each channel 3-1 ,,. pulse shaping and on the counter 13 counter. The last counts the number of clock pulses and transmits this information in the form of digital codes to the inputs of block 14 as compared to the other inputs of which from the outputs of block 12 of memory receives a digital code carrying time information enable channels 3-1 , ..., If the indicated codes coincide, the comparison block P4 generates a signal to allow the channel to work — one or several (Fig. 2c, time point C). Upon arrival at time t, a clock pulse whose temporal parameters are in the time interval occupied by the pulse from comparison unit 14, the counting control unit 5 generates a pulse for setting counter 4 to the initial state (Fig. 2d, time instant tQ) and also permits the passage of pulses from the reference frequency generator 1 to the input of counter 4 (Fig. 2e). Simultaneously, the clock pulse from the period generator 2 sets the trigger 8 to a state allowing the operation of the key 10 and the comparison unit 7 to generate a pulse delay. Block 7 compares the codes of signals coming from counter 4 and block 6 of 3 m. When the codes are equal, the comparison unit 7 generates a pulse (Fig. 2e, time point to), which changes the state of the trigger E via the key 10, and the leading edge of the pulse is formed at the output of the latter (Fig. 2i). In addition, the pulse from the output of the key 10 through the control unit 5 by the account is fed to the input of the counter 4 and sets it to its original state, thus preparing it for work on the formation of the pulse duration. The same impulse, arriving at the trigger 8, changes its state, also providing the conditions for the formation of the pulse duration. The pulse duration is formed similarly to the delay, with the only difference that the pulses from the output of the comparator unit 7 pass to another input of the trigger 9 through the key 11, setting the latter to the initial state (Fig. 2g, time t) and fixing the falling edge of the pulse (Fig. 2i). Thus, by means of the memory unit 12, the counter 13 and the comparison unit 14, the generator of the output pulse parameters (Fig. 2i) independent of the period duration of the pulse generator of the period former (Fig. 2b) is performed, which makes it possible to generate pulses with broader time delay parameters and duration. This quality allows us to apply the proposed multi-channel programmable pulse generator in testers to control the LSI. requiring for its control a wide range of programming delays and durations. Invention Multi-channel programmable pulse generator auth. St. No. 860295, characterized by TeMj. that, in order to expand its functionality, it additionally contains a counter, a memory unit and a comparison unit, the first inputs of which are connected to an additional memory block, the second inputs - to the outputs of an additional counter, the input of which is connected to the output of the periodizer and the input of the account control unit connected to the input of an additional trigger for each channel of pulse formation, and the output An additional comparison unit is connected to the auxiliary input of the account control unit of each channel. 4f P. one з-н IJin nJL П П П П one ft four well P "/ il A P L L P