SU1689969A1 - Maltichannel device for computing inverted modular function of intercorrelation - Google Patents

Abstract

The invention relates to computing, is intended for statistical analysis of random processes and can be used as a correlation receiver for noise-like signals. The aim of the invention is to increase the speed and simplify the device by calculating the inverted statistical estimate. The device contains an analog-digital converter 1, a synchronizer 2. a reference signal generator 3, a reversible counter 4, an input of a threshold threshold 5, a unit for forming difference modules 6, which include shift registers 7, elements EXCLUSIVE OR 8, counters 9, an element OR 10, output register 11. 1 Il.

Description

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The invention relates to a computing technique, intended for statistical analysis of random processes by calculating an inverted modular correlation function, and can be used as a correlation receiver for noise-like signals.

The purpose of the invention is to increase the speed and simplify the device.

The drawing shows a block diagram of the device.

The device contains analog-to-digital converter 1, synchronizer 2, generator of reference signal 3, reversible counter 4. threshold setting input 5, unit for forming difference modules 6, which include shift registers 7, elements EXCLUSIVE OR 8, counters 9, element OR 10 output register 11.

The device works as follows.

The computation of samples of the inverted modular function of mutual correlation and the determination of its maximum value are carried out over an interval of N cycles. Before the start of calculations on input 5, the reversible counter 4 records the binary code of the threshold value. At the beginning of each computation interval, a short pulse is formed at the second output of the synchronizer, on the rise front of which the preset of counters 9 of all channels is preset to the initial state defined by the reversible counter 4, and on the recession front an increase of one code in the reversible counter 4.

At the beginning of each calculation cycle, a short pulse is generated at the third output of synchronizer 2, on the rise front of which the analog-digital converter 1 is started, as well as a single code shift in generator 3

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reference signal and registers 7 of all channels. At the same time, at the first output of synchronizer 2, a sequence of pulses is formed, clocking the operation of analog-digital converter 1 and EXCLUSIVE OR elements 8. At the output of analog-digital converter 1, a time interval xi is formed, the duration of which is proportional to the value of the input signal at the 1st time instant. Due to the synchronous clocking of the analog-digital converter 1 and the EXCLUSIVE OR 8 elements, the unitary code of the absolute difference between the values of the received X | and the inverted reference SH-J signals / x-Si4-j /. The absolute difference codes accumulate in the counter 9, forming at the end of the N cycles the value of the inverted modular function GJ. At the same time, at the threshold output of the counter of one of the channels, the GJ function in which has a maximum, a short pulse will be generated, providing through the input element AND PI 10 the state of the threshold outputs of the counters 9 to the register 11, as well as the code unit in the reversible counter 4.

Thus, after N processing cycles, a binary N-bit position code of the phase of the received noise-like signal is generated at the outputs of register 11, and the codes of the inverted modular function GJ are fixed at the parallel outputs of counters 9 of block 6.

In the future, the device works similarly. /

With a constant dispersion of interference in the communication channel on an interval of N ticks, the threshold level is exceeded only in one of the N channels. At the same time, in the counter of the beginning of all subsequent computation intervals a threshold value code is recorded, which was previously stored in reversing counter 4 at input 5. This occurs due to the balance of the pulse sequences at the summing and subtracting inputs of the reversing counter 4 (one pulse respectively at the beginning and end of each clock) .

At the same time, the stochastic nature of interference at the beginning of communication can lead to fluctuations in the trigger threshold, which will cause either the absence of pulses at the threshold outputs of N counters 9 in the interval of N cycles or the formation of pulses in two or more channels. The absence of pulses on the subtractive input of the reversible counter 4 leads to an increase in the code of the initial preset in the counters 9 after

each cycle and a corresponding reduction in the trigger threshold. The formation of several pulses at the outputs of the counters 9 causes a decrease in the code in the reversible counter 4 and a corresponding increase in the response threshold.

Claims (1)

A multichannel device for computing an inverted inter-correlation modular function, comprising an analog-to-digital converter, a synchronizer, a reference signal generator, a differential modulus generating unit containing an OR element, an output register, and a group of channels, each of which includes a shift register, an EXCLUSIVE element OR and counter, with the information input analog-digital the converter is an input of the device, in the module of forming the difference modules the information input of the shift register of the first channel is connected to the inverse output of the reference signal generator, the information input of the shift register of each channel except the first is connected to the output of the shift register of the previous channel, the first input element EXCLUSIVE OR of each channel is connected to the shift register output of the corresponding channel, the second inputs of the EXCLUSIVE OR elements of all channels are connected to the output of the analog-digital conversion the third inputs of the EXCLUSIVE OR elements of all channels are connected to the clock input of the analog-digital converter and the first synchronizer output, the resolution inputs for setting the initial state of the counters of each channel are connected to the second synchronizer output, the clock inputs of the shift registers of each channel are connected to the clock input of the reference signal generator the third output of the synchronizer and the input start-up of the analog-digital converter, the output of the output register is the output of the device, characterized in that, in order to improve speed and simplification, it contains a reversible with a netchik, the summing input of the reversible counter is connected to the second output of the synchronizer; overflows of which are connected to the corresponding inputs of the OR element and the corresponding information bits of the output register, the input p Permissions records is connected to output the OR element and the subtracting input of the reversible counter, the input of which the initial state is set is the input of the device threshold.