SU1683177A1 - Transmitter of serial code - Google Patents

Abstract

The invention relates to computing and can be used to form and transmit words by a sequential bipolar code over information communication channels. Inventions 21 and 64, 49, GOLL allow you to transmit information through one or several lines of communication, thus expanding the field of use of the transmitter. The serial code transmitter contains input / output device 1, buffer register 2, shift register 3, information gating unit 4, parity trigger 5, shaper 6 clock frequencies, block of AND-HE elements 7, shaper of 8 time intervals, AND 9 element, generator 10 single impulses, interrupt request unit 11, drivers 12.1-12, n of a two-pole code, AND 13 block of elements, line selection register 14 and start and mode block 15. The unit 15 of the launch and the mode is made on the trigger 24 and two elements OR - NOT 25 and 26. 1 Cp f-crystals, 2 ill., 1 tab. I ... BD (Л С 222 о 00 W XI XI г2 п

Description

The invention relates to computing and can be used to form and transmit words by a sequential bipolar code over information communication channels.

The purpose of the invention is to expand the field of use of the transmitter by ensuring its operation in douh modes on several lines,

Fig. 1 shows a functional diagram of a transmitter for the case of transmission lines; Fig. 2 is a functional diagram of the start block and mode.

The serial code transmitter contains an I / O device 1, a buffer register 2, a shift register 3, an information gating unit 4, a parity trigger 5, a clock frequency generator 6, an AND block of 7 I-elements, a shaper of 8 time slots, a And 9 element, generator 10 single pulses, block 11 interrupt request, the first - drivers 12.1 - 12.p bipolar code, block 13 elements And, the register 14 line selection and block 15 start and mode,

In the drawing, reference numerals 16 and 17 denote information and address inputs of the transmitter, positions 18-20, respectively, the first and third control inputs of the transmitter, position 21 — the synchronous input input of the transmitter, positions 22.1–22n. - information outputs of the transmitter, position 23 - transmitter control output,

Block 15 start and mode is made on the trigger 24 and the first and second elements OR NOT 25 and 26,

The device 1 avod and output provides the matching of the input 16 TO ... D7 with the buffer register 2, as well as the decryption of the signals of the diode 17 AO ... A2 and the selection control signals of the recording and reset module. The buffer register 2 is used to store 32 bits of input information intended for transmission to the shear register 3.

The shift register 3 is used to convert a parallel frame of information transferred from buffer register 2 to a serial one. Strobe information block 4 is used to form an information packet consisting of 31 pulses, under the action of clock pulses (TI), to convert a potential form of information (Inf.1) into a pulsed form (Inf.2), a 5-point trigger by counting single impulses information package (Info.2) generates a parity potential, depending on which the 32nd word bit (parity bit) is formed, is characteristic

one of the signs of authenticity of the word.

The shaper of 6 clock frequencies provides, in the presence of a potential for transmission resolution, frequency conversion F to clock pulses (square wave) TI1 and TI2. Block 7 of the AND elements is NOT used to overwrite the 32nd bit of information from the buffer register 2 into the shift register 3 during the pre-launch period by the recording signal, and during the operation (in the transmission pause) by the signals TI1, as well as the information shift in its transmission signals TI1.

The shaper 8 time intervals provides, under the action of TI2 clock pulses, the formation of 32-bit dressing of clock pulses (TI), the potential of a 4-bit pause, and depending on the state of the parity potential, forms the parity bit. The single pulse generator 10 is a one-shot, produces pulses Reset 2 on Reset 1, coming from an external device, and on the end of the Pause potential, coming from a time slot of 6 timeslots. Resetting 2 signals from the transmitter is reset.

The request unit 11 is designed to form a request signal by the Reset 2 signals (in the initial period by the Reset signal and by the end of the pause) and removed by the recording signal of the fourth information byte. The group of drivers 12.1–12, a bipolar code, is intended for converting a serial TTL level code, represented as clock and information components, into a successive two polar

three-level code RZ.

Block 13 of elements AND issues, if there is potential, the resolution of the line selection potential depending on the state of the bits of the register 14. The latter serves to ensure the recording and storage of eight bits of input information. The block 15 and the mode generates the potential resolution and depending on the state 32 -th view of the buffer register 2 provides a continuous or Gart-stop mode of message transmission,

The serial code transmitter operates as follows.

After turning on the power, the device 1 of the transmitter is fed to the input 20 of the system signal Reset, which then enters generator 10, generates a signal by which the transmitter is reset, at which the start and mode unit 15 generates a single potential Resolution on which the driver is blocked 6 clock frequencies TI1 and TI2, as well as the work of the formers 12.1 - 12.note the bipolar code, and on the outputs of which a high resistance is set, block 7 is switched to the recording mode from an external device twa. In this case, the parity trigger 5 and the shaper of 8 time slots are reset. The request unit 11 generates a Request signal, which is required from an external service device.

In the future, there are two possible modes of operation of the transmitter: continuous mode of operation (32nd bit - log.1), in which words are output continuously with a pause between them equal to 4 bits; and start-stop operation (32-th Log. O), in which the words are output one by one with any pause between them, defined by the external device.

The continuous operation mode of the transmitter is determined by the following time settings. After a system reset, determined by an external device, information is entered into the transmitter of a serial code, for which: the necessary data are set at the input 16 of data TO ... D7; at the entrance to the AO ... A2, an address code is set; The ESh signal (module selection) at input 18 is set to active mode (Log.O) by signals. Input 19 is used to perform operations in accordance with the table.

By recording the fourth byte of information transmitted by removing the request signal. After a time determined by the external device, the transmission of the first word will begin.

The input of the next information to the transmitter from the external device in this mode should be made after the appearance of the signal. A request

The start-stop mode of the transmitter is different from the previous mode in that initially the information is entered only by one word transmitted to the transmission line, and the time for entering the next information and the beginning of the transfer of the next word does not depend on the transmitter operation, but is determined only by an external device, the outcome from the received cyclogram of information exchange.

The operation of the transmitter when transmitting a word is determined as follows. When Zap.b is installed, the starting and mode block 15 generates a zero potential. Resolution: unlocked driver 6

clock frequencies TI1 and TI2 and block 7 translates the shift register 3 from the write mode to the shift mode.

On the leading edge of the clock pulses TI1, information in the shift register 3 is shifted (the first bit at the output of the shift register 3 is the information of the first bit, the next is the next one).

In the shaper of 8 time intervals, a packet of 32 TI pulses is formed, after which a pause in four TI periods is formed. The clock pulses of the TI are fed to the block 4 of gating information and to the formers 12.1–12, n of the two-pole code. The prostrated information is fed through the element 9I to the formers 12.1 to 12.p and directly to the parity of the transmitted parcel i.ru.p 5. By the time of passing the 32nd bit, the output of the trigger 5 sets a potential that determines the passage of the parity bit from the shaper of 8 time intervals through the AND 9 element to the shapers 12.1 - 12.n in place of the last 32nd bit of the word being output.

At the beginning of the pause, the block 7 transfers the shift register 3 to the information recording mode, which is recorded on the leading edge of the pulses TI i from the buffer register 2. At the end of the pause, the generator 10 generates a Reset signal 2, which brings the transmitter to the initial state, and then, depending from the operation mode (continuous or start-stop), the process is repeated or terminated.

Claims (2)

1. A sequential code transmitter containing an input / output device, whose information outputs are connected to the corresponding information inputs of the buffer register, the output of which bits, except for the latter, are connected to the corresponding information inputs of the shift register, the output of which is connected to the gates information block, the output of which is connected to the first input of the parity triter, the clock frequency shaper, the first output of which is connected to the first input of the AND-NOT block, the second output The clock frequency generator is connected to the first input of the time interval shaper, the first output of which is connected to the first input of the first shaper of the two-polar code, the second output of the time intervals is connected to the first input of the And element, the output of which is connected to the second input of the first Shaper of the two-polar code whose outputs are are the first information output of the transmitter, the third output of the time interval generator is connected to the second input of the AND-NOT block and to the first input of a single pulse generator, the output of which is connected to the first input of the interrupt request block whose output is the control output of the transmitter, the first to fourth outputs I / O device records are connected to the same inputs of the buffer register, information and address inputs of the I / O device are respectively information and address inputs. Transmitter inputs, Modulator selection, Record and Reset I / O device inputs are the first, second and third control inputs of the transmitter, respectively. The first input of the clock frequency generator is the sync frequency input of the transmitter, which differs from in order to expand the range of use of the transmitter by ensuring its operation in two modes by several, the AND block, the line selection register, the second shapers of the two-pole code (, N) and the trigger and mode, the output of which is n with the second input of the clock frequency maker, with the first input of the AND block and with the third input of the AND block, NOT the first and second outputs of which are connected to the corresponding control inputs of the shift register, the fifth write output of the I / O device is connected to the fourth input the block of elements AND - NOT, the sixth write output of the I / O device - with the first input of the starting block and the mode, the output of the last bit of the buffer register is connected to the second input of the starting block and the mode, the third input of which is combined with the second inputs of the time slot generator and parity triggers and connected to the output of a single pulse generator, the second input of which is connected to the output reset device I / O, the output of the parity trigger is connected to the third input of the time slot generator, the second input of the interrupt request unit is connected to the fourth write output of the I / O device, the first inputs of the second to nth shaper of the two-polar code are connected to the first time slot generator output , the second inputs of the second-n-th shapers of the two-pole code are connected to the output of the element I, the second input of which is connected to the output of the information gating unit, the inputs of the line selection register by keys corresponding to information outlets I / O devices, the outputs of the bits of the line selection register are connected to the corresponding second inputs of the I block, the outputs of which are connected to the third inputs of the like-named shapers of the two-polar code, the outputs of which are poro-n-ro shapers of the two-polar code are the same-name outputs of the transmitter. 2. The transmitter according to claim. 1, so that the start-up and mode unit is made on the OR elements - NOT and the trigger, the output of the first element OR - is NOT connected to the first input of the trigger, the output of which is the output of the block, the output of the second element OR - NOT connected to the first input of the first element OR - A NOT whose second input is connected to a second trigger input and is the first input of the block, the first and second inputs of the second element OR 0 are NOT the second and third block inputs, respectively. FIG. 2