SU1674156A1 - Voltage surge and fall-through duration analyzer - Google Patents

Abstract

The invention relates to the field of information-measuring and computing equipment and can be used in the power industry to control the quality of electricity in industrial electrical networks. The purpose of the invention is to improve accuracy by implementing a generalized method for estimating the effects of emissions and voltage drops in the supply network. The analyzer contains a rectifier element, a null organ, a module shaping unit, comparators, counters, memory blocks, an AND element, a single vibrator, a register, a NOT element, a trigger, a comparator, and a level distributor. 3 il.

Description

one

(21) 4358257/24 (22) 01.01.88 (46) 08.30.91. Bul №32

(71) Novocherkassk Polytechnic Institute. Sergo Ordzhonikidze

(72) V.F. Yermakov (53) 681.3 (088.8)

(56) USSR Author's Certificate No. 1290355, cl. G 06 F 15/36, 1984.

USSR author's certificate 920741, cl. G 06 F 15/36, 1979.

(54) ANALYZER OF THE DURATION OF EMISSIONS AND VOLTAGE FAILURES

(57) The invention relates to the field of information-measuring and computing equipment and can be used in the power industry to control the quality of electricity in industrial electrical networks. The purpose of the invention is to improve accuracy by implementing a generalized method for estimating the effects of emissions and voltage drops in the supply network. The analyzer contains a rectifier element, a null organ, a module shaping unit, comparators, counters, memory blocks, an And element, a single vibrator, a register, a NOT element, a trigger, a comparator, and a level distributor. 3 il.

The invention relates to information-measuring and computing equipment, is intended to obtain a family of distribution functions of the duration of emissions and voltage drops of various levels of analysis and can be used in electric power industry to monitor the quality of electricity in industrial power grids and assess its effect on various electrical equipment.

The purpose of the invention is to improve the accuracy of the analysis.

FIG. 1 shows a block diagram of the device; in fig. 2 is a diagram of a module forming unit; in fig. 3 is a graph of voltage changes at the output of the analyzer's input converter.

The analyzer contains the rectifier element 1 connected to the input terminal of the device, the output of which is connected to the input of the zero-organ 2 and the second

the input unit 3 forming the module, the output of which is connected to the interconnected inputs of comparators 4-5, the outputs of which are connected respectively in each channel to the installation inputs of zero counters of group € -7, the outputs of which are connected to the information inputs of the multi-channel switch 8, the output of which is connected to the information input of the memory block 9, the information input of the lower bits of the register 10 and the first input of the numerical comparator 11, the second input of which is connected to the output of the memory block 9, the pulse generator 12, the output to The oogo is connected to the clock inputs of the counters of groups 6-7 and counter 13 and the input of the first one-shot 14, the output of which is connected directly to the second input of the AND 15 element and through the one-shot 16c to the write input of memory block 9, the inverse output of the zero-organ 2 is connected to the first input block 3, my output is zero

J

Oh h

J

sl o

organ 2 is connected to the second input of the block 3 and the information input of the high bit of the register 10, the output of the counter 13 is connected to the control input of the switch 8, the address input of the memory block 9 and the information input of the high bits of the register 10, the output of which is connected to the address input of the block 17 memory, the output of which is connected to the information input of the counter 18, the output of which is connected to the information input of the memory block 17, the first output of the comparator 11 is connected to the first input of the element 15, the output of which is connected to the input of the register record 10 and black s element 19 - with the installation input of the trigger unit 20, the inverse output of which is connected to the reset input of the distributor 21 levels, the clock input of which is connected to the generator output 22 pulses (the frequency of which may be unstable), the outputs of the distributor 21 are connected respectively to the write input of the counter 18 , with the clock input of the counter 18, with the recording input of the memory block 17 and with the installation input and the zero of the trigger 20.

Block 3 contains a switch 23 connected by an information input to a second input of block 3 and through an inverter 24 to an information input of switch 25, the output of which is connected to the output of switch 23 and connected to the output of the block, the control input of switch 23 is connected to the third input of the block the input of the switch 25 is connected to the first input of the unit.

The analyzer is multi-channel, the operation levels of the comparators 4-5 evenly divide the range of variation of the emission amplitude and voltage dips, and the quantizers of the emission duration and dip are binary counters 6-7. Next, as an example, a 256-channel analyzer having the number of quanta of emission amplitude and voltage dips is considered - 8 each, the number of quanta of overshoot by emissions and dips of analysis levels is 16. To increase the accuracy of measuring the duration of emissions and voltage dips, 8-bit are used. the counters, the outputs of the four most significant bits of each of which are connected respectively to the information inputs of the switch 8.

The analyzer works as follows

The rectifier element 1 of the analyzer converts the alternating voltage of the network into a constant, propotional value of the effective value of the analyzed voltage minus its nominal value.

Ui K- (U-UH), where K is a proportionality coefficient.

When the network voltage surges beyond the nominal level, the output voltage of the element 1 is positive, it is passed unchanged by block 3 to the inputs of the comparators 4-5; direct output voltage

0 zero-organ 2 is equal to one, measured statistics are accumulated in cells of memory block 17 with addresses 10000000-11111111, exceeded values of emission durations are recorded in cells

5 blocks 9 of memory with addresses 000-111.

The pulses of the quartz oscillator 12 are continuously fed to the clock inputs of counters 6-7, but in the absence of voltage surges the contents of the counters

0 6-7 remains zero, since a unit voltage from the inverse outputs of the comparators 4-5 is applied to their zero setting inputs. The three-digit counter 13 cyclically changes its state, in each

The 5th clock of the generator 12 also starts the single-oscillators 14 and 16, however, the information in the memory block 17 is not accumulated, and the contents of the cells of the memory block 9 are kept zero.

0

When a surge exceeds the voltage of the first level of analysis (at the time ti in Fig. 3), the comparator 4 of the first channel is triggered, its output voltage

5 becomes zero. The counter 6 of the first channel begins to fill and, counting the pulses of the quartz oscillator 12, determines the duration of Ti exceeding the surge of the first analysis level.

0 In the next cycle of operation of the counter 13 with its output code 000 at the output of the switch 8, the contents of the counter 6 of the first channel 0001, which exceeds the zero content, appear different from zero.

5 cells of memory block 9 with address 000. At the output of the comparator 11, a single voltage appears, opening AND 15 for the pulse of the one-shot 14, which writes 1000001 into the register 10, as well as

0 tilts the trigger 20 into one state, with a pulse from the output of the one-shot 16 into the cell 000 of the memory block 9 the code 0001 is written.

Since a single voltage is removed from the input of the zero setting of the limiter 21, it goes out of rest and begins to scan the control voltage at its outputs, performed the next short cycle of operations.

With the arrival of the next pulse to the clock input of the distributor 21, the control signal appears at the second output of the distributor i, which writes to the binary-decimal counter 18 a sample accumulated as a result of the previous analysis in the memory block 17 with address 10000001 In the next clock pulse from the third output of the distributor 21, the contents of the counter 18 are incremented by one, after which the pulse from the fourth output of the distributor 21 returns this information to the memory block 17 at the same address. A pulse from the fifth output of the distributor 21 transfers the trigger 20 to the zero state, thus returning the distributor to a state of rest, during which the control voltage is continuously present at its free first output.

In the process of further increasing the duration of Ti emission above the first level of analysis, the output code of counter 6 of the first channel becomes equal to 0010 - in the next cycle of counter 13 operation, the statistics increased in the channel of memory block 17 with address 10000010, etc.

In the event of a surge in the voltage of the second level of analysis (at time t2 in Fig. 3), the contents of the binary counter of the second channel begin to increase, measuring the duration T2. Increasing the content of the binary counter of the second channel to the value 0001 in the next cycle of operation of the counter 13 per unit increases the statistics accumulated in the channel of the memory block 17 with the address 10010001, etc.

When the voltage decreases, the counters 6-7 are zeroed by the voltage from the inverted outputs of the release comparators 4-5, the cells of the memory block 9 are also sequentially zeroed and the accumulation of information in the analyzer memory 17 is stopped.

When a voltage dip appears on the direct output of the null organ 2, O appears, and block 3 inverts the negative voltage from the output of the rectifier element 1 - as a result, positive inputs are applied to the inputs of the comparators 4-5. emission analysis.

When analyzing voltage dips, the analyzer works in the same way as when analyzing outliers, only information is accumulated in channels of memory block 17 with addresses 00000000-01111111

Claims (1)

Claims 5 Emission duration and voltage dips containing a comparators group, two pulse generators, a zero-organ, two counters, a first memory block, a level distributor, a trigger, an element AND, and a rectifier element whose input is the input of the analyzer, the first output of the level distributor is connected to the recording control input of the first memory block whose output is connected to 5 to the information input of the first counter, the output of which is connected to the information input of the first memory block, the recording input and the clock input of the first counter are connected respectively to the second and 0 to the third outputs of the level distributor, the fourth output of which is connected to the installation input of the zero trigger, the inverse output of which is connected to the reset input of the level distributor, 5 characterized in that, in order to increase accuracy, a switch, a group of counters, two one-vibrators, a comparator, a NOT element, a second memory block, a register and a mod0-forming unit, the first and second inputs of which are connected to an inverse are introduced into it the output of the zero-organ and the output of the rectifier element connected to the input of the zero-organ, the direct output of which is connected to the information input of the higher register bit and to the third input of the module forming unit whose output is connected to the inputs of the group comparators, outputs that are connected to the installation inputs zero 0 corresponding group counters, the outputs of which are connected to the information inputs of the switch, the output of which is connected to the information input of the second memory block, to the information input 5 lower bits of the register and with the first input of the comparator, the output of which is connected to the first input of the AND element, the output of which is connected to the input of the register recording control and through the element NO with 0 by the installation of the unit in the trigger unit, the output of the second pulse generator is connected to the clock inputs of the counters of the group, the second counter and through the first one-oscillator to the second input of the element I and C 5 by the input of the second one-shot, the output of which is connected to the write control input of the second memory block, the output of which is connected to the second input of the comparator, the output of the second counter is connected to the control input of the switch, to the address input of the second memory block and to the recorder whose output It is connected to the address-formation inputs of the high-order bits with a real input of the first memory block.