SU1640694A1 - Radioelectronic module controller - Google Patents

Abstract

The invention relates to automation and computer technology and can be used to control electronic logic blocks. The aim of the invention is to increase the reliability of control. In addition, hardware costs can be reduced. For this purpose, a device containing a clock generator, a pulse generator, a shift register, a test generator, a group of N comparison circuits, a group of N elements AND, an OR element, an AND element, a counting trigger, an output register, a display unit, a counter tests and a decoder, entered a ring shift register and display counter 2 silt, with

Description

The invention relates to automation and computing and can be used for controlling electronic logic blocks.

The aim of the invention is to increase the reliability of control and reduce hardware costs.

Fig „1 shows the functional diagram of the device; on - diagrams, explaining the operation of the device in the presence and absence of an emergency condition

The device contains a clock pulse generator 1, a reset pulse generator 2, a pilot signal driver 3, a shift register 4, a generator of 5 tests, a comparison circuit 601-60N, elements AND 7el-7.N, element OR 8, element 9, counting trigger 10 , the shift register ring 11, the display counter 12, the output register 13, the converter 14 codes and the indicator 15, forming the display unit, the imaging unit 3 is formed from the counter 16 tests and the decoder 17 "

In Fig.2 marked: a - control signal; b - no alarm signal from circuit 6; в - output signal of register 4; g - output signal of the ring register 11; d - the output signal of the element And 7 in the absence of an accident and the output signal of the element 9 in the absence of an accident; e - signal of the presence of an accident from the output of circuit 6; W - signal from the output of element 7 in the presence of an accident; and - the signal from the output of the element 9 in the presence of an accident

The device works as follows

Generator 1 is produced when power is applied to a voltage 65

Pulses with parameters determined by the time of the driving chains. From the output of the generator 1, the rectangular pulses go to the input of the generator 2c. The rectangular pulses from the output of the generator 1 are also fed to the input of the generator 3, which includes the counter 16 and the decoder 170. The clock pulses change counter metering

16 (frequency division mode), in a certain clock cycle at the output of the decoder

A rectangular impulse is formed, the frequency of which is lower than the frequency of the impulses of the generator 1 o The rectangular impulse from the output of the former 3 interrogates the circuits included in the generator 50 When a rectangular impulse is received at the input of the generator 5, the test code for V-2 at the output of the device and exists for the duration of this impulse. A rectangular impulse from the output of the imaging unit 3 is fed to the information input D of the register 4; simultaneously, the pulses from the output of the generator 1 record into the register mp 4 information present at time

their arrival at the information input D with a simultaneous shift of information from the J bit to the bit

Thus, a rectangular pulse from the output of the imaging unit 3 (control signal) is recorded at a certain cycle in register 4, and in subsequent cycles appears at its outputs as a logical unit. Pulse from generator 2 periodically enters input R of register 4 and zeroes em it. The multidigit test code passed through the N controlled functional parts of the control object enters the inputs of circuits 6, the circuit number coinciding with the number assigned to the functional part of the control object 4 From the device initial setup input, an asynchronous square pulse with a frequency of nine pores Dkov below the frequency of the generator 1 is fed to the input R of the ring register 11 and writes down the logical unit in the first digit of this register, and zero in the other bits of the register. In real equipment the primary This radar information processing usually occurs once during the review period of a given portion of space during a circular view, in particular, when the main lobe of the antenna pattern of the radar station passes azimuth of zero degrees. Thus, a periodic initial setting of the ring register occurs. The synchronous input of the ring register 11 receives a control signal, sequentially advancing the logical unit recorded during the initial installation, according to the resolution0 Number The gaps of the ring register 11 are chosen to be (N + 1), since at the first cycle of its operation the functional groups are not polled. The output of the (N + l) -ro bit of the ring register 11 is connected to the information input D of its first bit, te0e0 is organized a cycle with a period (N + 1) T, where T is the follow-up period of the control signal. In actual radar information preparatory equipment, the control signal is usually generated once per period of the probing of T space. Then the pulses at the outputs Q - QN + I of the ring register will be After all, time T, t0e0 in each given period, one functional group of equipment can be polled for the presence or absence of an emergency condition, thereby achieving a selection by polling time of functional groups. On the And elements, the signals from the outputs of the circuits 6 are combined. , 1-6 „No From the outputs of register 4 (starting from the first to the Nth) and from the outputs of the ring register 11 (starting from the second to (N + l) -u) 0

On fig26, c, d, d, e, g, the operation of elements AND 7 in the presence or absence of an accident in each functional group is shown. In the absence of an accident in this functional group, the output of the corresponding element AND 7 (fig02d) will be a logical zero, and in the presence of an accident in this functional group at the output of the corresponding element And 7 there will be a logical unit () 0 Signals from the outputs of the elements 701-70N are combined on the element 8 "Logical unit appears at the output of element 8 only in case of alarms in the functional groups Logical unit ow At the output of the first bit of the ring register 11, each time it is initially installed and at the end of the interrogation cycle, it sets to zero.

five

all bits of the counter 12. The control signal from the output of the imaging unit 3 to the counting input of the counter 12, increases its content by one. At the same time, the same control signal sequentially shifts the logical unit by the bits of the ring register 1 1.

Thus, in the counter 12, at any moment there is a binary code of the polled functional group. An asynchronous rectangular pulse from the input of the device twists the counting trigger 10, affecting its setup input R "A logical unit0 appears at the inverse output of the counting trigger 10 Now the occurrence of an emergency state in any functional group at the first input of element 9 will be a logical unit, and at its second input there will also be a logical unit from the output of element 8c and 9

In this case, the output of the element is according to the logical unit that

the torus, affecting the synchronous input of the counting trigger 10, will set a logical zero at its inverse output, thereby blocking the switching of the trigger 10 from subsequent emergency states. This ensures that the first accident in functional groups is processed and fixed until the arrival of a new asynchronous square pulse to the input of the device0 An asynchronous rectangular pulse also affects the setup input R of register 13 and threw all its bits ,, If an alarm condition occurred in any position In the functional part of the control object, a rectangular pulse arising at the output of element 9 affects the synchronous input of register 13 and rewrites the information present at its inputs Dol-DoMo into its triggers. As a result, the contents of counter 12 equal to the code of the polled functional group are rewritten into register 13 and is stored there until the next pulse arrives from the device input.) If the alarm has been eliminated by this time, the contents of register 13 will be reset, if a new alarm occurs, the new faulty code will be written functional group, if the accident is not eliminated - code

0

- 0 5

0

five

0

five

0

five

faulty functional group will be reconfirmed

Claims (1)

Signals from the output of register 13 are fed to the input of converter 14, which converts a binary code into electrical signals necessary for the operation of the indicator 150. The latter converts electrical signals (codes, pulses) into visual information — the decimal number of the faulty functional part of the control object. A device for controlling radio-electronic units containing a clock pulse generator, a reset pulse generator, a shift register, a test generator, a group of N comparison circuits, a group of N elements AND, an OR element, an And element, a counting trigger, an output register, a display unit, a test counter and the decoder, the output of which is connected to the input of the test generator and the information input of the shift register, the synchronous input, the reset input and the i-th output of which (N) are connected respectively to the output of the clock generator, the output of the pulse generator throw and the first input of the 1st element And the group, the counting input, the reset input and the output of the test counter are connected respectively to the output of the clock generator, the output of the pulse generator of the reset and the decoder input, the input of the generator of the pulse pulses, the output of the test generator is the output of the device for connecting to the input of the control object, the first input of the i-th group comparison circuit is the input of the device for connecting to the i-th output of the control object, the second input of the i-th circuit is and the group is connected to the bus of the reference potential of the device, the second input and output of the 1st element AND of the group are connected respectively to the output of the i-th comparison circuit of the group and the i-th input of the OR element, the first and second inputs of the AND element are connected respectively to the inverse output of the counting trigger and the output of the OR element, and the output of the output register is connected to the input of the display unit, characterized in that, in order to increase the reliability of the control, it contains a ring shift register and the indication counter, the reset input, the counting input and the output of which are connected respectively to the first information output of the ring shift register, the output of the decoder and the information input of the output register of the output register and counting trigger trigger input and the reset inputs of the ring shift register , the output register and the counting trigger are combined and form the input of the initial installation of the device, the sync input and the information input of the ring shift register are connected respectively to the decryption output pa and (M + 1) -th information output of the same register, and the third input of the 1st element And group is connected to the (M-H) -m information output of the ring shift register Fig, 1 but, 5. in 2