SU1281922A1 - Digital temperature meter - Google Patents

Abstract

The device relates to a measurement technique and is intended to measure temperature. The aim of the invention is to increase the measurement accuracy by eliminating the effect of the long-term instability of the elements of the temperature meter. The device includes a measuring bridge 1, an unbalance amplifier 2, a voltage source 3, four switches 4-6, 14, an inverter 7, an adder.8, two serially connected integrators 9, 10, a reference element 11, a control unit 12, a pulse generator 13 , counter 15, display unit 16. The linearization of the thermal resistance characteristic occurs due to the determination of the root equation of the form R Kd (1 + AT-BT), where RO is the resistance at 0 ° C; A, B - constant coefficients; T - temperature, s. The root of the equation is determined by two integration cycles, which is caused by new connections in the device (charge and discharge of series-connected integrators), which eliminates the instability of analog elements. 2 Il. with and (L

Description

N9

sc

to

N9

The invention relates to a measurement technique and can be used to create devices for measuring temperature with a non-linear output characteristic of a primary converter, for example, a platinum resistance thermometer.

The purpose of the invention is to improve the accuracy of temperature measurement.

Figure 1 shows the block diagram of the proposed device; Fig. 2 shows voltage graphs explaining the operation of the device.

The device contains a measuring bridge 1 with a thermodependent resistance in one of the arms, an unbalance amplifier 2, a reference voltage source 3, a first switch 4, a second switch 5, a third switch 6, an inverter 7, an adder 8, a first integrator 9, a second integrator 10, an element 11 comparisons, control unit 12, clock generator 13, fourth key 14, reversible counter 15, display unit 16. I

The device works as follows.

Previously, at the command of the control unit 12, the first integrator 9, the second integrator 10 and the counter 15 are reset. At the same time, at the command of the control unit 12, the keys 4-6 and 14 are reset (all keys are locked).

The A / D conversion starts at the command of the I2 control unit, which opens the keys 4, 5 and 14, removes the embedded signals from the first integrator 9, the second integrator 10 and the counter 15, and the first clock of the device starts. At the first input of the adder 8 through the inverter 7, the unbalance voltage (-Un) amplified by amplifier 2, and the second input, the voltage of the reference source (Uo). The first integrator 9 begins to integrate the voltage (U ;, - Uy) supplied to its input from the output of the adder 8, the second integrator 10 integrates the output The first voltage of the first integrator 9, the counter 15 starts counting the pulses from the generator 13 in the direct counting mode defined by the control unit 12 by applying the corresponding signal to the control input of the counter 15. The integration process

1281922

happens

during a given time interval t, (figure 2).

(Integration Time Interval

set by the moment the account starts

0

five

0

0

the counter 15 and ends at the moment of overflow of the counter 15. An overflow pulse at the end of a predetermined time interval t arrives at the second input of the control unit 12, which is turned on by the first integrator 9, closes the keys 5 and 14, opens the key 6 and sets the counter counting mode by applying the appropriate signal to its control input.

5 At the same time, the first input of the adder 8 is fed through the inverter 7 with the voltage of the reference signal (-Ug) of reverse polarity. The second cycle of operation of the device begins, consisting in integrating the voltage (-U) by the first integrator 9. The output voltage of the integrator 9 is fed to the input of the second integrator 10 and discharges it.

During the second cycle of operation of the device, the pulses of the generator 13 through the key 4 continue to flow to the counter 15, which operates in the countdown mode. The second clock and the whole measurement process end at the same time as the output voltage of the second integrator 10 becomes zero. At the moment of equality to zero, the comparison element 11 is triggered, on the signal of which the block

5 12 control closes key 4. Actually counter 15 measures the time of the second cycle, counting pulses from generator 13. After the A / D conversion process, the code in counter 15 is directly proportional to the measured temperature, and at the command of the control unit the code is transmitted from the counter 15 to the display unit 16. In the next measurement, the described process is repeated.

The temperature to be measured affects the thermometric resistance of bridge 1, the resistance value of which R, depending on temperature, varies according to the law

R RO d + AT-BT)

(one)

Where

RO 5

resistance value at

0 ° C;

constant coefficients;

temperature, C.

A, B - T If we express the temperature in equation (1) through the resistance R, we get

  Jr-L7 1 PG

2B G2V g,

RO B

The unbalance voltage coming from the output of the measuring bridge G is equal to

and K „(K - RJ,

(3)

where K is the conversion factor

bridge i

Unbalance voltage amplified by amplifier 2 is equal to

Uy (R - RJ (4) where Ku is the coefficient of the amplifier 2. The operation of the proposed device is described based on the sequential integration of the difference of the reference

signal (Ug) and the output signal of amplifier 2 (Uq) by the first integrator 9, and then by the second integrator 10 during a given time interval t. During the first integration cycle, the output voltage of the first integrator 9. is described by the dependence

U, (t) Kj (), (U -U ,,) t. (5 where Kv is the integrator coefficient 9.

At the output of the second integrator 10, the voltage is determined by the ratio

and

U ,, (t) K, J U, (t), J K (Uo Uj) tdt

- -i-iS

(Uo - Uy) t

(6)

where K, g is the integrator coefficient lO. At the end of the time interval tf, a voltage is generated at the output of the integrator 10

Ko Ko | o

(Uo - Uy) t ,.

The first integrator is discharged to zero by applying a zero pulse, and the voltage of the reference source 3 is applied to its input through the inverter 7. During the second integration cycle, the output voltage of the first integrator 9 describes the dependence U, (t) K, (-U) ,. (7) The discharge of the second integrator 10 occurs according to the law

and, o (t) -f- (Ue-u) tVK, J K,

2 0 j

u (- p n -

(eight)

2 2

In the process of discharging the second integrator, time t is measured.

After full discharge, the equation is obtained

 gtt n w - -i5. 2 ° 2

Expressing the time measured by the counter 15, we get that it does not depend on the coefficients K and K, o.

(9

ten

15

t., f (, o,

The times t and t are equal

t, N, / f; (11)

t Y-- 2)

where f is the pulse frequency from the generator 13; NJJ - the maximum capacity of the counter 15;

N is the code in the counter at the end of the second integration cycle.

Taking into account (11) and (12), we rewrite equation (10)

N N, - (13)

JUo

The maximum capacity of the counter 1, the voltage of the reference source U, the coefficients K,., K are chosen as

way

N. 2iV about

(14) (15)

thirty

35

40

45

50

55

Taking into account (4), (14) and (15), equation (13) will rewrite

  2HCF - d- Compare (16) and (2),. We see that

the code in counter 15 is equal to the measured

temperature t.

Claims (1)

Invention Formula A digital temperature meter, a bridge with a thermal converter in one of the arms, the output of which is connected to the unbalance amplifier input, an inverter whose output is connected to the first input of the adder, two series-connected integrators, a reference voltage source, a reference element, four keys, a clock generator , binary-decimal counter, control unit, display unit, the control inputs of the keys, the inputs for zeroing and switching the sign of the addition of the binary-decimal counter, the control input roystva indication and zeroing the inputs of integrators connected to the output of the control unit and clock pulse generator output is connected via a first switch to the input of the binary coded decimal counter whose output is connected to the input of the indication unit, otlichayuschiy5128 In order to increase accuracy by eliminating the effect of the long-term and temperature instability of the transfer factors of the integrators on the measurement result, the output 5 of the unbalance amplifier is connected to the input of the inverter via a second key, the output of the reference voltage source is connected to the input ti3 (t) t u ,, ia 226 an inverter and a fourth switch with a second input of the adder, the output of which is connected to the input of the first integrator, and the output of the second integrator is connected to the input of the time element whose output and the overflow output of the binary-decimal counter are connected to the inputs of the control unit. 9ds, 2