SU1098004A1 - Device for calculating values of fourier coefficients - Google Patents

Abstract

A device for calculating the coefficients of Fourier, containing shift blocks of the real and imaginary parts of the first and second operands, registers of the real and imaginary parts of the first, second operands and trigonometric coefficient, four multipliers, four intermediate registers, six totalizers, a shift control unit, four output registers, the information inputs of the shift blocks of the real and imaginary parts of the first and second operands are the inputs of the device, and their inputs are connected respectively to the inputs registers of the real and imaginary parts of the first and second operands, the output of the register of the real part of the trigonometric coefficient is connected to the first inputs of the first and third multipliers, and the output of the register is multi-. my part of the trigonometric coefficient - to the first inputs of the second and fourth multipliers, the outputs of the real and imaginary part registers of the second operand are connected to the second inputs of the first and third multipliers, the outputs of the multipliers are connected to the inputs of the corresponding intermediate registers, the outputs of the first and second intermediate registers are connected to the inputs of the first the adder, and the outputs of the third and fourth intermediate registers - to the inputs of the second adder, the output of the first adder is connected to the first th inputs of the third and fourth adders, and the output of the second adder to the first inputs of the fifth and sixth adders, the outputs of the third, fourth, fifth and sixth adders are connected to the inputs of the corresponding output registers, the outputs of which are the output of the device, and to the inputs of the block shift control, the output of which is the output of the scale factor of the device and is connected to the control inputs of the shift CD of the real and imaginary part of the cf of the first and second operands, of which To expand the functionality of the device, consisting in the possibility of multiplying the initial data array by the window weighing function, it contains four switches and two reset registers, the output of the register of the real part of the first operand connected to the input of the first reset register and the first INPUT of the first switch, the output of the register parts of the first operand to the input of the second reset register and the first input of the second switch.

Description

the outputs of the registers of the real and imaginary parts of the second operand are connected to the second inputs of the second and the first switches, respectively, the output of the first switch is connected to the second input of the second multiplier S and the output of the second switch to the second input of the fourth switch is combined and they are the input to the weighting function of the device window, the second inputs of the third and fourth switches are 04, respectively, included in the input and mp1; my parts of the trigonometric coefficient e) that device, and the outputs of the third and fourth key mutators are connected to the inputs of the registers of the remote and named parts of the trigonometric coefficient, the output of the first reset register is connected to the second; the inputs of the third and fourth adders, and the code of the second reset register - to the second inputs of the fifth and sixth solders.

The invention relates to automation and computing and can be used to construct computing devices using the fast Fourier transform algorithm.

A device for calculating Fourier coefficients is known, which contains multiply blocks, a sum of singing blocks, registers of the real and imaginary parts of one rand and a weighting coefficient (L {rncytase, as well as the buffer and permanent storage devices G 1.

The disadvantage of this device is its low speed, which is due to the fact that all operations are performed sequentially according to the arrival rate of the number digits5 participating in this calculation.

The closest to the proposed is a device for calculating the Fourier coefficients-jeHTOB, which contains blocks of the shift of the real and imaginary parts of operands, the registers operates & pn and imaginary parts of operands and a trigonometric coefficient of the multiplier, four propellant registers, six adders, block uprazlni shifts, four output, register 2.

The disadvantage # {of the known device is the limited functionality, since it is not possible to multiply the original data array by the hopping function of the window.

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The delivered spruce; the hem is reached; What is a device for the length of the Fourier coefficients, with its blocks of the real and imaginary parts of the first and second imaginary parts of the first, in the first and second parts and the first, operands and the io to ; transc.; ck.or-o coefficient, four angles-1non; four p-registers, dough sug., ltorov., a shift control unit, a four-way periiCipa output, and the information liKOfJU of the SHIFT block 2 acting to; vuKKon parts of the first n second operands are device inputs and their outputs are connected to the inputs of the realpo- nary registers to the imaginary parts of the first and second operands, the register of the real part of the trigonometric co-factor-gene-a subgroup of the first inputs of the first g-; third multiply; and the odd register of the imaginary part of the trunking coefficient to the first inputs of the second and fourth multipliers, the outputs of the real and imaginary part registers of the second operand are connected to the second inputs of the first and third scissors, respectively, the outputs of the multipliers are connected to the inputs of the corresponding intermediate registers, the first and second outputs intermediate registers are connected to the inputs of the first adder, and the third and fourth intermediate registers are connected to the inputs of the second adder, the output of the first totalizer and connected to the first inputs of the third and fourth adders, and the output of the second adder to the first inputs of the fifth and sixth adders, outputs of the third, fourth, fifth and sixth adders are connected to the input of the corresponding output registers, the outputs of which are the output of the device, and to the inputs of the shift control unit, the output of which is the output of the device’s large-scale coefficient and connected to the control inputs of the shift blocks of the real and imaginary parts of the first and second operands, contains four commutations three and two reset registers; when the output of the real part of the first operand is connected to the input of the first reset register and the first input of the first switch; the output of the imaginary part of the first operand to the input of the second reset register and the first input of the second switch; The imaginary parts of the second operand are connected to the second inputs of the second and first switches, respectively, the output of the first switch is connected to the second input of the second multiplier, and the output of the second switch to the second at the input of the fourth multiplier, the first inputs of the third m of the fourth switch are combined and are the input of the weighting function of the device window, the second inputs of the third and fourth switches are respectively the inputs of the real and imaginary parts of the device trigonometric coefficient, and the outputs of the third and fourth switches are valid and connected to the inputs of the registers the imaginary parts of the trigonometric coefficient, the output of the first reset register is connected to the second inputs of the third and fourth adders, and the output of the second reset register is to the BTOptiM inputs of the fifth and sixth adders. FIG. 1 is a functional block diagram of a device for calculating Fourier coefficients in FIG. 2, a possible embodiment of a structural implementation of a shift control unit. The device contains shift blocks 1-4, registers 5-8 real and imaginary parts of the first and second operands, switches 9-12, registers 13 and 14 of the real and imaginary parts. trigonometric coefficient, multipliers 15-18, registers 19 and 20 reset, intermediate registers 21-24, adders 25-30, shift control unit 31, output registers 32-35. The shift control unit 31 (Fig. 2) includes comparison circuits 36-39, element OR 40, trigger 41, element OR 42, triggers 43-45, delay element 46, elements AND 47, 48, counter 49, element OR 50. The device operation algorithm is described by the following expressions: Ai4 ,, (j) Ai (j) + Ai (V) W ... Ai -, (t) A, (j) - A- (10 iJ /, where A ; (j), (k) and W are complex numbers. Or: ReA;, (j | --Re (J) (() (. (. (e (n, 1 () (() ReW Hack as value the real part of the complex trigonometric coefficient at the first iteration is equal to the din (RgW 1), and the imaginary part is zero (9), then we have: Mt.i (il (., (jl,, () Re (il-Pe W ((| - Jm () From (3) it follows that the multiplication operand RgA, - (l.) and (k) may not be produced and replaced by multiplying the RpA, (j), (j), RjA (k),. (1) operands by the values of the weighing function of the window, using this multipliers 15-18. The device. works as follows: The complex operands A. (. j) and A (ft) to be processed, using a shift block 1-4, are written to the corresponding registers 5-8. Valid and imaginary parts of each number are written in separate registers. At the first iteration, the real and imaginary parts of the complex numbers A (j) from the outputs of registers 5 and 6 go to the inputs., The reset registers 19, 20 and through switches 9 and 10 to the inputs of multipliers 16 and 18. Through switches 11 and 12 into registers Figures 13 and 14 record the values of the weighting function of the window Q coming from the outside (for example, from a ROM). The passage of information arriving at a sec of the inputs of switches 9 and 10 from the outputs of registers 7 and B is prohibited. Four partial products RgA, - (1) Q, ReA. (J) Q,. (I) Q,. (J) Q, are written at the outputs of the multipliers 15-18, which are copied to intermediate registers 21-24. From the outputs of registers 21-24, partial products are received from the ka inputs of adders 25 and 26, the outputs of which form values equal to the sums: SgAj, / j) ReA (j) Q +. glf tl, t It ft.r, 4i (j), (j) Q +,. (k) Q. The obtained sums (4) go to the second inputs of adders 27-30, where they are added to the zeroes received from the outputs of the zeroed drop registers 19 and 20. From the outputs of adders 27 and 28, the information is written to the decoder registers 32 and 33 and is the end result calculating complex operands A- (j) at the first iteration. Then the adders 25 and 26 are set to subtraction mode and at their outputs the values of the operands A; 4 () equal to the differences ReA,. ,, (1) ReA; (j) Q - ReA- (1) Q, Vui (l ) V, -ImA () Q, which are fed to the second inputs of adders 27-30, where they are added to the zeroes coming from the outputs of the reset reset registers 19 and 20, from the outputs of adders 29 and 30, the information is written to the output registers 34, 35 and is the final result of computing the complex operands A; j (k) at the first iteration. On subsequent iterations of calculating the Fourier coefficients, switches 9 and 10 permit the passage of operands), RgA, - (1c) to the inputs of multipliers 16 and 18, switches 11 and 12 allow the passage of the values of the complex trigonometric coefficient W to the inputs of registers 13 and 14, is valid and the imaginary parts of operand A) (j) from the outputs of registers 5 and 6 are rewritten into registers 19, 20 and the device operates in accordance with the algorithm represented by expressions (1). In order to achieve maximum accuracy of calculations and eliminate overflow of the bit grid, automatic scaling of the operands and the results of calculations are performed. The operands arriving at the inputs of registers 5–8 are scaled by shifting in blocks 1–4 so that) | , (, (1.) |, lReA (j) |, jl Aj (j} l does not exceed 1/2. In the process of forming the sums Re (; A; (, A5 (K) R, WV. (, mPiW Vi e eAi) mW at the outputs of adders 25 and 26, it can be obtained that I Rp A (1) W - beats (1) --j but the discharge grid will not overflow. When generating amounts (1) in adders 27 - 30, the overflow of the discharge grid is possible.To prevent the occurrence of a data hanger, adders 27-30 and registers 32-35 contain an additional discharge, which fixes the overflow. Values „, .., 1t)}, 1 tl V 41 nr-lt-i- (j - tnAj + jU l as well as a signal about the presence or absence of overflow enter the unit pack shifts 31. Checking the conditions |), il. ,, (k), | ReA., (j) i, II | .j + (j) | f / 2 is performed using comparison circuits 36-39 and the element OR 40 and the result of the check is fixed in the trigger 41. With the help of the element OR 42 and the trigger 43 the overflow of the discharge grid is fixed at least in one of the adders 27 30. The signal from the end of the iteration is 710980048

trigger triggering 41, 43 is rewritten and 47 and 48 one of the signaling is generated

triggers 44 and 45. Over time, oplov for controlling the shifts in blocks

determined by the delay element 46,, 1-4; About shifts, 1 shift, 2 shifters 41 and 43 work in the outcome. The number of shifts in the process

the state, and the state of the tri-jBPF is recorded by the counter 49 and

The players 44. and 45 using the Elements form a scale factor.

Claims (1)

A device for calculating Fourier coefficients, containing blocks of shift of the real and imaginary parts of the first and second operands, registers of the real and imaginary parts of the first, second operands and trigonometric coefficient, four multipliers, four intermediate registers, six adders, a shift control unit, four output registers, and the information inputs of the blocks of the shift of the real and imaginary parts of the first and second operands are the inputs of the device, and their inputs are connected respectively to the inputs of the register of the real and imaginary parts of the first and second operands, the output of the register of the real part of the trigonometric coefficient is connected to the first inputs of the first and third multipliers, and the output of the register of the imaginary part of the trigonometric coefficient is connected to the first inputs of the second and fourth multipliers, the outputs of the registers of the real and imaginary parts of the second operand are connected to the second inputs of the first and third multipliers, respectively, the outputs of the multipliers are connected to the inputs of the corresponding intermediate registers, the outputs of the first the first and second intermediate registers are connected to the inputs of the first adder, and the outputs of the third and fourth intermediate registers are connected to the inputs of the second adder, the output of the first adder is connected to the first inputs of the third and fourth adders, and the output of the second adder is connected to the first inputs of the fifth and sixth adders, outputs g of the third, fourth, fifth and sixth adders are connected to the inputs of the corresponding output registers, the outputs of which are the outputs of the result of the device, and to the inputs of the shift control unit, the output of which is the output of the scale factor of the device and is connected to the control inputs of the shift unit of the real and imaginary parts of the first and second operands, characterized in that, in order to expand the functionality of the device, which consists in the ability to multiply the original data array by the window weighting function, it contains four switches and two reset registers, and the output of the register of the real part of the first operand is connected to the input of the first reset register and the first input of the first switch, the output is register the imaginary part of the first operand - to the input of the second reset register and the first input of the second switch, the outputs of the registers of the real and imaginary parts of the second operand are connected to the second inputs of the second and first switches, respectively, the output of the first switch is connected to the second input of the second multiplier, and the output of the second switch is to the second input of the fourth multiplier, the first inputs of the third and fourth switches are combined and are the input of the weighting function of the device window, the second inputs of the third and fourth comm tators are respectively the inputs of the real and imaginary parts of the trigonometric coefficient of the device, and the outputs of the third and fourth switches are connected to the inputs of the registers of the real and imaginary parts of the trigonometric coefficient, the output of the first reset register is connected to the second inputs of the third and fourth adders, and the output of the second reset register to the second the inputs of the fifth and sixth adders.