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SG79963A1 - Semiconductor device testing and burn-in methodology - Google Patents

Semiconductor device testing and burn-in methodology

Info

Publication number
SG79963A1
SG79963A1 SG9800654A SG1998000654A SG79963A1 SG 79963 A1 SG79963 A1 SG 79963A1 SG 9800654 A SG9800654 A SG 9800654A SG 1998000654 A SG1998000654 A SG 1998000654A SG 79963 A1 SG79963 A1 SG 79963A1
Authority
SG
Singapore
Prior art keywords
methodology
burn
semiconductor device
device testing
testing
Prior art date
Application number
SG9800654A
Inventor
Kiang Yew Chee
Hoch Tey Kim
Yu Chan Min
Tuek Fock Toh Jeffrey
Original Assignee
Texas Instr Singapore Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instr Singapore Pte Ltd filed Critical Texas Instr Singapore Pte Ltd
Priority to SG9800654A priority Critical patent/SG79963A1/en
Publication of SG79963A1 publication Critical patent/SG79963A1/en

Links

SG9800654A 1998-03-28 1998-03-28 Semiconductor device testing and burn-in methodology SG79963A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SG9800654A SG79963A1 (en) 1998-03-28 1998-03-28 Semiconductor device testing and burn-in methodology

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG9800654A SG79963A1 (en) 1998-03-28 1998-03-28 Semiconductor device testing and burn-in methodology

Publications (1)

Publication Number Publication Date
SG79963A1 true SG79963A1 (en) 2001-04-17

Family

ID=20429962

Family Applications (1)

Application Number Title Priority Date Filing Date
SG9800654A SG79963A1 (en) 1998-03-28 1998-03-28 Semiconductor device testing and burn-in methodology

Country Status (1)

Country Link
SG (1) SG79963A1 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0590986A1 (en) * 1992-09-30 1994-04-06 Texas Instruments Incorporated Lead-on-chip inner lead bonding lead frame, bonding method and apparatus
US5594273A (en) * 1993-07-23 1997-01-14 Motorola Inc. Apparatus for performing wafer-level testing of integrated circuits where test pads lie within integrated circuit die but overly no active circuitry for improved yield
US5600257A (en) * 1995-08-09 1997-02-04 International Business Machines Corporation Semiconductor wafer test and burn-in

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0590986A1 (en) * 1992-09-30 1994-04-06 Texas Instruments Incorporated Lead-on-chip inner lead bonding lead frame, bonding method and apparatus
US5594273A (en) * 1993-07-23 1997-01-14 Motorola Inc. Apparatus for performing wafer-level testing of integrated circuits where test pads lie within integrated circuit die but overly no active circuitry for improved yield
US5600257A (en) * 1995-08-09 1997-02-04 International Business Machines Corporation Semiconductor wafer test and burn-in

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