RU37286U1 - DEVICE FORMING A SIGNAL OF TWO-RELATIVE RELATIVE PHASE MODULATION - Google Patents

Description

03134716 DOUBLE SIGNAL FORMING DEVICE

RELATIVE PHASE MODULATION

The utility model relates to the field of telecommunications, in particular to devices for transmitting discrete signals (modems) via analog channels. A device for generating a signal of two times relative

phase modulation comprising a carrier frequency former

shift register, the first and second outputs of which are respectively connected to

the first and second inputs of the encoder, to the first and second outputs of which is connected a signal synthesizer consisting of an adder, in-phase and quadrature channels, each of which (in common-mode) includes five phase manipulators, a one-bit shift register, the course of which is connected to the first the input of the first phase manipulator and the first output of the encoder, the second output of which is connected to the input of the single-bit shift register of the quadrature channel, the second input of the first phase manipulator with Din with the output of a single-bit shift register, the third input of the first phase manipulator, the third input of the third phase, as well as the first, second, third inputs of the second phase manipulator are connected respectively to the fifth, first, second, fourth, third outputs of the driver of non-valid frequencies (in the quadrature channel respectively, with the tenth, sixth, seventh, ninth, eighth, outputs of the carrier frequency former), the first output of the first phase manipulator is connected to the first inputs of the third, fourth and fifth phase manipulator in second

IPC ri04 1/38

the output of the first phase manipulator is connected to the second inputs of the third, fourth and fifth phase manipulators, the first and second outputs of the second phase manipulator are connected respectively to the third input of the fourth and third input of the fifth phase manipulators, in the third, fourth, fifth phase manipulators the first and second outputs are connected between and are connected respectively to the first, second, third inputs of the adder, from the output of which the generated signal is removed.

However, this device generates a signal whose envelope in the time domain at the moment of phase change of the carrier frequency changes stepwise, as a result of which the signal has a wide spectrum of frequencies with a large level of side lobes, which reduces the reliability of its transmission through the standard channel of the tonal frequency.

The technical task of the utility model is to increase the reliability of the transmission of 1-wave signals over the standard channel of the tonal frequency based on the improvement of the spectral signals of the generated signal

The technical problem is solved by the fact that in the form-forming of a signal of two-phase relative phase modulation, containing a shaper of several frequencies, an input shift register, the first and second outputs of which are respectively connected to the first and second inputs of the encoding device, to the first and second outputs of which a signal synthesizer is connected consisting of an adder, in-phase and quadrature channels, each of which (in common-mode) includes five phase manipulators, a single-bit shift register, the input of which th connected with

the first input of the first phase manipulator and the first output of the encoder, the second output of which is connected to the input of the one-bit shift register of the quadrature channel, the second input of the first phase manipulator is connected to. the output of a one-bit shift register, the third input of the first phase manipulator, the third input of the third phase, as well as the first, second, third inputs of the second phase manipulator are connected respectively to the fifth, first, second, fourth, third outputs of the carrier frequency shaper (in the quadrature channel, respectively tenth, sixth, seventh, ninth, eighth, outputs of the carrier frequency former), the first output of the first phase manipulator is connected to the first inputs of the third, fourth and fifth phase manipulators, the second the output of the first phase manipulator is connected to the second inputs of the third, fourth and fifth phase manipulators, the first and second outputs of the second phase manipulator are connected respectively to the third input of the fourth and third input of the fifth phase manipulators, in the third, fourth, fifth phase manipulators the first and second outputs are connected between and connected respectively with the first, second, third inputs of the adder, from the output of which the generated signal is removed, characterized in that it is introduced into each channel l five additional phase manipulators, two one-bit shift registers, eight keys, a decoder, a three-bit shift register, the input of which is connected to the first input of the first phase manipulator, the first output of the encoder and the first input

4

a decoder, with the second input of the first phase manipulator and the second input of the decoder, the second and third outputs of the three-bit shift register connected to the third and fourth inputs of the decoder, the first output of the decoder connected to the second input of the first key, the second output of the decoder connected to the second input of the second key, the third output of the decoder is connected do the second inputs of the third and fourth keys, the fourth output of the decoder is connected to the second inputs of the fifth and sixth to beams, the fifth output of the decoder is connected to the second inputs of the seventh and eighth keys, the first and second inputs of the first, second, third, fourth and fifth additional phase manipulators are respectively connected to the first and second outputs of the first phase manipulator, the third inputs of the fourth, fifth and sixth additional phase the manipulators are connected to the second output of the first phase manipulator, the third input of the first additional phase manipulator is connected to the third input of the third phase manipulator, the third the course of the fourth additional phase manipulator is connected to the output of the second one-bit shift register, the input of which is connected to the first output of the second phase manipulator, the third input of the fifth additional phase manipulator is connected to the first input of the first one-bit shift register, the input of which is connected to the second output of the second phase manipulator, in the third , fourth, fifth phase manipulators, first, second, third, fourth, fifth, additional phase manipulators first and second outputs

// Ol are interconnected and connected respectively to the first input of the nerve, second, third, fourth, fifth, sixth, seventh, eighth

keys whose outputs are connected respectively to the first, second, third, fourth, fifth, sixth, seventh, eighth inputs of the adder (in the quadrature channel, respectively, to the ninth, tenth, eleventh, twelfth, thirteenth, fourteenth, fifteenth, sixteenth inputs of the adder) from the output which the formed signal is removed.

The usefulness of the utility model is illustrated by drawings, where in Fig.1 shows a structural electrical diagram of the proposed device; in FIG. 2,3,4,5 algorithms for the operation of structural elements.

The signal conditioning apparatus of the double-phase asho-phase phase modulation comprises an input shift register 1, an encoder 2, a carrier shaper 3, a signal synthesizer 4, consisting of QTVDViaTopa 4.3, in-phase 4.1. and quadrature 4.2. channels, each of which includes a decoder 4.1.20 (4.2.20), a three-digit shift register 4.1.1 (4.2.1), five phase manipulators 4.1.2 - 4.1.5 (4.2.2 - 4.2.5), five additional phase machiners 4.1.7 - 4.1.11 (4.2.7 - 4.2.11), eight keys 4.1.12 - 4.1.19 (4.2.12 - 4.2.19), two one-bit shift registers 4.1.21.4.1 .22 (4.2.21,4.2.22).

The signal conditioning device of the twofold relative phase modulation implements the twofold relative phase modulation of the input dyadic sequence of signals s (i) (Fig. 1). actions

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device signal generation of double relative phase modulation is as follows.

The input binary sequence of pulses s (t) is fed to the input of shift register 1, at the outputs of which two sequences of binary signals cl (t) and c2 (t) are formed with a pulse repetition rate half that of binary pulses in the sequence s (t). Moreover, the ith character of the sequence s (t) is located on one output of the register, and / + 7) W is the symbol on the dztug output. The encoder 2 converts the binary sequences cl (t) and c2 (t) into the binary sequences el (t) and e2 (t) according to the algorithm (Fig. 2), which provides the device for generating a signal of double relative phase modulation to realize a two-phase relative-to-angle phase modulation (Fig. 3;) based on a signal synthesizer 4 that implements twice phase modulation (absolute) (Fig. 4).

Each channel (in-phase and quadrature) of signal synthesizer 4 and 4, 4, implements digital phase modulation methods for processing sipils and provides the same phase modulation (Fig. 5). Moreover, depending on the values of the dyonic symbols e (t) (1 or 0), the phase of the carrier frequency at the output of the in-phase channel decreases the 0 °

or 180 °, and at the exit kvadurturtsgo. channel - 90 ° or 270 °. This is achieved by

., - ..

that the meanders of the same name (playing the role of carriers carrying sources) are fed to each channel with a phase shift of 180.

Using the adder 4.3, the signals from the outputs of the in-phase 4.1 and quadrature 4.2 channels are combined As a result, the phase of the output signal, depending on the values of the symbols el f (t) and e2f (t), received

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signal synthesizer signal can be pressed in one of four values: 45 °, 135 °, 225 ° and 315 °

The principle of operation of each channel (in-phase and quadrature) is similar and concludes in the following (using the in-phase channel 4.1 as an example).

A single phase modulation of the carrier frequency t equal to the average frequency of the passband of the PM channel is carried out in two stages. At the first stage, phase modulator 4.1.3 carries out phase modulation of the carrier frequency ec1 - As a result, the signal spectrum el (t) is transferred to the region of higher frequencies. At the second stage, by phase manipulators 4.1.4–4.1.6 and additional phase manipulators 4.1.7–4.11, the signal spectrum el (t) is transferred to the middle part of the effective transmitted frequency band of the PM channel. Gfichem, in the process of functioning of the device for generating a signal of twofold relative phase modulation, carrier frequency modulation / sun

osuschestvlyaetsya by work of one of five fupp phase manipulators - and

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additional phase manipulators: 1 group - 4.1.3, 4.1.4; 2 group - 4.1.3, 4.1.7; 3 group - 4.1.3, 4.1.5, 4.1.6; 4 group-4.1.3, 4.1.8, 4.1.9; 5group-4.1.3, 4.1.10,4.1.11.

Since the meander from the first output of the carrier frequency former is supplied to the phase shifter 4.1.4 and the additional phase shifter 4.1.7 as the carrier frequency, when the first two phase manipulators are working, the carrier envelope Xvs of the output signal will be constant in the time domain (in the band of the effective transmitted frequency band of the PM channel, only the first harmonic of the meander is used). Moreover, the first group of phase

of manipulators, a phase-manipulated signal forms at its output when two identical symbols (00 or 11) simultaneously arrive in the sequence el (i), the second group of phase manipulators 1ul5пх) ditches - two different symbols (01 or

Phase manipulators 4.1.5, 4.1.6 and additional phase manipulators 4.1.7 - 4.1.11 use phase-shifted signals from the outputs of the phase manipulator 4.1.2 as carrier frequencies. Moreover, to additional 1-phase phase manipulators 4.1.10, 4.1.11, these signals are supplied respectively through single-bit shift registers 4.1.22, 4.1.21. With the simultaneous operation of all phase manipulators in each group due to compensation of harmonics, the envelope of the carrier frequency cc in the time domain will change according to the harmonic law. Moreover, during the work of the third and fourth groups of phase manipulators, the envelope of the carrier frequency will change according to the sinusoidal law, and during the work of the fifth group, according to the obsolete law.

The third group of phase manipulators generates a phase-shifted signal at its output when two identical simulators (00 or 11) arrive simultaneously in the sequence el (t), and the fourth and fifth groups of phase manipulators form two different symbols (01 or 10). The envelope of the carrier frequency of the output signal during operation of the third and fourth groups will increase from zero to the maximum value in accordance with the z law, and during the work of the fifth group of phase manipulators, it will decrease according to the harmonic law. -.

AJ / (So, depending on which group of phase manipulators

will be connected by keys 4.1.12 - 4.1.19 to the input of the adder 4.3, the envelope of the carrier frequency f of the output signal in the time domain will either be constant or increase or decrease. By connecting the outputs of phase manipulators 4.1.4 - 4.1.6 and additional phase manipulators 4.1.7 4.1.11 according to a certain law, it is possible to ensure that the envelope of the output signal does not change stepwise.

The phase of the HVS carrier frequency at time t is determined by the value of the incoming symbol elftif): at el (the Hvv phase is 180 °, at el (the f phase is 0 ° (for the quadrature channel: at e2 (the phase. The Hvv is 270 °, at e2 (tif) l phase. Хвс equals 90 °).

The law of connecting the outputs of phase manipulators 4.1.4 - 4.1.6 and additional phase manipulators 4.1.7 - 4.1.11 determines the decoder 4.1.20, the input of which receives the characters of the sequence el (t).

We cry to the pfv input of the decoder, the characters are sent in a certain way without delay, and to the other three inputs through the three-digit shift register 4.1.1, delayed by one, two, and -phi respectively.

When the common-mode channel 4.1 receives four symbols 0000 of the sequence el (t) only at the first output of the decoder, a single symbol appears, which, using the key 4.1.12, connects the output of the first group of phase manipulators to the first input of the adder 43.

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9 v SYMBOL, which, using the key 4.1.13, connects the output of the second group of phase shifters to the input of the adder 4.3. When four symbols of OOP or 1011 of the sequence el (i) are received at the input of the low-phase channel 4.1, only a single symbol appears on the third output of the decoder, which, using the keys 4.1.14 and 4.1.15, connects the output of the third group of phase manipulators to the third and fourth inputs of adder 4.3, respectively. When a common mode channel 4.1 is plugged in, four characters 0001, OJOl, .g .. 1001, 1101 or 1110 of the el (t) sequence appear only at the fourth input of the decoder, a single character appears that connects the output with the keys 4.1.16 and 4.1.17 the fourth group of phase manipulators, respectively, to ttyayumu, the sixth inputs of the adder 4.3. When four characters 0010, 1010 of the sequence el (t) are received at the input of the common-mode channel 4.1, only a single symbol appears on the fifth output of the decoder, which, using the keys 4.1.18 and 4.1.19, connects the input of the fifth circuit of the phase of the multiples to the seventh and eighth inputs of the adder 4.3. The implementation of this device is most chain-phased on the basis of traditional digital circuitry: IC series 155,140,564,544,; or using computers or signal microtoprocessors. Sources of information, taken into account for examination:

1. “Product G1M and G2. TO..0213.001.TO. Irschip work. Instructions for exhagation.

2. “Product PM and G2. TO..0213.001 .TO1. Scheme.

3.Gurov B.C., Emelyanov G., Etrukhin N.N. Transmission of digital information and telegraphy. M .; “Communication, 1% 9, S.327 - 330.

4.Chernega B.C., Vasilenko VA, Bondfev VN. Calculation and design of technical funds for the exchange and transfer of information. M .; "Higher School, 1990. S.146-150.

Claims (1)

A device for generating a signal of twofold relative phase modulation, comprising a carrier frequency shaper, an input shift register, the first and second outputs of which are respectively connected to the first and second inputs of the encoder, the signal synthesizer consisting of an adder, in-phase and quadrature channels is connected to the first and second outputs of which , each of which (using the common-mode example) includes five phase manipulators, a one-bit shift register, the input of which is connected to the first input of the first phase manipulator and the first output of the encoder, the second output of which is connected to the input of the one-bit shift register of the quadrature channel, the second input of the first phase manipulator is connected to the output of the one-bit shift register, the third input of the first phase manipulator, the third input of the third phase, as well as the first, second, third the inputs of the second phase manipulator are connected respectively to the fifth, first, second, fourth, third outputs of the carrier frequency former (in the quadrature channel, respectively ninth, sixth, seventh, ninth, eighth, outputs of the carrier frequency former), the first output of the first phase manipulator is connected to the first inputs of the third, fourth and fifth phase manipulators, the second output of the first phase manipulator is connected to the second inputs of the third, fourth and fifth phase manipulators, the first and second outputs of the second phase manipulator are connected respectively to the third input of the fourth and third input of the fifth phase manipulators, in the third, fourth, fifth phase manipulators of the first and the second outputs are interconnected and connected respectively to the first, second, third inputs of the adder, from the output of which a generated signal is removed, characterized in that five additional phase manipulators, two single-bit shift registers, eight keys, a decoder, are inserted into each channel a three-bit shift register, the input of which is connected to the first input of the first phase manipulator, the first output of the encoder and the first input of the decoder, while to the first output of the three-bit shift register under the second input of the first phase manipulator and the second input of the decoder, the second and third outputs of the three-bit shift register are connected respectively to the third and fourth inputs of the decoder, the first output of the decoder is connected to the second input of the first key, the second output of the decoder is connected to the second input of the second key, the third output of the decoder connected to the second inputs of the third and fourth keys, the fourth output of the decoder is connected to the second inputs of the fifth and sixth keys, the fifth output of the decoder is connected to the second inputs of the seventh and key, the first and second inputs of the first, second, third, fourth and fifth additional phase manipulators are respectively connected to the first and second outputs of the first phase manipulator, the third inputs of the fourth, fifth and sixth additional phase manipulators are connected to the second output of the first phase manipulator, third input the first additional phase manipulator is connected to the third input of the third phase manipulator, the third input of the fourth additional phase manipulator is connected to the output m of the second one-bit shift register, the input of which is connected to the first output of the second phase manipulator, the third input of the fifth additional phase manipulator is connected to the output of the first one-bit shift register, the input of which is connected to the second output of the second phase manipulator, in the third, fourth, fifth phase manipulators, the first , second, third, fourth, fifth additional phase manipulators, the first and second outputs are interconnected and connected respectively to the first input of the first, second, t the fourth, fifth, sixth, seventh, eighth keys, the outputs of which are connected respectively to the first, second, third, fourth, fifth, sixth, seventh, eighth inputs of the adder (in the quadrature channel, respectively, to the ninth, tenth, eleventh, twelfth, thirteenth , the fourteenth, fifteenth, sixteenth inputs of the adder), from the output of which the generated signal is removed.