RU2267810C1 - System for situation-based analysis of passenger transportations - Google Patents

Abstract

FIELD: computer science, in particular, system for situational analysis of passenger transportation.

SUBSTANCE: system has block for selection of database addresses, block for forming recording signals and reading server database, block for controlling selection of data, first and second registers, block for comparing codes, five blocks for selecting record parameters, memory block, first group memory block, second group memory block, third group memory block.

EFFECT: higher speed of operation of system due to localization of range of data search addresses in server database using voyage group identifiers and given time period.

11 dwg

Description

The invention relates to computer technology, in particular to a system for situational analysis of passenger traffic of a transport company.

The primary statistics used as a source material for the operational analysis and decision-making on passenger traffic performed for any given period, as a rule, contains the following set of indicators: flight number, name of the route, number of completed flights of each number for a given period, income per flight, income per passenger kilometer, average return rate per flight, for each booking class, total flight income for a given period, occupancy rate of seats on the flight, if ETS passengers carried, million. passenger-million. kreslokilometrov etc.

Comparison of the dynamics of changes in these indicators in their interconnection allows us to judge with sufficient probability the potential of the operated market, the structure of passenger traffic (at the profitable rate), the effectiveness of the schedule (the correct placement of aircraft), the correct application of tariffs, etc.

However, a quantitative analysis of such indicators for many flights is beyond the power of even a highly qualified expert conducting these flights due to the high complexity of such a task.

In this regard, it seems advisable to develop such a system of situational analysis that would allow filtering out those problematic (critical) flights for which any indicators go beyond the specified critical levels. In other words, such a system from the entire mass of flights completed over a given period of time should select only those that are characterized, for example, by negative dynamics of loading, revenues, decrease in the profit rate, sharp asymmetry of loading for direct and return flights, or vice versa, select flights with positive dynamics, etc.

In fact, such a system should be a multi-channel filter, generating at the output a certain subset of groups of flights in accordance with the given criteria or their combination. A more thorough analysis of such flights can answer the question of whether the market is in a state of saturation (offers exceed demand), or if its potential is not exhausted and the market is promising, etc.

The level of discrimination (criterion for the selection of critical flights) should be adjusted in a fairly wide range depending on the specific task of analysis and the current market situation in the considered period of time.

Formally, the problem of multi-channel filtering of the initial array of flights is formulated as a choice problem in which conditions are fixed in the form of a system of restrictions (equalities and inequalities). A lot of hierarchically interconnected indicators, limited by target levels of discrimination together with the initial indicators, form an information model of a multi-channel filter.

A generalized algorithm for automated situational analysis of passenger flights using such a filter is presented in Fig.11.

Preparing the algorithm for work includes parameterization of the initial conditions when the following parameters are set:

- study period of time (i);

- base comparison period, usually (i-1);

- level of aggregation (region, group of flights, etc.).

The structure of the algorithm is a tree graph, where at each level of its branching corresponding levels of discrimination (selection criteria) are set.

1st level analysis. At the first level of analysis, criterion D is selected as a criterion - the average income per flight. Using this criterion, two new arrays are formed at the first level: M1 and M2 with the worst and best values of this criterion, respectively.

Thus, the 1st level of analysis allows you to automatically highlight flights with positive and negative dynamics of income.

2 - level of analysis. Two criteria are set here: load factor -% seat occupancy and Pax - number of passengers carried per flight.

At this level, two arrays of M3 and M4 with low and high load of seats, respectively, as well as two arrays of M21 and M22 from low-profit flights with a large number of passengers carried and a low number, respectively, are formed from high-profit flights.

3 - level of analysis. Here, the selection criterion Pax is applied to high-yield arrays of M3 and M4, and the criterion of the average rate of return is applied to low-yield arrays.

Known systems that could be used to solve the problem [1, 2].

The first of the known systems comprises data reception and storage units connected to control and data processing units, search and selection units connected to data storage and display units, the synchronizing inputs of which are connected to the outputs of the control unit [1].

A significant drawback of this system is the impossibility of solving the problem of updating data stored in memory in the form of relevant documents at the same time as solving the problem of delivering the contents of these documents to users in real time.

Another system is known, comprising data receiving units whose outputs are connected to a memory unit and to a data processing unit, a time interval selection unit whose outputs are connected to a data receiving unit, to a user request receiving unit and to a memory unit and to a data processing unit, the outputs of which are connected to one of the inputs of the switching unit of the data output channels, the other inputs of which are connected to the selection of time intervals, and the outputs are the outputs of the system [2].

The last of the above technical solutions is closest to the described.

Its disadvantage is the low speed of the system, due to the fact that the search for the requested data is carried out throughout the database system, which leads to unreasonable loss of time to search for the required information and conduct situational analysis.

The purpose of the invention is to increase the speed of the system by excluding the search for the requested data throughout the database of the system for situational analysis of passenger traffic and selecting data only by identifiers of the flight group and time period.

This goal is achieved by the fact that in a known system containing a selection block of server database addresses, the first and second information inputs of which are the first and second information inputs of the system, the first and second synchronizing inputs of which are the first and second synchronizing inputs of the system, and the first information output is the first information output of the system, a data sampling control unit, the information input of which is the third information input of the system, one synchronizing the input is the third synchronizing input of the system, and the other is connected to the second synchronizing input of the system, the unit for generating signals for writing and reading the database, the information input of which is connected to the second information output of the server database address selection block, the first and second synchronizing inputs are connected to the first and second by the synchronizing outputs of the server database address selection block, respectively, the first and second control inputs are connected to the first and second outputs of the control unit data sampling, respectively, and the information output is the address output of the system, while the first synchronizing output of the recording and reading signal generating unit is connected to the first control input of the data sampling control unit and is the first synchronizing output of the system, and the second synchronizing output of the recording signal generating unit and the database reader is connected to the second control input of the data sampling control unit and is the second synchronizing output of the system, the first an register, the information input of which is the fourth information input of the system, the synchronizing input is connected to the second synchronizing input of the system, and the output is connected to one input of the first code comparison unit, the second register, the information input of which is the fifth information input of the system, the synchronizing input is the fourth synchronizing input of the system , and one output is connected to another input of the first code comparison unit, the synchronizing input of which is connected to the fourth synchronizing input the system, the memory blocks of the first group, the information outputs of which are the second and third information outputs of the system, the memory blocks of the second group, the information outputs of which are the fourth and fifth outputs of the system, the memory blocks of the third group, the information outputs of which are the sixth and seventh information outputs of the system, and a memory unit, the information output of which is the eighth information output of the system, characterized in that the system comprises a first block for selecting recording parameters, a first sync the lowering input of which is connected to one output of the code comparison unit, the second synchronizing input is connected to the third synchronizing output of the data sampling control unit, the third synchronizing input is connected to the third synchronizing input of the system, the first information input is connected to another output of the second register, and the second information input is connected to the fourth information input of the system, the second block of selection of recording parameters, the first synchronizing input of which is connected to another output of the block is compared I have codes, the second clock input is connected to the third clock output of the data sampling control unit, the third clock input is connected to the third clock input of the system, the first information input is connected to another output of the second register, and the second information input is connected to the fourth information input of the system, the third selection block recording parameters, the first information input of which is connected to the information output of the first block of selection of recording parameters, the second information input connected to the fourth information input of the system, the first synchronizing input is connected to the first synchronizing output of the first block of selection of recording parameters, the second synchronizing input is connected to the second synchronizing output of the first block of selecting recording parameters, the third synchronizing input is connected to the third synchronizing input of the system, the information output is connected to information the inputs of the memory blocks of the first group, the first and second synchronizing outputs are connected to the corresponding synchronization the input memory blocks of the first group, and the third synchronizing output is connected to the fourth synchronizing input of the first block of selection of recording parameters, the fourth block of selection of recording parameters, the first information input of which is connected to the information output of the first block of selection of recording parameters, the second information input is connected to the fourth information input system, the first synchronizing input is connected to the first synchronizing output of the first block of selection of recording parameters, the second synchronization the clock input is connected to the second clock output of the first block of selection of recording parameters, the third clock input is connected to the third clock input of the system, the information output is connected to the information inputs of the memory blocks of the second group, the first and second clock outputs are connected to the corresponding clock inputs of the memory blocks of the second group, and the third synchronization output is connected to the fifth synchronization input of the first block of selection of recording parameters, and the fifth block of selection of pairs meter records, the first information input of which is connected to the information output of the second block of selection of recording parameters, the second information input is connected to the fourth information input of the system, the first synchronizing input is connected to the first synchronizing output of the second block of selection of recording parameters, the second synchronizing input is connected to the second synchronizing output of the second block recording parameter selection, the third clock input is connected to the third clock input of the system, information the ion output is connected to the information inputs of the memory blocks of the third group, the first and second synchronizing outputs are connected to the corresponding synchronizing inputs of the memory blocks of the third group, and the third synchronizing output is connected to the fourth synchronizing input of the second block of selection of recording parameters, while the control outputs of the memory blocks of the first group are connected with the fourth and fifth synchronizing inputs of the third block of recording parameter selection, respectively, the control outputs of the memory blocks are second of the first group are connected to the fourth and fifth synchronizing inputs of the fourth block of selection of recording parameters, respectively, the control outputs of the memory blocks of the third group are connected to the fourth and fifth synchronizing inputs of the fifth block of selecting recording parameters, respectively, the information input of the memory block is connected to the information output of the second block of selecting recording parameters, the synchronizing input is connected to the third synchronizing output of the second recording parameter selection block, and the control output of the block amyati connected to a fifth clock input of the second selection unit records parameters.

The invention is illustrated by drawings, where Fig. 1 shows a block diagram of a device, Fig. 2 shows an example of a specific structural embodiment of a server database address selection unit 1, Fig. 3 an example of a specific structural embodiment of a flight group identifier, Fig. 4 - an example of a specific constructive implementation of the identifier of the time period, in Fig.5 is an example of a specific constructive implementation of the unit for generating signals for writing and reading the server database, in Fig.6 is an example specifically of the first structural embodiment of the data sampling control unit, FIG. 7 is an example of a specific structural embodiment of a first code comparison unit, FIG. 8 is an example of a specific structural embodiment of a first and second recording selection block, and FIG. 9 is an example of a specific structural embodiment of a third, fourth and the fifth blocks of selection of records, figure 10 is an example of a specific constructive implementation of the memory blocks.

The system (Fig. 1) contains a block 1 of selection of database addresses, a block 2 of generating signals for writing and reading a database of a server, a block 3 of controlling data sampling, the first 4 and second 5 registers, a block 6 for comparing codes, the first 7, the second 8, the third 9, fourth 10 and fifth 11 blocks for selecting recording parameters, memory block 12, memory blocks 13 and 14 of the first group, memory blocks 15 and 16 of the second group, memory blocks 17 and 18 of the third group.

Figure 1 shows the first 25, second 26, third 27, fourth 28 and fifth 29 information inputs of the system, the first 30, second 31 and third 32 synchronizing inputs of the system, the first 35, second 36, third 37, fourth 38, fifth 39, sixth 40, seventh 41 and eighth 42 information outputs of the system, address 43 and the first 44 and second 45 synchronizing outputs of the system.

Block 1 selection of database addresses (figure 2) contains registers 50-51, identifier 52 group of flights, identifier 53 of the time period, adder 54 and element 55 OR. The drawing also shows the inputs 25, 26, 30, 56 and the outputs 57-60 of the block.

An example of a specific constructive implementation of the identifier 52 of the group of flights is shown in Fig.3. It includes a memory unit 61, made in the form of read-only memory, a decoder 62, a register 63, elements 64-66 AND, element 67 OR, elements 68-71 delay. The drawing also shows the inputs 72-73 and outputs 74-76 of the block.

An example of a specific constructive implementation of the identifier 53 of the time period is shown in Fig.4. It includes a memory unit 77, made in the form of read-only memory, a decoder 78, a register 79, elements 80-82 AND, element 83 OR, elements 84-85 delay. The drawing also shows the inputs 86-87 and the output 88 of the block.

Block 2 generating signals for writing and reading the database of the server (Fig. 5) contains a counter 90, a trigger 91, elements 92-96 AND, elements 97-98 OR, elements 99-101 delays. The drawing also shows the inputs 105-109 and outputs 43-46.

The data sampling control unit 3 (FIG. 6) comprises a register 111, a comparator 112, a counter 113, OR elements 114-115, delay elements 116-1 and 116-2. The drawing also shows the inputs 27, 30-31, 44-45 and outputs 119-120.

Block 6 code comparison (Fig.7) contains a comparator 121 and a delay element 122. The drawing also shows inputs 123-125 and outputs 126-127.

Blocks 7, 8 for selecting recording parameters (Fig. 8) are identical and contain random access memory 130, a reverse counter 131, registers 132, 133, comparators 134, 135, OR elements 136, 137, delay elements 138-140. The drawing also shows inputs 141-147 and outputs 148-151.

Blocks 9, 10, 11 for selecting recording parameters (Fig. 9) are identical and contain random access memory 160, a reverse counter 161, registers 162, 163, comparators 164, 165, OR elements 166, 167, delay elements 168-170. The drawing also shows the inputs 171-177 and outputs 178-182.

The memory blocks 12-18 (FIG. 10) are identical and comprise random access memory 190, a counter 191, and a delay element 192. The drawing also shows the inputs 193-194 and outputs 195-196.

The system operates as follows.

After a specified time (calendar) period has elapsed, for example, a quarter, six months, or years, entries of an array of indicators successively enter the system’s input 25, characterizing the results of passenger transportation of a transport company for a specified period, the structure of which has the following form (Table 1):

Table 1 INDICATORS CODE value indicators Flight number Route name The number of completed flights of each room for a given period Revenue per flight Passenger Kilometer Income Average return rate per flight for each booking class Complete flight revenue for a given period % seat occupancy on flight number of passengers carried million passenger kilometers million armchair kilometers

The receipt of an array of indicators at input 25 is accompanied by another codogram, the structure of which has the following form (Table 2):

table 2 THE CODE THE CODE THE CODE identifier of the time period to which the array of indicators relates region identifier (group of flights) the number of records in the array of indicators

Part of this codogram, including the identifier of the time period identifier and the identifier code of the region (group of flights) from the input 26 of the system goes to the information input of the register 51 of block 1, and the remaining part, including the code of the number of entries in the array of indicators, comes from the input 27 of the system to the information input register 111 of block 3.

The entry of the input codes into the corresponding registers is carried out by the synchronizing signal supplied to the inputs 30 of the system. According to this signal, which, in parallel with entering data into the registers 50, 51 and 111, from the output 59 of block 1 immediately goes through the input 106 of block 2 to the single input of trigger 91 and sets it to a single state. In this state, a trigger with a high potential from a single output supports elements 92, 95 I. in the open state.

The data of the first record of the incoming array from the output 57 of the register 50 of block 1 is immediately output to the information output 35 of the system, and the output codes of the register 51 go to the input 72 of the identifier 52 of the flight group and the input 86 of the identifier 53 of the time period, respectively (Fig. 2).

From the input 72 of the identifier 52 of the group of flights, the register code 51 (Fig. 3) is input to the decoder 62. The decoder 62 decodes the code of the sign of the group of flights, giving a high potential to one of its outputs. For definiteness, we assume that a high potential is received at one input of element 64 I.

In parallel, the synchronizing pulse from the output of element 55 OR block 1 is fed to input 73 of block 52, where it is delayed by element 68 while the code is entered into register 51 and the decoder 62 is activated. Then the same pulse goes to the inputs of elements 64-66 AND, interrogating their condition.

Taking into account the fact that only element 64 AND will be open at one input, then passing this element AND, the clock pulse arrives, first, at the read input of a fixed memory cell of the permanent storage device 61, where the reference address of the memory cell of the server database is stored, starting with which an array of incoming indicators will be stored in the server database, and reads the code of the reference address to the input of the register 63.

Secondly, the read pulse from the output of the AND element 64, having passed the OR element 67, is delayed by the delay element 69 for the time of reading the contents of the fixed ROM cell, and then it arrives at the synchronizing input of the register 63, fixing the reference address of the server database in it.

In parallel with the described process, the code of the sign of the calendar period from another output of the register 51 through the input 86 of the block 53 is fed to the input of the decoder 78 (figure 4).

The decoder 78 of the block 53 decodes the code of the sign of the calendar period, giving out one of its outputs high potential. For definiteness, we assume that a high potential is received at a single input of element 80 I.

In parallel, the synchronizing pulse from the output of the element 55 OR block 1 is fed to the input 87 of the block 53 and then goes to the inputs of the elements 80-82 AND, interrogating their status.

Considering the fact that only element 80 I will be open at one input, then passing this element AND, the clock pulse is fed to the read input of the corresponding fixed memory cell of the permanent storage device 77, where the relative address of the memory cell of the server database is stored, starting from which in the database server data will be stored an array of signs of the specified calendar period, and reads the code of the relative address of the calendar period to the input of the register 79.

Secondly, the read pulse from the output of the AND element 80, having passed the OR element 83, is delayed by the delay element 85 for the time of reading the contents of the fixed ROM cell, and then it arrives at the synchronizing input of the register 79, fixing in it the relative address of the server database.

Codes from the outputs of registers 63 of block 52 and 79 of block 53 are fed to the information inputs of adder 54, which, by a synchronizing pulse from output 75 of block 52, sums the input codes, forming the reference address of the server database, starting from which the array of reporting indicators will be stored in the server database calendar period.

The generated address code from the output 58 of block 1 through the input 105 of block 2 (Fig. 5) is fed to the information input of the counter 90, where it is entered by the synchronizing pulse from the output 60 of block 1 to the input 107 of block 2. As a result, the output 43 The system generates the address of the memory cell of the server database, into which the first record of the incoming array should be written.

At the same time, the same synchronizing pulse from the input 107 of block 2 passes through the element 92 AND, is delayed by the element 99 for the duration of the counter 90 operation, and then, firstly, through the element 97 OR is issued to the output 44 of the system as a control pulse of the record, arriving at the input of the first channel of the server interrupt.

By this signal, the server goes to the recording routine of the first record of the data array from the output 35 of the system at the address generated at the output 43.

Secondly, the same pulse from the output 44 of the element 97 OR block 2 through the input 117 of block 3 passes the element 115 OR and enters the counting input of the counter 113 and increases its readings by one, because before this pulse arrived, the counter 113 was in its initial state. The counter is fed to one input of the comparator 112, the other input of which receives the code for the number of records from the output of the register 111.

According to the clock signal delayed by the delay element 116-2 for the response time of the counter 113 supplied to the clock input, the comparator 112 compares the values of the input codes. Considering that at this moment only the first record of the data from the received array has been made, the readings of the counter 113 will be less than the code in the register 111, and an output is generated at the output 119 of the comparator 112 of block 3, which is fed to the input 108 of block 2.

From the input 108 of block 2, this clock pulse immediately arrives at the counting input of the counter 90 and increases the address code at the output 43 by one. At the same time, the same pulse passes through the 95 I element, is delayed by the 100 element for the duration of the counter operation, and then through the OR element 97 it is again output to the output 44 of the system as a write control pulse received at the input of the first server interrupt channel.

By this signal, the server again switches to the subroutine for recording the next record of the data array from the output 35 of the system at the address generated at the output 43.

The described process of sequential recording in the server database of all data of the received indicators will continue until the comparator 112 of block 3 fixes the equality of the codes of the register 111 and the counter 113. At this moment, a synchronizing signal will be generated at the output 120 of the comparator 112, which through the input 109 unit 2 is supplied to the installation inputs of the counter 90 and trigger 91 and sets them to their initial state.

In addition, from the output 120 of the comparator 112, a synchronizing pulse is supplied to the installation inputs of the registers 50, 51 of block 1 and the register 111 of block 3, also setting them to their initial state (to simplify the drawing of the initial setup circuit of the registers 50, 51 of block 1 and the register 111 of block 3 not shown in the drawing).

Thus, in the server database arrays of reported passenger traffic efficiency indicators are generated, which were carried out by the company for all previous time periods.

The user of the system, allowed to work on the situational analysis of flights, forms two request codograms at the workstation.

The first codogram, which defines an array of numerical indicators subject to situational analysis, has the following structure (Table 3):

Table 3 THE CODE THE CODE THE CODE identifier group sign numerical value study period flights (region) number of entries time subject to situational analysis

The second codogram, which determines the numerical values of the criteria for situational analysis, has the following structure (Table 4):

Table 4 THE CODE THE CODE THE CODE THE CODE numerical numerical numerical numerical values values values values criterion D - Kz criterion - criterion Pax - criterion Doh. - middle coefficient quantity average income income on downloads transported bids one flight passengers on one flight

From the user's workstation, the feature codes of the first codogram are sent to the information input 26 of the system, from where they are entered into the register 51 of block 1 using a synchronizing pulse, which is fed to the input 31 of the system and then through the input 56 of block 1, passing element 55 OR, is fed to the synchronizing register input 51.

The code of the numerical value of the number of records of the first codogram is fed to the information input 27 of the system, from where it is entered into the block register 111 with the same clock pulse from input 31.

Codes of numerical values of the second codogram from the information input 28 of the system are received in the corresponding registers of the system. So, for example, the code of the numerical value of the criterion D - the average income per flight enters register 4, the code of the criterion Kz - load factor enters the register 133 of block 7, the code of the criterion Pax - the number of passengers carried per flight enters the register 133 of block 8, in the register 163 of block 9 and in the register 163 of block 10, and the criterion code Doh.st - the average income rate goes to the register 163 of block 11.

The codes of the second codogram are entered into the corresponding registers of the system by a synchronizing pulse from the input 31 of the system.

The read address of the array of the requested server database data is generated by the adder 54 of block 1 on the basis of input features in the same way as when generating the record address of the data arrays described above.

The only difference is that in the request mode for conducting a situational analysis, trigger 91 of block 2 remains in its original state, since no input signals arrive at it. As a result of this, the AND element 92 will be closed, and the And element 93 will be opened with high potential from the inverse output of the trigger 91. As a result, the clock pulse from the input 107 of block 2, passing the element 98 OR to the output 45 of the system as a control signal for reading the database server.

From output 45, the read control signal is fed to the input of the second server interrupt channel.

By this signal, the server switches to the subroutine for polling the contents of the cell record at the generated address at the output 43 of the system.

The contents of the base address of the selected memory cell is issued by the database server through the system input 29 to the information input of register 5, where it is entered by the server synchronizing pulse coming from the system input 32.

The structure of the data record in register 5 will be the first record of the data array shown in table 1.

The code of the average rate of return for one flight contained in a read record, from the output of register 5, is input to 123 of the code comparison unit 6 (Fig. 7), to the other input of which the code of the selected value of the criterion of the rate of return is submitted.

The comparator 121 of block 6 compares the codes by a clock pulse coming from input 32, which is then delayed by element 122 while the code is entered in register 5 and then passes to the synchronizing input of comparator 121.

If the numerical value of the criterion D in register 4 is greater than the numerical value of the average income per flight contained in the record, then the output 126 of the comparator 121 receives a pulse that goes to the input 141 of block 7 and then to the counting input of the reversing counter 131, increasing the contents of the counter per unit. Given that the reversible counter was in its original state, a code equal to one will be recorded at its output. From the output of the reversible counter, the code enters the address input of random access memory (RAM) 130.

In addition, the same pulse from input 141 is delayed by element 138 for the time that counter 131 is triggered, and then it is fed to the write control input of RAM 130. This signal is used to store the first read write in RAM 130 at the address generated at the output of the reverse counter 131.

If the numerical value of the criterion D in register 4 is less than the numerical value of the average income per flight contained in the record, then the pulse will appear at the output 127 of the comparator 121. This pulse is fed to the input 141 of block 8 and then to the counting input of the reverse counter 131, increasing counter contents per unit. Given that this reverse counter was also in its original state, a code equal to one will be recorded at its output. From the output of the reversible counter, the code enters the address input of random access memory (RAM) 130.

In addition, the same pulse from the input 141 of block 8 is delayed by the element 138 for the duration of the operation of the counter 131, and then it is input to the write control input of the RAM 130. By this signal, the read record is written to the RAM 130 at the address generated at the output of the reverse counter 131 .

To read the next record of the array of indicators from the server database, the previous read pulse from the output 45 of block 2 is supplied to the input 118 of block 3, where it is delayed by element 116-1 for the time of reading the record from the database and its subsequent writing to the RAM of block 7 or 8, then passes the element 115 OR and enters the counting input of the counter 113, counting the number of read records.

The readings of the counter 113 by the comparator 112 are compared with the specified number of records in the data array by the synchronizing pulse from the output of the OR element 115, delayed by the response time of the counter 113. If the codes are not compared, the signal 119 is generated at the output of the comparator 112, which is transmitted through the input 108 of block 2 again enters the counting input of the counter 90, preparing the next read address.

The described process of sequentially reading the records of the analyzed data array continues until the comparator 112 fixes the fact of the equality of the input codes. At this moment, a pulse is generated at its output 120, which is fed to the input 109 of block 2 and then confirms the initial state of the trigger 91 and resets the counter 90 to its initial state.

In addition, the same pulse passes through element 94 AND to the output 46 of block 2 as a synchronizing signal that the reading from the server database has ended and all the read records are divided and re-written either to memory block 7 or to memory block 8 in depending on the conditions of compliance with the first criterion - the criterion of the average income per flight.

From the output 46 of block 2, the specified synchronizing pulse is supplied to the inputs 142 of blocks 7 and 8, starting the execution of the second level of situational analysis.

To this end, the pulse to start the execution of the second level of situational analysis through the OR element 137 is supplied to the data control input of the RAM memory 130, the address of which is fixed in the reversible counter 131, and reads its contents to the input of the register 132.

The output 152 of the register 132 is given the code value of the flight load indicator contained in this record, and the output 148 gives the codes of all indicators contained in the read record.

In addition, the same read pulse, delayed by the element 140 while reading data from the RAM 130, firstly, is fed to the synchronizing input of the register 132, bringing it read data. Secondly, it arrives at the synchronizing input of the comparator 134, on one information input of which a code is supplied from the output of the reversing counter 131, and on the other input a code corresponding to the value of "zero" is supplied.

According to the clock pulse supplied to the clock input of the comparator 134, the latter compares the values of the input codes. Given that at this point in time, the readings of the reverse counter 131 correspond to the number of records in the data array entered in RAM 130, i.e. much larger than the value of "zero", then the output 153 generates a pulse supplied to the synchronizing input of the comparator 135.

At one information input of the comparator 135 from the output of the register 133, a load factor code selected as a criterion for a second-level situational analysis is supplied, and a code for the load indicator of this particular flight from the read record from the output 152 of the register 143 is fed to the other input.

The comparator 135 compares the input codes by the incoming clock.

If the value of the flight load indicator is less than or equal to the value of the selected criterion, then an output 150 is generated at the output of comparator 135, which is fed to input 171 of block 9.

If the value of the flight load indicator is greater than the value of the selected criterion, then the comparator pulse is generated at the output 151 and from there it enters the input 171 of block 10.

Suppose, for example, that in a read record, the value of the flight load indicator is less than or equal to the value of the selected criterion, and a pulse is generated at the output of the comparator 150 and fed to the input 171 of block 9. This synchronizing pulse is fed to the counting input of the counter 161, increasing the counter by unit. Given that the reversible counter was in its original state, a code equal to one will be recorded at its output. From the output of the reverse counter 161, the code is supplied to the address input of random access memory (RAM) 160.

In addition, the same pulse is delayed by element 168 for the duration of the counter 161, and then it is fed to both the write control input of RAM 160 and the output 182 of block 9.

According to this signal, firstly, the read record is entered from the output 148 of the register 132 of block 7 into the RAM memory 160 at the address generated at the output of the reverse counter 161.

Secondly, from the output 182 of block 9, the write pulse through the input 146 of block 7 passes the OR element 136 and immediately goes to the subtracting input of the reverse counter 131, reducing its readings by one and thereby forming the next read address of the next record from RAM 130 .

In addition, the same pulse from the output of the OR element 136 is delayed by the element 139 for the duration of the operation of the reverse counter, and then through the OR element 137 it is fed to the data control input of the RAM memory 130, the address of which is fixed in the reversible counter 131, and reads its contents to the input register 132.

At the output 152 of the register 132, the code of the next flight load value is issued, and at the output 148, the codes of all indicators contained in the read record are issued.

In addition, the same read pulse, delayed by the element 140 while reading data from the RAM 140, firstly, is fed to the synchronizing input of the register 132, bringing it read data. Secondly, it arrives at the synchronizing input of the comparator 134, on one information input of which a code is supplied from the output of the reversing counter 131, and on the other input a code corresponding to the value of "zero" is supplied.

According to the clock pulse supplied to the clock input of the comparator 134, the latter again compares the values of the input codes.

Considering that at this point in time, the readings of the reversible counter 131 are much larger than the “zero” value, a pulse is generated at the output of the comparator 153, which arrives at the synchronizing input of the comparator 135.

At one information input of the comparator 135 from the output of the register 133, a load factor code selected as a criterion for the second-level situation analysis is supplied, and a load code for this particular flight from a read record from the output 152 of the register 132 is fed to the other input.

If the value of the flight load indicator is less than or equal to the value of the selected criterion, then the comparator generates a pulse at output 150.

If the value of the flight load indicator is greater than the value of the selected criterion, then a comparator pulse 135 is generated at the output 151.

Suppose, for example, that in the read record, the value of the flight loading rate will be greater than the value of the selected criterion, and now the output 151 of the comparator 135 generates a pulse that goes to the input 171 of block 10. From this input, the synchronizing pulse goes to the counting input of the reverse counter 161, increasing counter contents per unit. From the output of the reverse counter 161, the code is supplied to the address input of random access memory (RAM) 160.

In addition, the same pulse from input 171 is delayed by element 168 for the response time of counter 161, and then is fed to both the write control input of RAM 160 and the output 182 of block 10.

According to this signal, firstly, the read record is entered from the output 148 of the register 132 of block 7 into the RAM memory 160 at the address generated at the output of the reverse counter 161.

Secondly, from the output 182 of block 10, the write pulse through the input 147 of block 7 passes the OR element 136 and immediately goes to the subtracting input of the reverse counter 131, decreasing its readings by one and thereby forming the next read address of the next record from RAM 130 .

The described process of dividing the array of records and entering them into blocks 9 and 10 continues until the comparator 134 of block 7 fixes the fact that the readings of the reverse counter 131 are equal to the value "zero". At the second output of comparator 134, a synchronizing pulse is generated, which is output 149 of block 7, from where this pulse goes to input 172 of blocks 9 and 10, starting the procedure for performing the third level of situational analysis.

To this end, the synchronizing pulse to start the execution of the third level of situational analysis through the OR element 167 is fed to the data control input of the RAM memory 160, the address of which is fixed in the reverse counter 161, and reads its contents to the input of the register 162.

At the output 182 of the register 162 of block 9, a code of the value of the number of passengers carried is issued, and at the exit 178, codes of all indicators contained in the read record are issued.

In addition, the same read pulse, delayed by the element 170 while reading data from the RAM 160, firstly, is fed to the clock input of the register 162, bringing it read data.

Secondly, it arrives at the synchronizing input of the comparator 164, on one information input of which a code is supplied from the output of the reverse counter 161, and on the other input a code corresponding to the value of "zero" is supplied.

According to the synchronizing pulse supplied to the synchronizing input of the comparator 164, the latter compares the values of the input codes. Given that at this point in time, the readings of the reverse counter 161 correspond to the number of records in the data array entered in RAM 160, i.e. much greater than the value of "zero", then the output 183 generates a pulse supplied to the synchronizing input of the comparator 165.

At one information input of the comparator 165 from the output of register 163, a code of the number of passengers carried per flight is selected, selected as a criterion for the situation analysis of the third level, and a code of the number of passengers carried for this particular flight from a read record from the output 182 of register 162 is supplied to the other input.

The comparator 130 compares the input codes on the clock from the input 185.

If the value of the indicator of the number of passengers carried by one flight is greater than or equal to the value of the selected criterion, then at the output of the 180 comparator an impulse is generated that enters the input 193 of the memory unit 13.

If the value of the indicator of the number of passengers carried by one flight is less than the value of the selected criterion, then the pulse of the comparator 165 is generated at the output 181 and from there it enters the input 193 of the memory unit 14.

Suppose, for example, that in a read record, the value of the number of passengers carried by one flight is greater than or equal to the value of the selected criterion, and at the output of 180 comparator 165 a pulse is generated that enters the input 193 of block 13, from where it goes to the counting input of the counter 191, increasing counter contents per unit. Given that the counter 191 was in its original state, a code equal to one will be fixed at its output. From the output of the counter 191, the code is supplied to the address input of random access memory (RAM) 190.

In addition, the same pulse from the input 193 is delayed by the element 192 for the time the counter 191 is triggered, and then it is fed both to the write control input of the RAM 190 and to the output 196 of the unit 13. According to this signal, firstly, a read record is entered from the output 178 of the register 162 of block 9 in the memory of RAM 190 at the address generated at the output of the counter 191.

Secondly, from the output 196 of block 13, the write pulse through the input 176 of block 9 passes the OR element 166 and immediately goes to the subtracting input of the reverse counter 161, reducing its readings by one and thereby forming the next read address of the next record from RAM 160 .

In addition, the same pulse from the output of the OR element 166 is delayed by the element 169 for the duration of the operation of the reverse counter, and then through the OR element 167 it is fed to the data control input of the RAM memory 160, the address of which is fixed in the reverse counter 161, and reads its contents to the input register 162.

At exit 182 of register 162, a code is issued for the value of the number of passengers carried on the next flight, and at exit 178, codes of all indicators contained in the read record are issued.

In addition, the same read pulse, delayed by the element 170 while reading data from the RAM 160, firstly, is fed to the clock input of the register 162, bringing it read data. Secondly, it arrives at the synchronizing input of the comparator 164, on one information input of which a code is supplied from the output of the reverse counter 161, and on the other input a code corresponding to the value of "zero" is supplied.

According to the synchronizing pulse supplied to the synchronizing input of the comparator 164, the latter compares the values of the input codes. Given that at this point in time, the readings of the reverse counter 161 are much greater than the value of "zero", then an output is generated at the output 183, which arrives at the synchronizing input of the comparator 165.

At one information input of the comparator 165 from the output of register 163, a code is selected that is selected as a criterion for a situational analysis of the third level, and at the other input is a code for the number of passengers carried on this particular flight from the read record from the output 182 of register 162.

The comparator 130 compares the input codes on the clock from the input 183.

If the value of the indicator of the number of passengers transported for this particular flight is greater than or equal to the value of the selected criterion, then an output is generated at the output of the 180 comparator to the input 19 of the memory unit 13.

If the value of the indicator of the number of passengers carried on this particular flight is less than the value of the selected criterion, then the pulse of the comparator 165 is generated at the output 181 and from there goes to the input 193 of the memory unit 14.

Suppose, for example, that in a read record, the value of the number of passengers carried on this particular flight will be less than the value of the selected criterion, and now at the output 181 of the comparator 165 a pulse is generated that goes to the input 193 of the memory unit 14, from where it goes to the counting input of the counter 191, increasing the contents of the counter by one. From the output of the counter 191, the code is supplied to the address input of random access memory (RAM) 190.

In addition, the same pulse from the input 193 of block 14 is delayed by the element 192 for the duration of the counter operation, and then it is fed both to the write control input of the RAM 190 and to the output 196 of the block 14. According to this signal, firstly, the read-in is recorded from the output 178 of the register 162 of block 9 into the memory of RAM 190 at the address generated at the output of the reversible counter 191.

Secondly, from the output 196 of block 14, the write pulse through the input 177 of block 9 passes the OR element 166 and immediately goes to the subtracting input of the reverse counter 161, decreasing its readings by one and thereby forming the next read address of the next record from RAM 160 .

The described process of dividing the array of records and entering them into blocks 13 and 14 continues until the comparator 165 of block 9 fixes the fact that the readings of the reverse counter 161 are equal to the value “zero”, by issuing a synchronizing pulse to output 179, indicating the completion of the situational procedure analysis.

The other nodes and blocks that implement the procedure for situational analysis of passenger traffic work in a similar way.

As a result of the work of the situation analysis system for passenger traffic in blocks 12-18, they will be automatically generated: from high-profitable flights - 4 arrays M31, M32, M41, M42; from low-profit flights - М221 and М222.

Analysis of the arrays of flights allows us to draw the following conclusions.

Highly profitable flights FINDINGS Recommendations Array M31 Flights have a positive trend in revenue and passengers carried. However, the% of seat occupancy is still quite low. Optimize the choice of type of aircraft. Array M32 Flights, despite a decrease in% of employment and the number of passengers carried, have revenue growth. There are symptoms of a displacement of the passenger flow structure towards the segment of expensive passengers. Optimize the choice of type of aircraft. Array M42 The group of flights of this array has good income and% seat occupancy rates. A slight decrease in the Pax criterion may be considered as a symptom of a decrease in market potential. Aircraft type optimization is also needed. Array M41 Flights of this array have better values in all respects compared to the base period. This is the best option for managing transportation. Low Profit Flights FINDINGS Recommendations Array M21 With an increase in Pax, revenues fall, cf. the profit rate compared to the previous period is significantly underestimated, i.e. Incorrect tariff policy. Change the tariff policy. Array M22 Flights are characterized by falling revenues. Pax. Wed the income rate is overestimated compared to the previous period, as a result, market elasticity leads to a decrease in demand for transportation. Optimize your income rate selection Array M221 For flights of this group, cf. revenue rate, which leads to lower revenues and the number of passengers carried. Optimize your income rate selection Array M222 Flights are characterized by a decrease in the values of all criteria: income, the number of passengers carried,% of seat occupancy. There is a low demand potential in this market. It is advisable to close flights of this group as unprofitable.

Thus, as a result of the system’s work on the initial array of flights, groups of flights are formed at its outputs with a clear separation of each of them according to performance indicators, according to the dynamics of their behavior in this market. When formalized recommendations and control actions are set in accordance with each selected group, the speed and accuracy of operational decisions and, consequently, the efficiency of managing flight load and income are significantly increased.

Thus, the introduction of new nodes and blocks and new structural connections has significantly improved system performance by localizing the range of data search addresses in the server database

Information sources

1. US Patent No. 5455947 A, 03/10/95

2. US patent No. 5713014 A, 01/27/98 (prototype).

Claims (1)

A passenger traffic situation analysis system containing a server database address selection block, the first and second information inputs of which are the first and second information inputs of the system, the first and second synchronizing inputs of which are the first and second synchronizing inputs of the system, and the first information output is the first information output system, control unit for data sampling, the information input of which is the third information input of the system, one synchronizing the input of which is connected to the first synchronizing input of the system, and the other is connected to the second synchronizing input of the system, the unit for generating signals for writing and reading the database, the information input of which is connected to the second information output of the server database address selection block, the first and second synchronizing inputs are connected to the first and second synchronizing outputs of the server database address selection block, respectively, the first and second control inputs are connected to the first and second output m of the data sampling control unit, respectively, and the information output is the address output of the system, while the first synchronizing output of the write and read database signal generating unit is connected to the first control input of the data sampling control unit and is the first synchronizing output of the system, and the second synchronizing output of the generating unit write and read signals of the database is connected to the second control input of the data sampling control unit and is the second clock the output of the system, the first register, the information input of which is the fourth information input of the system, the synchronizing input is connected to the second synchronizing input of the system, and the output is connected to one input of the first block of code comparison, the second register, the information input of which is the fifth information input of the system, the synchronizing input is the third synchronizing input of the system, and one output is connected to another input of the first block of code comparison, the synchronizing input of which is connected to the third synchronizing system input, memory blocks of the first group, the information outputs of which are the second and third information outputs of the system, memory blocks of the second group, the information outputs of which are the fourth and fifth outputs of the system, memory blocks of the third group, the information outputs of which are the sixth and seventh information outputs of the system and a memory unit, the information output of which is the eighth information output of the system, characterized in that the system comprises a first selection unit recording parameters, the first synchronizing input of which is connected to one output of the code comparison unit, the second synchronizing input is connected to the third synchronizing output of the write and read database signal generation block, the third synchronizing input is connected to the third synchronizing input of the system, while the first information input of the first selection block recording parameters connected to another output of the second register, and the second information input is connected to the fourth information input of the system, a second unit for selecting recording parameters, the first synchronizing input of which is connected to the other output of the code comparison unit, the second synchronizing input is connected to the third synchronizing output of the unit for generating recording and reading data from the database, and the third synchronizing input of the second unit for selecting recording parameters is connected to the third synchronizing input of the system , while the first information input of the second block of selection of recording parameters is connected to another output of the second register, and the second inform the input is connected to the fourth information input of the system, the third block is the selection of recording parameters, one information input is connected to the information output of the first block of the selection of recording parameters, the other information input is connected to the fourth information input of the system, the first and second synchronizing inputs of the third block of selection of recording parameters are connected with the first and second clock outputs of the first block for selecting recording parameters, and the third clock input is connected n with the third synchronizing input of the system, while the information output of the third recording parameter selection block is connected to the information inputs of the memory blocks of the first group, the first and second synchronizing outputs are connected to the corresponding synchronizing inputs of the memory blocks of the first group, and the third synchronizing output is connected to the fourth synchronizing input of the first a block for selecting recording parameters, a fourth block for selecting recording parameters, one information input of which is connected to the information the output of the first block of selection of recording parameters, another information input is connected to the fourth information input of the system, the first and second clock inputs of the fourth block of selection of recording parameters are connected to the first and third synchronizing outputs of the first block of selection of recording parameters, respectively, the third clock input of the fourth block of selection of recording parameters connected to the third synchronizing input of the system, and the information output of the fourth block of selection of the parameter records is connected to the information inputs of the memory blocks of the second group, while the first and second synchronizing outputs of the fourth block of selection of recording parameters are connected to the corresponding synchronizing inputs of the memory blocks of the second group, and the third synchronizing output is connected to the fifth synchronizing input of the first block of selection of recording parameters, and the fifth block selection of recording parameters, one information input of which is connected to the information output of the second block of selection of recording parameters, friend the information input is connected to the fourth information input of the system, the first and second synchronization inputs of the fifth block of selection of recording parameters are connected to the first and second synchronizing outputs of the second block of selection of recording parameters, respectively, and the third synchronizing input is connected to the third synchronizing input of the system, while the information output of the fifth block recording parameters selection is connected to the information inputs of the memory blocks of the third group, the first and second synchronizing in the outputs of the fifth block of selection of recording parameters are connected to the corresponding synchronizing inputs of the memory blocks of the third group, and the third synchronizing output is connected to the fourth synchronizing input of the second block of selecting recording parameters, while the control outputs of the memory of the first group are connected to the fourth and fifth synchronizing inputs of the third block of selection of parameters records, respectively, the control outputs of the memory blocks of the second group are connected to the fourth and fifth synchronizing input by the fourth block of selection of recording parameters, respectively, the control outputs of the memory blocks of the third group are connected to the fourth and fifth synchronizing inputs of the fifth block of selection of recording parameters, respectively, and the information input of the memory block is connected to the information output of the second block of selection of recording parameters, the synchronizing input is connected to the third synchronizing output the second block of selection of recording parameters, and the control output of the memory block is connected to the fifth synchronizing input of the WTO th selection unit records parameters.

Images