RU2185029C1 - Radio link using pseudorandom operating- frequency tuning - Google Patents

Abstract

FIELD: radio engineering; communication systems operating in undefined noise environment. SUBSTANCE: radio link has on sending end coder, synchronization unit, pseudorandom sequence generator, control unit, frequency synthesizer, modulator, power amplifier, transmitting antenna, and pseudorandom sequence converter; on receiving end it has receiving antenna, input amplifier, mixer-heterodyne, detector, AGC unit, resolver, decoder, synchronization unit, pseudorandom sequence generator, control unit, and pseudorandom sequence converter. EFFECT: enhanced noise immunity in transient noise environment at long-time nonuniform quality of separate frequency channels. 2 cl, 7 dwg

Description

 The invention relates to the field of radio engineering and can be used in communication systems operating in conditions of uncertain interference.

 Radio lines are known that use algorithms to automatically select frequency channels free of interference to increase noise immunity [1-4]. However, under the influence of non-stationary interference with a rapidly changing frequency distribution, the noise immunity of frequency-adaptive radio links with insufficiently high speed can significantly decrease.

 Radio lines are also known that use software pseudo-random tuning of the operating frequencies (MHF), which allows the use of frequency redundancy to combat non-stationary interference [5-9]. However, the algorithms of equiprobable frequency switching used in these radio lines lead to inefficient use of frequency channels in the presence of stationary interference.

 Closest in essence to the claimed device is the well-known radio line with pseudo-random tuning of the operating frequency described in patent US 4653068 [10].

 The closest analogue (prototype) contains, on the transmitting side, an encoder, a modulator, a power amplifier and a transmitting antenna, as well as a synchronization unit, a pseudo-random sequence generator, a control unit and a frequency synthesizer, connected simultaneously to the input of the pseudo-random generator, on the transmitting side sequence, the output of which is connected to the input of the control unit, the output of which is connected to the input of the frequency synthesizer, the output of which is connected to the master input of the module torus, and the encoder input is the radio line input, and on the receiving side they contain a receiving antenna, an input amplifier, a local oscillator, a detector, a resolver and a decoder, as well as a synchronization unit, a pseudo-random sequence generator, a control unit, and are connected in series with the signal inputs / outputs an automatic gain control unit, and the input of the synchronization unit is connected to the output of the deciding device, and the output is connected to the input of the pseudo-random sequence generator, the output of which it is connected to the control input of the control unit, the input of the automatic gain control unit is connected to the additional output of the detector, and the output is connected to the control input of the input amplifier and to the tuning input of the control unit, the control output of which is connected to the control input of the mixer-local oscillator, and the clock output is connected to the clock the input of the deciding device, and the output of the decoder is the output of the radio link.

 Used in the prototype algorithm of pseudo-random tuning (switching) of operating frequencies allows you to use frequency redundancy to deal with non-stationary interference, providing a theoretical energy gain of N times [11], where N is the number of frequency channels (compared with the algorithm of operation at a single frequency at which there is interference with a power equal to the total interference power in the entire frequency band of the radio link with frequency hopping).

 However, the prototype device has the following disadvantage. Under the influence of non-stationary interference in the presence of long-term heterogeneous quality of individual frequency channels (due to different propagation conditions of radio waves and / or due to exposure to separate frequencies of different stationary power interference) noise immunity decreases, since periodically (according to the pseudo-random law ) deliberately suppressed frequencies are used for operation.

 The aim of the invention is the development of radio frequency hopping, which improves the noise immunity of the radio line under the influence of unsteady interference in the presence of long-term heterogeneous quality of individual frequency channels.

 This goal is achieved by the fact that in a radio line with a pseudo-random tuning of the operating frequency, comprising on the transmitting side an encoder, a modulator, a power amplifier and a transmitting antenna sequentially connected by signal inputs / outputs, as well as a synchronization unit, a pseudo-random sequence generator, a control unit and a frequency synthesizer, moreover, the output of the synchronization unit is connected to the input of the pseudo-random sequence generator, the output of the control unit is connected to the input of the frequency synthesizer, the output of which is It is accessed to the modulator input, the encoder input being the radio link input, and on the receiving side containing a receiving antenna, an input amplifier, a local oscillator, a detector, a resolver, and a decoder, as well as a synchronization unit and a pseudo-random sequence generator, connected in series with signal inputs / outputs , a control unit and an automatic gain control unit, and the input of the synchronization unit is connected to the output of the deciding device, and the output is connected to the input of the pseudo-random generator after In particular, the input of the automatic gain control unit is connected to an additional output of the detector, and the output is connected to the control input of the input amplifier and to the tuning input of the control unit, the control output of which is connected to the control input of the mixer-local oscillator, and the clock output is connected to the clock input of the resolving device, the decoder output is the output of the radio line, additionally pseudo-random sequence converters are introduced on the transmitting and receiving sides. In this case, on the transmitting side, the control input of the pseudo-random sequence converter is connected to the output of the pseudo-random sequence generator, the clock input is connected to the output of the synchronization unit, and the output is connected to the control unit input, and on the receiving side, the control input of the pseudo-random sequence converter is connected to the output of the pseudo-random sequence, clock the input is connected to the output of the synchronization unit, and the output is connected to the control input of the control unit.

 The pseudo-random sequence converter consists of a trigger, a decoder, the first and second keys, as well as the first and second storage registers. In this case, the control input of the first storage register and the first input of the decoder are combined and are the control input of the pseudorandom sequence converter. The output of the first storage register is connected to the second input of the decoder, the output of which is connected to the control input of the second storage register, the output of which is the output of the pseudo-random sequence converter, the clock inputs of the first and second keys are combined with the trigger input and are the clock input of the pseudo-random sequence converter. The control inputs of the first and second keys are connected respectively to the first and second outputs of the trigger, and the outputs of the first and second keys are connected respectively to the clock inputs of the first and second storage registers.

 Thanks to the new set of features, the noise immunity of the radio line is increased under the influence of unsteady interference in the presence of long-term heterogeneity of the frequency channels due to the use of the algorithm of non-probable tuning of the operating frequencies, which ensures equalization of the final reliability (communication quality) in all used frequency channels. Moreover, in accordance with this algorithm, a part of deliberately suppressed frequency channels can be completely excluded from the composition of switched frequencies by assigning them a zero probability of choice.

где
α_i = (φ_i(δ_φi)-φ_i(0))/δ_φi; (2)

В результате решения соответствующей оптимизационной игровой задачи в [12] получено выражение для расчета оптимального распределения вероятностей выбора частотных каналов х*, которое гарантирует, что итоговая средняя вероятность ошибки не превысит некоторую минимальную величину P*_ош.
Физическая интерпретация используемого в предлагаемой радиолинии с ППРЧ принципа компенсационного выравнивания качества связи (вероятности ошибки) во всех переключаемых частотных каналах (кроме заведомо подавленных и полностью исключаемых каналов I₀) показана на фиг.3.The theoretical justification of the optimality of the algorithm for unequal switching of operating frequencies and the rule for calculating the corresponding optimal probability distribution x * = {x _i *} _N based on the long-term characteristics of the inhomogeneity of the frequency channels are given in [12]. In the particular, but rather common case, each of the inhomogeneous frequency channels i = 1 ,. .., N can be described by the following functional dependence of the guaranteed probability of error R _{Оsh i} on the relative average power of non-stationary interference δ _i with a relative total power δ _sum [11-13]:

Where
α _i = (φ _i (δ _φi ) -φ _i (0)) / δ _φi ; (2)

As a result of solving the corresponding optimization game problem in [12], an expression was obtained for calculating the optimal probability distribution of the choice of frequency channels x *, which ensures that the final average error probability does not exceed a certain minimum value P * _osh.
A physical interpretation of the principle of compensatory equalization of communication quality (probability of error) used in the proposed RF link with frequency hopping in all switched frequency channels (except for knowingly suppressed and completely excluded channels I ₀ ) is shown in Fig. 3.

The analysis of the prior art made it possible to establish that analogues that are characterized by a combination of features that are identical to all the features of the claimed technical solution are absent, which indicates compliance of the claimed device with the patentability condition "novelty". The search results for known solutions in this and related fields of technology in order to identify features that match the distinctive features of the claimed object from the prototype showed that they do not follow explicitly from the prior art. The prior art also did not reveal the popularity of the impact provided by the essential features of the claimed invention, the transformations on the achievement of the specified technical result. Therefore, the claimed invention meets the condition of patentability "inventive step",
The inventive device is illustrated by drawings, which show:
FIG. 1 is a structural diagram of a radio line with pseudo-random tuning of the operating frequency;
FIG. 2 is a block diagram of a pseudo-random sequence converter (PSP);
FIG. 3 - physical interpretation of the principle of compensatory equalization of communication quality in switched frequency channels;
4 is an example implementation of the detector;
Fig 5 is an example implementation of a mixer-local oscillator;
6 is an example implementation of the generator SRP;
7 is an example implementation of a control unit.

 The inventive radio line with a pseudo-random tuning of the operating frequency, shown in Fig. 1, contains neither the transmitting side of the encoder 1, synchronization unit 2, generator PSP 3, converter PSP 4, control unit 5, frequency synthesizer 6, modulator 7, power amplifier 8, transmitting antenna 9. The input of the encoder 1 is the input of the radio link. The signal output of encoder 1 is connected to the signal input of modulator 7, the output of the synchronization unit 2 is connected to the input of the PSP 3 generator and to the clock input of the PSP 4 converter, the control input of which is connected to the output of the PSP 3 generator. The output of the PSP 4 converter is connected to the input of the control unit 5, the output of which is connected to the input of the frequency synthesizer 6, the output of which is connected to the master input of the modulator 7, the signal output of which is connected to the signal input of the power amplifier 8, the signal output of which is connected to the signal input at the transmitting antenna 9. On the receiving side, the radio link contains: an antenna device 10, an input amplifier 11, a mixer-local oscillator 12, a detector 13, an AGC block 14, a decoding device 15, a decoder 16, a synchronization block 17, a PSP generator 18, a control unit 19, PSP converter 20. The signal output of the antenna device 10 is connected to the signal input of the input amplifier 11. The signal output of the input amplifier 11 is connected to the signal input of the mixer-local oscillator 12, the signal output of which is connected to the signal input of the detector 13, an additional output to otorochno connected to the input of the AGC block, the output of which is connected to the control input of the input amplifier 11 and to the tuning input of the control unit 19, the control output of which is connected to the control input of the mixer-local oscillator 12. The clock output of the control unit 19 is connected to the clock input of the resolver 15. Signal output the detector 13 is connected to the signal input of the decider 15, the signal output of which is connected to the signal input of the decoder 16 and to the input of the synchronization unit 17, the output of which is connected to the input of the generator SP 18 and a clock input of inverter 20. The output of the generator CAP CAP 18 is connected to the control input inverter SRP 20, whose output is connected to the control input of the control unit 19. The output of the decoder 16 is output from the frequency hopping radio.

 The encoder 1 is used to convert the input information sequence of pulses to the output sequence with additional code redundancy, which allows the decoder 16, which serves to restore the original information sequence, to correct errors that appear due to interference in the switched frequency channels. Implementation options for encoder 1 and decoder 16 are known and are given, for example, in [14, p. 323-330, Fig. 8.9, 8.11, 8.16].

 The synchronization unit 2 is used to generate a clock pulse sequence with a period of T / 2 (when operating the converter PSP according to the algorithm implemented in the device shown in figure 2), where T is the duration of the radio line at one frequency. In radio lines with a slow pseudo-random tuning of the operating frequencies, the value of T should be no less than the period τ = 1 / V of the pulse following at the input of modulator 7, i.e. T> τ. An embodiment of the synchronization unit 2 is known and described, for example, in [23, p. 193, Fig. 5-19].

The pseudo-random sequence generators 3 and 18 are designed to generate sequences of equally probable frequency numbers in the range i = 1, ..., N on the transmitting (3) and receiving (18) sides of the radio line that are output in a parallel binary code of n = [log ₂ N]. An example implementation of the SRP generator 3 (18) with N-2 ⁿ based on the binary SRP generator and other typical logic elements is shown in Fig.6.

 This pseudo-random sequence generator 3 (18) consists of an RS flip-flop 3.1, a clock generator 3.2, an AND 3.3 element, a binary SRP generator 3.4, a counter 3.5, a shift register 3.6, a storage register 3.7. Moreover, the S-input of the RS flip-flop 3.1 and the clock input of the storage register 3.7 are combined and are the input of the SRP 3 generator (18). The outputs 1-n of the storage register 3.7 are the output of the SRP 3 generator (18). The output of the clock generator 3.2 is connected to the first input of the AND 3.3 element, the output of which is simultaneously connected to the input of the counter 3.5, the clock input of the shift register 3.6 and to the input of the binary generator SRP 3.4, the output of which is connected to the code input of the shift register 3.6, 1-n outputs of which connected to 1-n inputs of the storage register 3.7. The output of the counter 3.5 is connected to the R-input of the RS-trigger 3.1, the output of which is connected to the second input of the AND 3.3 element.

 RS-trigger 3.1 is designed to enable or disable the reading of binary n-bits from the output of the binary generator SRP 3.4 to the input of shift register 3.6. The RS-trigger 3.1 implementation option is known and described, for example, in [19, p. 74, Fig. 1.53].

 The clock generator 3.2 is designed to generate pulses that synchronize the operation of the binary generator SRP 3.4 and shift register 3.6. An embodiment of the clock generator 3.2 is known and described, for example, in [23, p. 193, Fig. 5-19].

 Element AND 3.3 plays the role of a key that transmits pulses from the output of the clock generator 3.2 to the input of the binary generator PSP 3.4 and the input of the shift register 3.6 with an enable signal at the output of the RS-trigger 3.1. A variant of the implementation of the And 3.3 element is known and described, for example, in [23, p.176, Fig. 5.2].

 The binary SRP generator 3.4 serves to generate the SRP in binary form. An implementation option for the binary PSP 3.4 generator is known and described, for example, in [29, p. 147, Fig. 4.2.3].

 Counter 3.5 is designed to count n pulses and reset the RS-trigger 3.1 to its original state. An implementation option for counter 3.5 is known and described, for example, in [23, p. 190, Fig. 5-17].

 Shift register 3.6 is intended for the formation of a sequence of n-bit pseudorandom binary numbers and the implementation of the procedure for converting a serial code of these numbers into parallel. An embodiment of the n-bit shift register 3.6 is known and described, for example, in [21, p. 209, Fig. 5.6].

 The storage register 3.7 is designed to hold sequences of equally probable frequency numbers during the T / 2 time interval. An embodiment of the n-bit storage register 3.7 is known and described, for example, in [21, p. 208-210, Fig. 5.4 (a)].

 Converters PSP 4 and 20 are carriers of the main distinguishing features of the claimed device and are used to form an unequal sequence of numbers of tunable frequencies from an equally probable sequence generated by the generators PSP 3 and 18.

 Implementation options for such converters for generating predetermined probability distributions of sampled analog signal levels are known and are given, for example, in [26-28].

 The proposed embodiment of the converter PSP 4 (20), comprising the second part of the claims, is shown in figure 2.

 The pseudo-random sequence converter 4 (20) consists of a trigger 4.1, a first 4.2 and a second 4.3 keys, a first 4.4 and a second 4.5 storage registers, and also a decoder 4.6. In this case, the control input of the first storage register 4.4 and the first input of the decoder 4.6 are combined and are the control input of the pseudorandom sequence converter 4 (20). The output of the first storage register 4.4 is connected to the second input of the decoder 4.6, the output of which is connected to the control input of the second storage register 4.5, the output of which is the output of the pseudo-random sequence converter 4 (20), the clock inputs of the first 4.2 and second 4.3 keys are combined with the input of trigger 4.1 and are the clock input of the pseudo-random sequence converter 4 (20), the control inputs of the first 4.2 and second 4.3 keys are connected respectively to the first and second outputs of trigger 4.1, and the outputs of the first 4.2 and second 4.3 of keys are connected respectively to the clock inputs of the first 44 and the second storage register 4.5.

 Trigger 4.1 is used for alternating antiphase opening and closing of the first and second keys 4.2 and 4.3 with a period of T / 2. An implementation option for trigger 4.1 is known and described, for example, in [23, p. 165, Figs. 4-29].

 The first key 4.2 is used to transmit odd clock pulses, providing the reading of the next input n-bit binary equiprobable pseudorandom number in the first storage register 4.4.

 The second key 4.3 serves to pass even clock pulses, providing reading from the output of the decoder 4.6 the next output n-bit binary non-probable pseudorandom number in the second storage register 4.5.

 Implementation options for the first key 4.2 and the second key 4.3 are known and described, for example, in [23, p.176, Fig.5.2].

 The first storage register 4.4 is designed to hold a parallel n-bit binary code of the next equiprobable pseudorandom number for a duration T between odd clock pulses with a period T / 2 arriving at the clock input of the SRP converter.

 The second storage register 4.5 is designed to hold a parallel n-bit binary code of the next non-probable pseudorandom number for a duration T between even clock pulses with a period T / 2, arriving at the clock input of the SRP converter.

 Implementation options for the first storage register 4.4 and the second storage register 4.5 are known and presented, for example, in [21, p. 208-210, Fig. 5.4].

Decoder 4.6 is designed to convert 2n-bit binary pseudorandom numbers with a uniform distribution to n-bit binary pseudorandom numbers with a given distribution x * {x _i } _N in accordance with the non-probable frequency hopping algorithm used. An implementation option for the decoder 4.6 based on an arithmetic logic device (ALU) is known and described, for example, in [19, p. 178, Fig. 1.130].

 The control unit 5 is used to convert the binary numbers of frequencies into the corresponding control signals, providing the tuning of the frequency synthesizer 6 to the corresponding frequencies. The implementation of this unit depends on the frequency control method in the synthesizer 6. If the synthesizer 6 is based on a reference oscillator and dividers with a variable division coefficient, the control unit 5 may be a decoder that converts the binary number of the next frequency into the corresponding binary code of the division coefficient. A variant of such an implementation of the control unit 5 in the form of a decoder is known and described, for example, in [19, p. 178, Fig. 1.130].

 If the synthesizer 6 is a voltage controlled oscillator, then a digital-to-analog converter (DAC) can act as a control unit 5. The implementation option of the DAC is described in [23, pp. 185-193].

 A frequency synthesizer 6 serves to form a carrier wave at each next pseudo-random tunable frequency. An implementation option for frequency synthesizer 6 is known and presented, for example, in [17, p. 214, Fig. 7.7 (a)].

 The modulator 7 is used to convert the sequence of pulses received at the signal input of the modulator from the output of the encoder 1, into a modulated high-frequency signal at the carrier frequency supplied to the input of the modulator from the output of the frequency synthesizer 6. In this case, various modulation methods (amplitude, frequency, phase ), which for the inventive device is not fundamental. An example implementation of modulator 7 is known and described, for example, in [16, pp. 273-274, Fig. 11.3 and Fig. 11.4].

 The power amplifier 8 is designed to amplify a high-frequency signal to a value necessary to compensate for losses in the medium of propagation of radio waves. An embodiment of a power amplifier 8 is known and described, for example, in [22, p. 374, Fig. 11.24].

 Antenna devices 9, 10 are designed to convert a high-frequency radio signal into radio waves during transmission (9) and vice versa during reception (10). Implementation options for antenna devices 9, 10 are known and described, for example, in [16, pp. 169-172, Fig. 7.2 and Fig. 7.4].

 The input amplifier 11 serves to pre-amplify the received high-frequency signals in the entire frequency range to the level necessary for the normal operation of the following blocks of the receiving path. In this case, to control the gain, a control signal is used, which is supplied from the output of the AGC block 14 to the control input of the input amplifier 11. An embodiment of the input amplifier 11 is known and described, for example, in [23, p. 30, Fig. 2.2 (a)].

 The mixer-local oscillator 12 is designed to transfer radio signals received at various pseudo-random tunable frequencies to a common intermediate frequency. When using only amplitude modulation, a tunable filter (rather than a frequency converter) can play the role of this unit, passing a signal to the input of detector 13 only at the current operating frequency. An implementation option of the mixer-local oscillator 12 is shown in Fig 5. The mixer-local oscillator 12 consists of a mixer 12.1, an intermediate frequency amplifier 12.2 and a local oscillator 12.3. Moreover, the first input of the mixer 12.1 is the signal input of the mixer-local oscillator 12, and the input of the local oscillator 12.3 is the control input of the mixer-local oscillator 12. The output of the local oscillator 12.3 is the second input of the mixer 12.1, the output of which is connected to the input of the intermediate frequency amplifier 12.2, the output of which is the output of the mixer- local oscillator 12.

 The mixer 12.1 is designed to transfer the received radio signals to the intermediate frequency. An implementation option of the mixer 12.1 is known and described, for example, in [17, p. 153, Fig. 5.12].

 The intermediate frequency amplifier 12.2 is designed to amplify the received radio signal at the intermediate frequency to the value necessary for the operation of subsequent blocks of the receiving path. An embodiment of an intermediate frequency amplifier 12.2 is known and described, for example, in [23, p. 100, Fig. 3-3].

 The local oscillator 12.3 is designed to form a bias frequency, which is the difference between the frequency of the received radio signal and the intermediate frequency. It can be implemented in the same way as a frequency synthesizer 6. The difference between them is only in the difference in the values of the generated frequencies by an amount equal to the intermediate frequency. The embodiment of the local oscillator 12.3 is known and described, for example, in [17, p. 214, Fig. 7.7 (a)].

The initial sequence of pulses from the modulated high-frequency signal is restored in the receiving part of the radio line by removing the high-frequency filling in the detector 13 and tick-wise gating of the received signal in the resolver 15. The signal at the additional output of the detector 13 is used to estimate the average signal level (envelope) in the AGC block 14. Moreover, to average the level of the received signal, a low-pass filter (LPF) with a cutoff frequency of F _o << V, where V is the manipulation speed n current information sequence of pulses. If the specified low-pass filter is part of the AGC block, and amplitude modulation is used in the radio line, then the additional output of the detector 13 may coincide with its signal output. In a more general case, detector 13 may include two detection units — a signal detector (amplitude, frequency, or phase) and an envelope detector (amplitude detector) with different low-pass filters (in front of the signal and auxiliary outputs) that differ in cutoff frequencies F _c ≈ V and F _o << V, respectively, where V is the speed of manipulation of the information component of the signal.

 The detector 13 is designed to isolate the message from the received oscillation. An implementation option of the detector 13 is presented in figure 4. The detector 13 consists of an envelope decoder 13.1, a signal decoder 13.2, a first 13.3 and a second 13.4 low-pass filter. Moreover, the inputs of the envelope decoder 13.1 and the signal decoder 13.2 are combined and are the input of the detector 13. The output of the envelope decoder 13.1 is connected to the input of the first low-pass filter 13.3, the output of which is the control output of the detector 13. The output of the signal decoder 13.2 is connected to the input of the second low-pass filter 13.4, the output of which is a signal detector output 13.

 Envelope decoder 13.1 is used to select the envelope (level) of the signal, and signal decoder 13.2 is used to extract the information component of the signal. Embodiments of envelope decoder 13.1 and signal decoder 13.2 are known and described, for example, in [23, p. 91].

The first 13.3 and second 13.4 low-pass filters (low-pass filters) are designed to average the levels of detected signals and differ in cutoff frequencies F _o << V and F _c ≈V, respectively. Implementation options for the first 13.3 and second 13.4 low-pass filters are known and described, for example, in [17, p .97, Fig. 6.13 (a)].

 The AGC block 14 is used to automatically adjust the gain of the received signal. An example of the implementation of the AGC block 14 is known and described, for example, in [17, p.31, Fig.2.2 (a)].

 The decisive device 15 is designed to register the next received binary information category. An embodiment of the solver 15 is known and shown, for example, in [21, pp. 363-371].

 The synchronization unit 17, as well as the synchronization unit 2, serves to form a clock sequence of pulses with a repetition period T / 2. The difference lies in the fact that in the synchronization block 17, the indicated repetition period can be adjusted according to the control signals extracted from the received sequence of pulses coming from the output of the deciding device 15 to the input of the synchronization block 17. In this case, the coordination procedure for delaying the pseudo-random sequence generated by the PSP generator is implemented 18 relative to the G1SP generated by the SRP generator 3. An embodiment of the synchronization block 17, which provides synchronization by the delay of the SRP, is known and described For example, in [24, str.266-328].

 The control unit 19, as well as the control unit 5, serves mainly to convert the binary numbers of frequencies into the corresponding control signals, providing the tuning of the mixer-local oscillator 12 to the corresponding frequencies. Additional functions of the control unit 19 in the receiving part of the frequency hopping radio frequency channel are the correction of control signals that tune the frequencies in the mixer-local oscillator 12, and clock pulses that gate the received signal with a period τ = 1 / V in the resolver 15, according to the control signals supplied to the tuning the input of the control unit 19 from the output of the AGC block. Adjustment can be performed according to different algorithms, differing in speed, accuracy, as well as stability in various conditions. In the prototype, for example, to implement all the functions of the control unit 19 (and control unit 5), a microprocessor is used. An example implementation of the control unit 19 of the typical functional elements shown in Fig.7.

 The control unit 19 consists of a decoder 19.1, a threshold device 19.2, an element HE 19.3, a clock generator 19.4, elements I 19.5, 19.8, a counter 19.6, an arithmetic adder 19.7, a controlled clock generator (GTI) 19.9. Moreover, the input of the threshold device 19.2 is the tuning input of the control unit 19. The input of the decoder 19.1 is the control input of the control unit 19. The output of the decoder 19 1 is connected to the second input of the arithmetic adder 19.7 and the input of the controlled GTI 19.9. The output of the arithmetic adder 19.7 is the control output of the control unit 19. The output of the controlled GTI 19.9 is connected to the second input of the element And 19.8, the output of which is the clock output of the control unit 19. The output of the threshold device 19.2 is connected to the first input of the element And 19.8 and the input of the element NOT 19.3, the output which is connected to the first input of the element And 19.5, the output of which is connected to the input of the reverse counter 19.6, the output of which is connected to the first input of the arithmetic adder 19.7. The output of the clock generator 19.4 is connected to the second input of the element And 19.5.

 The decoder 19.1 is used to convert the binary frequency numbers into the corresponding control signals, providing the tuning of the mixer-local oscillator 12 (for the case when the mixer-local oscillator 12 is based on a reference oscillator and dividers with a variable division ratio). An embodiment of the decoder 19.1 is known and described, for example, in [19, p. 178, Fig. 1.130].

 The threshold device 19.2 is designed to respond to a signal of a certain amplitude. An embodiment of the threshold device 19.2 is known and described, for example, in [23, p. 80, Fig. 2-37].

 Element NOT 19.3 is designed to provide antiphase operation of keys 19.5, 19.8. A variant of the implementation of the element NOT 19.3 is known and presented, for example, in [23, p. 175, Fig. 5-1].

 The pulse generator 19.4 is used to synchronize the reverse counter 19.6. The implementation option of the pulse generator 19.4 is known and described, for example, in [23, p. 193, Fig. 5-19].

 Element And 19.5 is designed to transmit clock pulses from the output of the clock generator 19.4 to the input of the reversible counter 19.6 when the signal level at the input of the threshold device 19.2 is lower than the threshold.

 Element And 19.8 is designed to transmit pulses from the output of the controlled GTI 19.9 to the input of the deciding device 15 when the signal level at the input of the threshold device 19.2 is higher than the threshold.

 Variants of the implementation of the elements And 19.5, 19.8 are known and described, for example, in [23, p.176, Fig.5.2].

 The reversible counter 19.6 is designed for sequentially sorting frequency offset codes in the search (tuning) mode. The implementation option of the reversible counter 19.6 is known and described, for example, in [23, p. 190, Fig. 5-17].

 The arithmetic adder 19.7 is used to calculate the current tuning frequency of the mixer-local oscillator. An implementation option for the arithmetic adder 19.7 is known and presented, for example, in [19, p. 155, Fig. 1.113].

 Managed GTI 19.9 is designed to generate clock pulses that determine the moments of registration of received information signals in the decisive device 15. An implementation option managed GTI 19.9 is known and described, for example, in [24, p. 266-328].

 The inventive device operates as follows.

The input information sequence of pulses from the input of the radio line enters the input of the encoder 1, which converts it to the output sequence of pulses with additional code redundancy, following with a clock speed of V = 1 / τ. This sequence of encoded information pulses is fed to the signal input of modulator 7, which converts them into a modulated high-frequency signal at the current pseudo-random carrier frequency, which is fed to the modulator input from the output of frequency synthesizer 6. Next, the high-frequency signal is amplified in power amplifier 8 and radiated by antenna 9 to the side receiving part of the radio link. The current carrier frequency is formed in the frequency synthesizer 6 in accordance with the control signals received at the input of the synthesizer 6 from the output of the control unit 5, to the input of which n-bit binary frequency numbers are received from the output of the converter PSP 4 with a period T> τ, where n = [ log ₂ N], N is the number of frequencies. Converter PSP 4 converts a sequence of equally probable 2n-bit binary numbers read in two half-cycles with a period of T / 2 from the output of an n-bit generator PSP 3 into a sequence of non-probable n-bit binary frequency numbers. Clocking of the generator PSP 3 and the converter PSP 4 with a period of T / 2 is carried out by the synchronization unit 2.

The used PSP transformation algorithm as a whole relies on the well-known method of geometric interpretation of the probabilities N events {x _i } _N , as N sections of the corresponding length that fit on a unit length segment. A feature of the proposed PSP 4 converter is to take into account the predetermined discreteness of the set N of random numbers and to preserve a typical n-bit binary PSP generator as input source of equal probabilities, where n = [log ₂ N] (as in the prototype). In this case, the problem of implementing the non-probable SRP (based on the above principle of geometric interpretation of probabilities) is the impossibility of obtaining nonzero probabilities of individual frequencies less than 1 / N, i.e. less than in the case of equiprobable selection of individual frequencies. One way to solve this problem is to increase the bit depth of input binary pseudorandom numbers. However, in the present invention, in order to simplify the formation of the non-probable SRP on the basis of a typical n-bit binary generator of the equally probable SRP, two sequentially generated n-bit binary pseudorandom numbers are used, which together form one 2n-bit binary pseudorandom number, which increases provides the ability to specify nonzero probabilities of selecting individual frequencies with a minimum value of 1 / (N ² ).

 The radio signal received by the antenna 10, after amplification in the input amplifier 11, is fed to the signal input of the local oscillator 12, which transfers the given radio signal received at various pseudo-random tunable frequencies to a common intermediate frequency. From the output of the mixer-local oscillator 12, the high-frequency signal is fed to the input of the detector 13, which selects the low-frequency envelope of the information signal and feeds it to the input of the decoding device, which, after being gated by pulses with a clock speed V = 1 / τ, coming from the output of the control unit 19, restores the original encoded sequence of pulses and feeds it to the input of decoder 16, in which errors are corrected and the original information sequence is restored, which is then fed to the output of the radio link.

 To regulate the gain of the input amplifier 11, its control input from the output of the AGC block 14 receives a control signal generated based on an estimate of the average level (envelope) of the signal fed to the input of the AGC block 14 from the additional output of the detector 13.

 The tuning of the mixer-local oscillator 12 to the next pseudo-random frequencies is carried out using control signals supplied to the control input of the mixer-local oscillator 12 from the control output of the control unit 19, which generates these signals in accordance with the frequency numbers received at the control input of the control unit 19 from the output of the converter SRP 20. In addition, the control unit 19 corrects the control signals, the tuning frequency in the mixer-local oscillator 12, and clock pulses, gating the received signal in the recording device 15, according to the control signals received at the tuning input of the control unit 19 from the output of the AGC block 14.

 The formation of the current frequency number in the receiving part of the radio line is carried out using the synchronization unit 17, the PSP generator 18 and the PSP 20 converter, performing functions similar to the functions described above for the synchronization block 2, the PSP generator 3 and the PSP 4 converter in the transmitting part of the radio line. An additional function of the synchronization block 17 is the adjustment of the sequence of clock pulses for synchronization by the delay of the generated pseudo-random sequence of frequency numbers and the moments of their change.

 The positive effect of the claimed device compared with a radio line using an algorithm of equiprobable tuning of the operating frequencies, we demonstrate the following example.

Suppose that, in the frequency channels i = l, ..., m <N, sufficiently powerful stationary interference constantly has the same relative level (interference / signal) σ _i = 1 and the structure of optimized non-stationary interference (for evaluation in the worst case). The values of the parameter α in all channels are assumed to be the same. We introduce the following notation: σ and δ are the normalized (relative to the signal power) powers of stationary and non-stationary interference per average channel, and σ = m / N <1, δ << 1, σ + δ <1. Consider as a general indicator of noise immunity the average probability of error P _OS .

Equiprobable choice of frequency channels enables the guaranteed value of P _osh ≤P $\genfrac{}{}{0ex}{}{\text{*}}{\text{<figure-callout id="1" label="error" filenames="00000005.png,00000006.png" state="{{state}}">error</figure-callout> 1}}$ = α • (σ + δ). This result corresponds to the worst case when δ _sum = (δ + σ) • N taking into account α _i = α, φ _i (0) = 0, i = 1, ..., N [12]. Optimum adjustment algorithm nonequiprobable operating frequencies unlike equiprobable reconstruction algorithm in this case, excludes from the list of channels used by the channel i = l, ..., m that allows P _err ≤P $\genfrac{}{}{0ex}{}{\text{*}}{\text{er 2}}$ = αδ / (1-σ). This result corresponds to the less worst case, when δ _sum = δN, taking into account the reduced number of indexes i = m + l, ..., N and α _i = α, φ _i (0) = 0. The gain characterizing the degree of reduction of the guaranteed value the upper limit of the probability of error, with K = P $\genfrac{}{}{0ex}{}{\text{*}}{\text{<figure-callout id="1" label="error" filenames="00000005.png,00000006.png" state="{{state}}">error</figure-callout> 1}}$ / P $\genfrac{}{}{0ex}{}{\text{*}}{\text{er 2}}$ = (1-σ) (σ + δ) / δ≥1. The greatest gain is achieved at σ = 0.5, which corresponds to the suppression of half of the channels by stationary noise. Moreover, K = 0.5 (0.5 + δ) / δ≈0.25 / δ (the approximation is valid for δ << 1).

 In the general case, the gain due to the use of the proposed algorithm under conditions of long-term heterogeneity of individual frequency channels increases with a decrease in the power of non-stationary interference. With a negligible or the same level of stationary interference in all frequency channels (i.e., in the absence of heterogeneity), the efficiency of the proposed algorithm coincides with the efficiency of the usual algorithm of equally probable tuning of the operating frequencies.

It should be noted that when using frequency adaptation algorithms [1-4] under the conditions described above, the unpredictable distribution of the power of unsteady interference due to their possible concentration at any chosen operating frequency can only guarantee the probability of error not lower than
P $\genfrac{}{}{0ex}{}{\text{*}}{\text{er 3}}$ = αδ _sum = αδN = N (1-σ) P $\genfrac{}{}{0ex}{}{\text{*}}{\text{er 2}}$ ,
i.e., the proposed radio link with an unequal frequency _hopping frequency provides a gain in the guaranteed error probability (P * _{error 2} ) and, in this case, N (1-σ) times compared to frequency adaptive radio links (P * _{error 3} ). In the absence of non-stationary interference, i.e. at δ = 0, the proposed radio link with an unequal frequency hopping and the adaptive frequency link in this case provide the same minimum error probability P * _{error 2} = P * _{error 3} = 0, and the radio link with an equally probable _{frequency hopping} will still provide a non-zero error probability ( due to the periodic use of frequencies affected by stationary interference), equal in this case to the value of P $\genfrac{}{}{0ex}{}{\text{*}}{\text{<figure-callout id="1" label="error" filenames="00000005.png,00000006.png" state="{{state}}">error</figure-callout> 1}}$ = α.δ.
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Claims (2)

 1. A radio line with a pseudo-random tuning of the operating frequency, comprising, on the transmitting side, a serial encoder, modulator, power amplifier and transmitting antenna, as well as a synchronization unit, a pseudo-random sequence generator, a control unit and a frequency synthesizer, the output of the synchronization unit being connected to the input of the pseudo-random sequence generator , the output of the control unit is connected to the input of the frequency synthesizer, the output of which is connected to the specifying input of the modulator, the input of the encoder being the radio link, and on the receiving side, containing a receiving antenna, an input amplifier, a local oscillator, a detector, a resolver and a decoder, as well as a synchronization unit, a pseudo-random sequence generator, a control unit and an automatic gain control unit, the input of the synchronization unit being connected to the output of the deciding device, and the output is connected to the input of the pseudo-random sequence generator, the input of the automatic gain control unit is connected to an additional output ohm of the detector, and the output is connected to the control input of the input amplifier and to the tuning input of the control unit, the control output of which is connected to the control input of the mixer-local oscillator, and the clock output is connected to the clock input of the resolver, the decoder output being the output of the radio link, characterized in that on the transmitting side, a pseudo-random sequence converter is additionally driven, the control input of which is connected to the output of the pseudo-random sequence generator, a clock input It is connected to the output of the synchronization unit, and the output is connected to the input of the control unit, and on the receiving side an additional pseudo-random sequence converter is introduced, the control input of which is connected to the output of the pseudo-random sequence generator, the clock input is connected to the output of the synchronization unit, and the output is connected to the control input of the control unit .  2. The radio link according to claim 1, characterized in that the pseudo-random sequence converter consists of a trigger, a decoder, first and second keys, as well as first and second storage registers, the control input of the first storage register and the first input of the decoder are combined and are the control input of the converter pseudo-random sequence, the output of the first storage register is connected to the second input of the decoder, the output of which is connected to the control input of the second storage register, the output of which is the output of the pseudo-random sequence converter, the clock inputs of the first and second keys are combined with the trigger input and are the clock input of the pseudo-random sequence converter, the control inputs of the first and second keys are connected, respectively, to the first and second outputs of the trigger, and the outputs of the first and second keys are connected, respectively, to the clock inputs of the first and second storage registers.

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