RU215843U1 - Output buffer device of the interface chip with reverse current protection - Google Patents

Abstract

The utility model relates to the field of radio engineering and is intended for use in the output buffers of transmitters of wired digital communication interface chips (for example, RS485). The proposed scheme makes it possible to implement a transmitter output buffer with built-in protection against reverse currents when the voltage in the communication line goes beyond the permissible limits - below the ground potential or above the buffer supply voltage. To protect the buffer transistors from reverse currents, additional protective transistors are used, connected in series with the main transistors and controlled by the developed voltage control circuit in the communication line, built on the basis of a common-gate amplifying stage using current mirrors. The developed reverse current protection circuit also retains functionality in the off state of the transmitter, provided that the supply voltage is applied.

Description

The utility model relates to the field of radio engineering and is intended for use in the output buffers of transmitters of wired digital communication interface chips (for example, RS485). The device makes it possible to implement a transmitter output buffer with built-in protection against reverse currents when the voltage in the communication line goes beyond the permissible limits - below the ground potential or above the buffer supply voltage.

The currently widespread wired digital communication systems necessitate taking into account the design features of long wired communication lines, such as the possibility of occurrence of voltage polarity inversion in emergency situations and the voltage in the line going beyond the permissible limits, resulting in the appearance of so-called reverse currents. Accordingly, to ensure the uninterrupted operation of communication systems, interface microcircuits must be protected from damage in the event of such abnormal situations. The most sensitive to the aforementioned abnormal situations is the output buffer of the transmitters of interface microcircuits, in which it is necessary to use sufficiently powerful MOS transistors, which increases the risk of damage from overheating by a large flowing current. The output buffer can be damaged by reverse currents in two cases:

a) when the voltage in the transmission line drops below the ground potential;

b) when the voltage in the line exceeds the supply voltage level of the output buffer of the transmitter.

In both of these cases, the built-in sink diodes in the output buffer transistors open, as a result of which an uncontrolled current begins to flow through the buffer transistors, which can lead to damage to the buffer transistors.

The well-known classic output buffer circuit in the form of a complementary pair of MOS transistors (Fig. 1) has a number of disadvantages, one of the most significant of which is the complete lack of protection against the line voltage going beyond the permissible limits - below the ground potential or above the buffer supply voltage, when which opens the built-in drain diodes of the transistors of the lower or upper side, respectively, which can also lead to the flow of large uncontrolled currents through the output buffer transistors and their damage due to overheating.

In the patent [1] (US 20020021144 A1 "Three-volt TIA / EIA-485 driver circuit)), published on February 21, 2002, IPC H03K 19/02), a typical widely used transmitter output buffer circuit is provided (Fig. 2) , and an improvement of this scheme is also proposed (Fig. 3). However, the proposed solution has a significant drawback - it is well known that an increase in the resistance of the substrate-source circuit sharply reduces the resistance of the transistor to electrostatic discharge. Accordingly, the proposed use of Schottky diodes in the substrate-source circuit will lead to an additional voltage drop across them, which is equivalent to an increase in the resistance of this circuit, and, as a result, a significant decrease in the buffer resistance to static electricity and a general decrease in transmitter reliability.

In the patent [2] (US 5844425 A "CMOS tristate output buffer with overvoltage protection and increased stability against bus voltage variations)), published on December 1, 1998, IPC H03K 19/00), the principle of constructing an output buffer is proposed, including itself protection against excess supply voltage, providing protection against reverse currents, based on the control of the potential of the substrate p-MOS transistor of the upper side of the buffer (Fig. 4). However, the proposed principle has the same disadvantage as the solution from the previous patent - the proposed principle does not provide protection against a decrease in the voltage in the line below the ground potential.

In the patent [4] (No. US 6329842 B1 "Output circuit for electronic devices", published on December 11, 2001, IPC H03K 19/0175), an output buffer circuit is proposed that is structurally similar to the previous solution and has the same disadvantages (Fig. 5 ). However, the proposed scheme contains a promising design solution - the inclusion of protective buffer transistors in series with the main output buffer transistors. A similar solution in an improved form is used in the present utility model.

In the patent [3] (WO 2019/173275 A1 "Circuit providing reverse current protection for high-side driver", published on September 12, 2019, IPC H02H 3/08, H03K 19/00), an electrical circuit diagram of the electronic module is shown, designed for use with a variety of sensors connected via a wired communication line, containing a system of protection against reverse currents when the voltage in the line goes beyond the permissible limits (Fig. 6). The ideas proposed in this patent for constructing some circuit solutions after adaptation can also be useful in the output buffers of interface microcircuits. In particular, of interest is the method of switching on protective transistors in the output circuit - in series in opposite polarity, and the sources of the transistors are connected together. A similar solution in an improved form is used as part of this utility model.

Thus, among the known publicly available design solutions, there are no output buffers of interface microcircuits that have built-in protection against reverse currents when the voltage in the communication line goes beyond the permissible limits - below the ground potential or above the buffer supply voltage, which does not worsen the reliability of the transmitter, in particular, does not reduce the resistance buffer to static electricity.

The objectives of the utility model are to eliminate the shortcomings identified in the prototypes and to ensure high stability of the output buffer of interface microcircuits to the main contingencies that occur in wired communication lines.

The technical result of applying the proposed utility model is to increase the reliability and fault tolerance of wired digital communication systems, which is achieved by adding a new built-in reverse current protection system to the transmitter microcircuits when the voltage in the communication line goes beyond the permissible limits.

In FIG. 1 shows a classic output buffer circuit in the form of a complementary pair of MOS transistors, where the upper buffer arm is implemented on a p-channel MOS transistor P1, and the lower arm is implemented on an n-channel MOS transistor N1.

In FIG. 2 shows a typical diagram of the transmitter output buffer, where: 601 and 611 are the output buffer itself, 600 and 610 are Schottky protective diodes that prevent the flow of reverse currents. The remaining elements are the preamplifier and the shutdown circuit.

In FIG. 3 shows a diagram of the output buffer of the transmitter, where: 810 and 811 are directly the output buffer, 812, 813, 821 and 824 are Schottky protective diodes. The remaining elements are a preamplifier and a shutdown circuit, and also perform auxiliary roles.

In FIG. 4 shows a diagram of the output buffer of the transmitter, where P1 and N1 are directly the output buffer. The remaining elements are a preamplifier, and also perform auxiliary roles, including using an undisclosed control circuit 310, the potential of the substrate of the transistor P1 is controlled, which achieves protection against reverse currents.

In FIG. 5 shows the diagram of the output buffer of the transmitter, where: Q1 and Q5 are directly the output buffer. Transistors Q2, Q3 and Q4, connected in series with transistors Q1 and Q5, form a backfeed protection controlled by a circuit of the remaining elements.

In FIG. 6 shows a diagram of an electronic module designed for use with a variety of sensors, containing a promising design solution in the output circuit - switching on the protective transistors M7F and M7R in series in opposite polarity, and the sources of the transistors are connected together.

In FIG. 7 shows a diagram of the proposed output buffer with protection against short circuits and reverse currents, where: the output buffer itself is built on a complementary pair of MOS transistors MN3 and MP3. Transistors MN1 and MN2 in the lower side and MP1 and MP2 in the upper side limit the output current of the buffer. Switches MN4 and MP4 protect the buffer from reverse currents, diodes D1 and D2 are used to protect the gates of transistors MP4 and MN4. The operation of transistors MN4 and MP4 is controlled using the developed voltage control circuit in the communication line, consisting of two similar parts and including the following elements: MP10, MP11, MP12, MP13, MN5, MN6, MN7, MN8, MN9, D5, D6_series5, R2 - for the transistor MN4, and MN10, MN11, MN12, MN13, MP5, MP6, MP7, MP8, MP9, D3, D4_series5, R1 - for the transistor MP4, respectively.

In FIG. 7 shows the scheme of the output buffer of the interface chip proposed in this utility model.

The proposed circuit (see Fig. 7) is based on standard complementary MOS transistors and can be implemented using most modern integrated technological processes - CMOS, BiCMOS, BiKDMOS. The output buffer itself is built on a complementary pair of MOS transistors MN3 and MP3 (Fig. 7), the rest of the circuit elements are part of the protection system. The digital circuit of the transmitter is unprincipled and is not directly related to the essence of this utility model, therefore it is shown as a LOGIC block, which receives the input signal DIN, the signal on / off the transmitter EN, and from which the output signals IN_P and IN_N go to the gates of transistors MN3 and MP3 output buffer.

Keys MN4 and MP4 protect the buffer from the flow of reverse currents when the voltage in the communication line goes beyond the permissible limits - below zero or above the buffer supply voltage. These transistors are connected in series with the main buffer transistors MN3 and MP3, but in opposite polarity - the drain of MN4 is connected to the drain of MN3, and similarly the drain of MP4 is connected to the drain of MP3. With this inclusion, these transistors in the closed state protect the transistors MN3 and MP3 from the flow of reverse currents, because. the built-in drain diodes of transistors MN4 and MP4 are turned on in the blocking polarity with respect to reverse currents: the closed transistor MN4 protects against negative voltage in the communication line, the closed transistor MP4 protects against voltage in the communication line exceeding the buffer supply voltage. Diodes D1 and D2 are used to protect the gates of transistors MP4 and MN4 when the line voltage (OUT) is below zero or above the supply voltage, respectively. In normal operation, the transistors MN4 and MP4 must be fully open, while the power loss on them will be minimal, and when the voltage in the communication line goes beyond the permissible limits, the transistors must be closed to provide protection against reverse currents.

The operation of transistors MN4 and MP4 is controlled using the developed voltage control circuit in the communication line, consisting of two similar parts and including the following elements: MP10, MP11, MP12, MP13, MN5, MN6, MN7, MN8, MN9, D5, D6_series5, R2 - for the transistor MN4, and MN10, MN11, MN12, MN13, MP5, MP6, MP7, MP8, MP9, D3, D4_series5, R1 - for the transistor MP4, respectively. The design and principle of operation of both parts of this control circuit for transistors MN4 and MP4, respectively, are completely similar, therefore, only one part will be considered in detail - for the transistor MN4.

The developed control circuit for the transistor MN4 consists of an amplifying stage with a common gate (MN8, MN9) using current mirrors to set the operating mode of the amplifying stage and ensures the formation of a voltage close to the supply voltage at the gate of the transistor MN4 (nprot circuit) at a line voltage of range from ground potential to buffer supply voltage level. Accordingly, under normal operating conditions, the MN4 transistor will be fully open and will have little or no effect on the operation of the buffer. When the line voltage drops below the ground potential, a cascade opens on transistors MN8, MN9, and thus a voltage close to the line voltage is formed at the gate of MN4. This ensures that transistor MN4 is closed and prevents reverse current from flowing. Transistors MN8, MN9 are connected in opposite polarity - connected by sources, to prevent the flow of reverse current in the closed state of transistors. Diodes D5, D6_series5 provide protection against excess gate-source voltage of transistors MN8, MN9. Transistor MN5 and resistor R2 provide protection against reverse currents in the “off” mode - when the transmitter is turned off by the EN signal, transistor MN5 closes to reduce power consumption by the control circuit, and to ensure the operation of the reverse current protection system, transistors MN8, MN9 open with a positive potential of the supply voltage applied to the gates MN8, MN9 using resistor R2. The MP13 transistor provides protection against reverse current flow in the control circuit through the MP12 transistor at line voltages higher than the supply voltage. The gate control signal MP13 pprot is taken from the output of the upper stage reverse current protection control circuit, i.e. from the gate of the MP4 transistor.

The control circuit of the MP4 transistor is completely similar to that considered with the difference that in normal operation, a potential close to the ground level is formed at the gate of the MP4 transistor, completely opening this transistor, and when the voltage in the line rises above the buffer supply voltage level, voltage is applied to the gate of this transistor from the line, completely closing it. Setting the levels of operation of the protection circuit is carried out using the reference currents 13 and 14, as well as by adjusting the ratios of the width of the gates of the transistors in the current mirrors.

The proposed output buffer scheme works as follows.

In normal operation, when the voltage in the communication line is in the range from the ground potential to the buffer supply voltage, and the leakage current in the communication line does not exceed the specified values, the protection circuits do not affect the operation of the output buffer on transistors MN3 and MP3, t .to. the buffer output current is much less than the limiting current of the current mirrors on MN1 and MN2 and on MP1 and MP2, respectively, the resistance of transistors MN2 and MP2 is insignificant. Transistors MN4 and MP4 are also fully open and their resistance is also insignificant. The system of current mirrors of the voltage control circuit in the communication line on transistors MP10, MP11, MP12, MN6, MN7, MN8, MN9, as well as on MN10, MN11, MN12, MP6, MP7, MP8, MP9, is configured in such a way that in normal mode of operation, the degree of opening of transistors MN8, MN9 and MP8, MP9 is insignificant, transistors MP13 and MN13 are fully open, and transistors MP12 and MN12 are open quite strongly, respectively, the gates of transistors MN4 and MP4 receive the power and ground potential, respectively, which leads to the full opening of transistors MN4 and MP4.

In the event of a short circuit in the communication line, the output current of the buffer is limited by the limiting current of the current mirrors on MN1 and MN2 and on MP1 and MP2, respectively, the output transistors of the buffer MN3 and MP3 are not damaged.

When the voltage in the communication line drops below the ground potential, a cascade opens on transistors MN8, MN9, and thus a voltage equal to the voltage in the line is formed at the gate of MN4. This ensures that transistor MN4 is closed and prevents reverse current from flowing through transistor MN3. Transistor MN13 also closes and prevents reverse current from flowing through transistor MN12. Diode D1 protects the gate of the MP4 transistor from breakdown. Thus, the buffer circuit is protected from reverse current damage when the voltage in the communication line drops below ground potential.

When the voltage in the communication line rises above the buffer supply voltage, a cascade opens on transistors MP8, MP9, and thus a voltage equal to the voltage in the line is formed at the MP4 gate. This closes transistor MP4 and prevents reverse current from flowing through transistor MP3. The transistor MP13 also closes and prevents the flow of reverse current through the transistor MP12. Diode D2 protects the gate of transistor MN4 from breakdown. Thus, the buffer circuit is protected from reverse current damage when the voltage in the communication line rises above the buffer supply voltage.

When the transmitter is turned off using the EN signal, the reverse current protection continues to function by supplying opening potentials to the transistors MN8, MN9 and MP8, MP9 with the help of resistors R1 and R2, and, accordingly, closing the transistors MN4 and MP4. For the protection system to work, a supply voltage is required.

Thus, what is new in the proposed utility model is that for protection against reverse currents, additional protective transistors are used, connected in series with the main transistors in the opposite polarity, namely drain to drain. To control the protective transistors, a new circuit for monitoring the voltage in the communication line is used, built on the basis of an amplifier stage with a common gate using current mirrors. New is the implementation of protection against reverse currents also in the off state of the transmitter.

The main advantages of the proposed technical solution over the known solutions discussed above are the following:

availability of limiting the maximum output current of the buffer;

reverse current protection functions both when the voltage in the line rises above the buffer supply voltage, and when it drops below the ground potential;

the use of Schottky diodes is not required, the requirements for the technological process are accordingly reduced;

resistance to electrostatic discharges does not deteriorate, because the substrate-source potential difference of all transistors is minimal due to their direct electrical connection;

reverse current protection functions even when the transmitter is off;

the control circuit of protective transistors is structurally simpler.

The proposed scheme can be implemented using most standard CMOS, BiCMOS, BiCMOS technological processes. In particular, the authors used this scheme in the RS485 transceiver chip.

Thus, the proposed device for the output buffer of interface microcircuits makes it relatively easy to provide resistance to one of the main contingency situations that occur in wired communication lines - voltage output in the communication line beyond the permissible limits.

Literature

1. US 20020021144 A1.

2. US 5844425A.

3. WO 2019/173275A1.

4. US 6329842 B1.

Claims (1)

The output buffer of the interface microcircuit of wired digital communication, made in the form of a complementary pair of output transistors, the upper shoulder of which is implemented on a p-channel MOS transistor, and the lower one on an n-channel MOS transistor, characterized in that it contains a protection circuit against reverse currents when the voltage is out communication lines beyond the permissible limits, including protective switches on a p-channel MOS transistor and an n-channel MOS transistor, connected in series with the corresponding output transistors in opposite polarity, namely drain to drain, and controlled by a voltage control circuit consisting of two similar parts, each of which includes an amplifying stage with a common gate using current mirrors, as well as a resistor for supplying opening potentials to the transistors of the amplifying stage in the off state of the transmitter.

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