RU202508U1 - DEVICE FOR PROCESSING BROADBAND PHASOMANIPULATED SIGNAL - Google Patents

Abstract

The utility model relates to the field of telecommunications. EFFECT: provision of threshold processing of an analog mixture of additive interference and noise of various types arriving at its input with a broadband phase-shift keyed signal formed on the basis of twenty-bit binary sequences of a given structure with a doubled width of the main lobe of the autocorrelation function, in order to detect the presence of a pulse signal at its output and its position on the time axis relative to the true value to determine the probabilistic characteristics and assess the accuracy of the processing of the broadband phase-shift keyed signal by the device during multiple simulation of the processing process. It is achieved by the fact that the proposed device for processing a wideband phase-shift keyed signal, which contains an auxiliary filter 1, the input of which is the input of the matched filter, and its output is the input of the delay line 2, twenty phase shifters 3.1 ... 3.20, adder 4, twenty relays 5.1 ... 5.20, register 6, threshold device 7. 4 ill.

Description

The utility model relates to the field of telecommunications, as well as to systems for transmitting discrete information and can be used to determine the parameters of synchronization systems for radio systems of various profiles with a certain threshold voltage, operating in a complex interference environment, while providing modeling of reception and processing of broadband phase-shift keyed (SHP-FM ) a signal generated on the basis of a twenty-bit pseudo-random sequence, taking into account the threshold, the structure of the sequence and interference, for subsequent analysis of the probabilistic and accuracy characteristics of the simulated process of processing the WB-PM signal.

A device for allocating a frame synchronization marker is known, containing a shift register, comparison elements with a reference combination of the marker and blocks for analyzing the coincidence code, while the input of the shift register is an information input of the device for allocating a frame synchronization marker, the shift register consists of a set of series-connected groups of memory elements, in its a queue of K memory elements in each group, the outputs of which are connected to the inputs of the corresponding comparison elements with the reference combination of the marker, the output of the matching code analysis block of the last stage is the output of the cycle synchronization marker allocator, the outputs of the memory elements of each previous group of memory elements are connected to the inputs memory elements of the next group of memory elements, and the outputs of the comparison elements with the reference marker combination, starting with the second comparison element and ending with the penultimate one, are connected with the inputs of the block for analyzing the coincidence code of the first st upeni, and the output of the first stage coincidence code analysis block is connected to the second inputs of the first and last comparison elements with the reference combination of the marker, and is also connected to the input of the second stage coincidence code analysis block, the outputs of the first and last comparison elements are connected to the inputs of the second matching code analysis block steps (RU No. 2210869, publ. 20.08.2003).

The closest solution in technical essence is a matched filter containing an auxiliary filter, the input of which is the input of the device, and its output is the input of the delay line, seven phase shifters and an adder, and five phase shifters are connected, respectively, to the eighteenth output of the delay line, the seventeenth output of the delay line , the thirteenth output of the delay line, the twelfth output of the delay line, the eleventh output of the delay line, and the output of the auxiliary filter in parallel with the multi-drop delay line is connected to an adder, to which all outputs from the delay line are also connected, characterized in that six additional phase shifters are introduced into it, and the sixth phase shifter is connected to the second output of the delay line, the seventh phase shifter is connected to the fifth output of the delay line, the eighth phase shifter is connected to the nineteenth output of the delay line, the ninth phase shifter is connected to the sixteenth output of the delay line, the tenth phase shifter is connected to the fifteenth to the output of the delay line, the eleventh phase shifter - to the fourteenth output of the delay line, the twelfth phase shifter - to the seventh output of the delay line, the thirteenth phase shifter - to the sixth output of the delay line. (RU No. 193622, publ. 07.11.2019).

The disadvantage of the above devices is that with their help it is impossible to process the WB-PM signals generated on the basis of twenty-bit sequences of various structures, followed by an assessment of the probabilistic and precision characteristics of such processing in time.

The task of the utility model is to provide thresholding of an analog mixture of additive interference and noises of various types arriving at its input with a WB-FM signal formed on the basis of a twenty-bit binary sequence of a given structure in order to detect the presence of a pulse signal at its output and its position on the time axis relative to the true value to determine the probabilistic characteristics and assess the accuracy of the process of processing the WB-FM signal by the device.

The essence of the utility model is that an additional twenty relays are introduced into a matched filter containing an auxiliary filter, the input of which is the input of the device, and its output is the input of the delay line, thirteen phase shifters and an adder, and the first relay is connected to the nineteenth output of the delay line, the second relay - to the eighteenth output of the delay line, the third relay - to the seventeenth output of the delay line, the fourth relay - to the sixteenth output of the delay line, the fifth relay - to the fifteenth output of the delay line, the sixth relay - to the fourteenth output of the delay line, the seventh relay - to the thirteenth the output of the delay line, the eighth relay - to the twelfth output of the delay line, the ninth relay - to the eleventh output of the delay line, the tenth relay - to the tenth output of the delay line, the eleventh relay - to the ninth output of the delay line, the twelfth relay - to the eighth output of the delay line, the thirteenth relay - to the seventh output of the delay line, the fourteenth relay - to six that output of the delay line, the fifteenth relay - to the fifth output of the delay line, the sixteenth relay - to the fourth output of the delay line, the seventeenth relay - to the third output of the delay line, the eighteenth relay - to the second output of the delay line, the nineteenth relay - to the first output of the delay line, the twentieth relay - to the output of the auxiliary filter, and also seven phase shifters are introduced into it, with the first phase shifter connected to the first relay, the second phase shifter - to the second relay, the third phase shifter - to the third relay, the fourth phase shifter - to the fourth relay, the fifth phase shifter - to the fifth relay, the sixth phase shifter - to the sixth relay, the seventh phase shifter - to the seventh relay, the eighth phase shifter - to the eighth relay, the ninth phase shifter - to the ninth relay, the tenth phase shifter - to the tenth relay, the eleventh phase shifter - to the eleventh relay, the twelfth phase shifter - to the twelfth relay , the thirteenth phase shifter - to the thirteenth relay, the fourteenth phase shifter - to the four the tenth relay, the fifteenth phase shifter - to the fifteenth relay, the sixteenth phase shifter - to the sixteenth relay, the seventeenth phase shifter - to the seventeenth relay, the eighteenth phase shifter - to the eighteenth relay, the nineteenth phase shifter - to the nineteenth relay, the twentieth phase shifter - to each relay the control input from the register is connected, while the adder output is connected to the input of the threshold device, to which the input for supplying the threshold voltage from the computer is also connected.

A device for processing the WB-PM signal is shown in FIG. one.

FIG. 2 shows a graph of the autocorrelation function (ACF) for four pseudo-random binary sequences with a length of 20 binary symbols: 11111111100100111000, 11111111100011100100, 11111111011001110000, 11111111000011100110.

FIG. 3 shows the ACF plot for four other pseudo-random binary sequences with a length of 20 binary symbols: 11101010100101101100, 11100110110100101010, 11100101010100100100, 11100100100101010100.

On the basis of these eight sequences, the original WB-PM radio signal is formed and its processing is simulated in a device for processing the WB-PM signal in the presence of noise and interference.

FIG. 4 shows a graph of the real correlation function at the output of the matched filter after processing the WB-PM signal formed on the basis of a discrete twenty-bit sequence. A feature of the sequences under consideration is the presence of a wider main petal of the ACF, 4τ _o instead of 2τ _o, as, for example, in M-sequences. Also in FIG. 4 shows the displacement - δ, fixed by the device, the displacement of the real position of the pulse relative to its ideal position, generated by the computer on the time axis after the triggering of the threshold device in the presence of noise and interference simulated by the computer.

The device for processing a broadband phase-shift keyed signal contains an auxiliary filter 1, the input of which is the input of the matched filter, and its output is the input of the delay line 2, twenty phase shifters 3.1 ... 3.20, adder 4, twenty relays 5.1 ... 5.20, register 6, threshold device 7, and phase shifter 3.1 is connected to relay 5.1, phase shifter 3.2 - to relay 5.2, phase shifter 3.3 - to relay 5.3, phase shifter 3.4 - to relay 5.4, phase shifter 3.5 - to relay 5.5, phase shifter 3.6 - to 5.6, phase shifter 3.7 - to relay 5.7, phase shifter 3.8 - to relay 5.8, phase shifter 3.9 - to relay 5.9, phase shifter 3.10 - to relay 5.10, phase shifter 3.11 - to relay 5.11, phase shifter 3.12 - to relay 5.12, phase shifter 3.13 - to relay 5.13, phase shifter 3.14 - to relay 5.14, phase shifter 3.15 - to relay 5.15, phase shifter 3.16 - to relay 5.16, phase shifter 3.17 - to relay 5.17, phase shifter 3.18 - to relay 5.18, phase shifter 3.19 - to relay 5.19, phase shifter 3.20 - to relay 5.20, and the auxiliary output separate filter 1 is connected to relay 5.20, register 6 is connected to relay 5.1 ... 5.20, all outputs from phase shifters 3.1 ... 3.20 and relay 5.1 ... 5.20 are connected to adder 4, the output of adder 4 is connected to the input of threshold device 7, to which the feed input is also connected threshold voltage 3 from the computer.

Relays 5.1 ... 5.20 are made on the basis of vertically arranged L-shaped yokes with a core, described in the RF patent for utility model No. 19214, IPC H01H 51/00, author Terentyeva EA, publ. 10.08.2001.

Register 6 is based on twenty RS-flip-flops described in the book by M.V. Halperin. Electrical engineering and electronics: textbook / M.V. Halperin. - 2nd ed. - M .: FORUM: INFRA-M, 2017 .-- S. 332-337.

The threshold device 7 is made according to the scheme presented in the book Pavlov V.N., Nogin V.N. Circuitry of analog electronic devices: Textbook for universities. - 3rd ed. - M .: Hot line - Telecom, 2005 .-- S. 238-239.

The device for processing the SHP-FM signal works as follows.

In a computer based on any of the eight twenty-bit sequences of the form: 11111111100100111000, 11111111100011100100, 11111111011001110000, 11111111000011100110, 11101010100101101100, 11100110110100101010, 111001010101001010, 111001010101001010010, 111001001001010, 111001001001010 These sequences are interesting because in the ACF plot for the first four sequences shown in FIG. 2 and the ACF plot of the last four sequences shown in FIG. 3. it is shown that the width of the main lobe of their ACF is two times wider than that of classical pseudo-random sequences, and the value of the side lobe of the ACF is equal to zero from the second to the eighteenth cycle of the cyclic shift of the sequence when calculating the ACF. It should be noted that, depending on the simulated situation, any of eight binary 20-bit sequences can be written in register 6 of the device. The formed mixture is fed to the input 1 of the device and, accordingly, to the input of the auxiliary filter 1. At the output of the auxiliary filter 1, under the influence of the input delta pulse, a radio pulse with a rectangular envelope appears. This pulse enters the delay line 2 with taps. From the outputs of the triggers of register 6, the twenty-bit sequence is continuously fed to the control inputs of the relay 5.1 ... 5.20, respectively, when a logic 0 signal arrives at the control input of any of the relay 5.1 ... 5.20, its contacts are closed in such a way that the corresponding output of the delay line is switched through the phase shifter 3.1 ... 3.20, respectively , in the case of receipt from the trigger register 6 logical 1, the contacts of the corresponding relay are closed in such a way that the output of the delay line is switched, bypassing the corresponding phase shifter 3.1 ... 3.20. Nineteen values from each tap of the delay line and the value from the output of the auxiliary filter 1 are fed to the input of the adder 4. Where they are added and thus the values of the correlation function U (t) are formed at the output of the adder 4, which are fed to the threshold device 7, where they are compared with the set value of the threshold voltage U _p . FIG. 4 shows a graphical representation of the values of the correlation function calculated by the adder 4 on the time axis, shows the set value of the threshold U _p and the accuracy of pulse detection - 8, which is due to distortions of the processed WB-FM radio signal by interference and noise, as well as the set value of U _p . The value of the threshold voltage U _p is fed from the computer to the input 3 of the threshold device and can be set in the range from 0 to U _{p max} . If the value of the correlation function exceeds the set value of the threshold voltage U _p , then a pulse signal is generated at the output of the threshold device 7, which is then used to analyze the probabilistic and accuracy characteristics of the processing of the WB-FM signal.

Thus, the proposed device for processing a wideband phase-shift keyed signal allows you to implement functions that are not provided for by the prototype, that is, it allows you to simulate the processing of a WB-PM signal, for example, when solving problems of frame synchronization, formed on the basis of a twenty-bit binary sequence, taking into account the possibility of setting the threshold for its processing when simulating the conditions of exposure to various noises and interference with further determination of the probabilistic characteristics and assessment of the accuracy of the processing of the WB-FM signal by the device with multiple simulation of the processing process.

Claims (1)

A device for processing a broadband phase-shift keyed signal containing an auxiliary filter, the input of which is the input of the device, and its output is the input of the delay line, thirteen phase shifters and an adder, characterized in that an additional twenty relays are introduced into it, and the first relay is connected to the nineteenth output of the delay line , the second relay - to the eighteenth output of the delay line, the third relay - to the seventeenth output of the delay line, the fourth relay - to the sixteenth output of the delay line, the fifth relay - to the fifteenth output of the delay line, the sixth relay - to the fourteenth output of the delay line, the seventh relay - to the thirteenth output of the delay line, the eighth relay - to the twelfth output of the delay line, the ninth relay - to the eleventh output of the delay line, the tenth relay - to the tenth output of the delay line, the eleventh relay - to the ninth output of the delay line, the twelfth relay - to the eighth output of the delay line, the thirteenth relay - to the seventh output of the delay line and, the fourteenth relay - to the sixth output of the delay line, the fifteenth relay - to the fifth output of the delay line, the sixteenth relay - to the fourth output of the delay line, the seventeenth relay - to the third output of the delay line, the eighteenth relay - to the second output of the delay line, the nineteenth relay - to the first output of the delay line, the twentieth relay - to the output of the auxiliary filter, and also seven phase shifters are introduced into it, with the first phase shifter connected to the first relay, the second phase shifter - to the second relay, the third phase shifter - to the third relay, the fourth phase shifter - to the fourth relay , the fifth phase shifter - to the fifth relay, the sixth phase shifter - to the sixth relay, the seventh phase shifter - to the seventh relay, the eighth phase shifter - to the eighth relay, the ninth phase shifter - to the ninth relay, the tenth phase shifter - to the tenth relay, the eleventh phase shifter - to the eleventh relay, the twelfth phase shifter - to the twelfth relay, the thirteenth phase shifter - to the thirteenth relay, fourteenth the th phase shifter - to the fourteenth relay, the fifteenth phase shifter - to the fifteenth relay, the sixteenth phase shifter - to the sixteenth relay, the seventeenth phase shifter - to the seventeenth relay, the eighteenth phase shifter - to the eighteenth relay, the nineteenth phase shifter - to the nineteenth relay, the twentieth phase shifter - to the nineteenth relay, the twentieth phase shifter a control input from a register is also connected to each relay, while the adder output is connected to the input of the threshold device, to which the input for supplying the threshold voltage from the computer is also connected.

Images