RU2018194C1 - Method of manufacturing silicon structure with dielectric insulation - Google Patents

Abstract

FIELD: microelectronics. SUBSTANCE: method of manufacturing silicon structure with dielectric insulation of components involves the steps of: carrying out the mechanical working of an initial single-crystal and support silicon wafers, forming a relief and burriend layer in the initial single-crystal silicon wafer, forming an indulating dielectric film, filling the relief with a polysilicon layer, carrying out the mechanical working of the polysilicon layer for obtaining a planar surface, applying a layer of powder-like glassy dielectric onto the surface to be soldered, onto each soldered surface with thickness of no more than 10 mcm. The dielectric thermal expansion coefficient is matched with the same of silicon synthesized in plasma with maximum particle size of no more than 0.5 mcm. The initial and support wafers having been soldered under pressure of (5-50)10^-2 Pa, the initial wafer is removed till obtaining single crystall insulated regions of a given thickness. EFFECT: enhanced yield. 3 dwg

Description

 The invention relates to the production of semiconductor devices and ICs, mainly to the production of silicon structures with dielectric insulation.

A known method of manufacturing a silicon structure with dielectric insulation of elements, including precision machining (grinding and polishing) of the original single-crystal silicon wafer, the formation in the original single-crystal silicon wafer of the relief and a hidden layer of n ⁺ -type, the formation of a SiO ₂ film by thermal oxidation over the entire relief, application over a SiO ₂ film by centrifugation of a suspension of 2-4 thin layers of C 40-2 grade glass glass with a thickness of 2-5 microns each, fusion and crystallization ation of each layer at 1204 ^{° C,} applying a slip pyroceramics by thick layer glass (300-500 microns) and its melting and crystallization at 1204 ^{° C,} opening the monocrystalline silicon pockets precision machining (grinding and polishing) [1].

The disadvantages of this technology are:
- poor reproducibility of the coincidence of the coefficient of thermal expansion (CTE) of the C40-2 glass and silicon due to the stringent requirements for the temperature-time regime of fusion and crystallization, which leads to mechanical stresses, warping of the structure and desiccation of areas of single-crystal silicon;
- the need for multiple application and melting of layers of powder of glass glass;
- high thermal resistance of structures due to the low thermal conductivity of the formed sitallic substrate in comparison with silicon;
- the need for special protection of the surface of the glass from etching when using standard etchants used in the manufacturing technology of IP (for example, based on hydrofluoric acid);
- poor reproducibility of the properties of the glass powder and the possibility of contamination of silicon during high-temperature heat treatments with impurities introduced by mechanical grinding of the original glass.

Closest to the proposed one is a method of manufacturing the structure of a semiconductor device, including creating a relief and an n ⁺ layer on the surface of the initial single-crystal silicon wafer, forming a dielectric film on the relief, growing polycrystalline silicon on a relief with a dielectric film, and thermocompression welding of this layer with a polycrystalline support plate Si, followed by mechanical removal of the material of the initial plate to the level of polycrystalline Si [2]. The structure is a single-crystal Si region completely insulated by a dielectric in a layer of polycrystalline Si connected to a support plate.

This method allows you to create a structure with a good heat sink and reduce warpage, however, it has several disadvantages, namely:
- the operation of thermocompression welding of two surfaces of polycrystalline Si requires careful preparation of the surfaces to be welded by polishing to obtain an uneven height of less than 10 nm and high plane parallelism, which is difficult due to the granular structure of polycrystalline Si, as well as due to the complex deformation of the initial plate with relief and polysilicon caused, on the one hand, by the anisotropy of the mechanical properties of the single crystal and the presence of a relief, and, on the other hand, by the action of compressive stresses t polycrystalline Si.

 The purpose of the invention: reducing the density of structural defects in single-crystal isolated areas of silicon, increasing the mechanical strength of structures, simplifying the manufacturing process of silicon structures by eliminating the precision polishing of soldered silicon wafers.

The goal is achieved in that in the proposed method, including two-sided machining of the initial single-crystal and silicon support wafers, forming a relief and a hidden layer in the original single-crystal silicon wafer, forming an insulating insulating film, filling the relief with a polysilicon layer, machining the polysilicon layer to obtain a flat surface, soldering of the initial and supporting plates and mechanical removal of the initial plate to obtain single-crystal isolators areas of a given thickness, in contrast to the known method, after the two-sided machining of the base plate and the machining of the polysilicon layer filling the relief, layers of a powdery glassy dielectric are matched to the soldered surfaces, matched by the coefficient of thermal expansion with silicon synthesized in the plasma, with a maximum size particles of not more than 0.5 microns on each of the soldered surfaces with a thickness of not more than 10 microns, but not less than twice the height of the irregularities surfaces, and the next then the soldering of the source and support plates is carried out at a pressure on the soldering of the surface (5-50) ˙10 ² Pa.

 The proposed method has a number of distinctive features from the prototype features.

 The main difference is the use of a powdered glassy dielectric, which is matched by the coefficient of thermal expansion with silicon synthesized in plasma, with a maximum particle size of not more than 0.5 μm for soldering the initial and supporting silicon wafers.

The next distinguishing feature is the change in the soldering modes of the initial and supporting silicon wafers, namely: the specific pressure on the surface to be soldered during the soldering process is in the range (5-50) ˙ 10 ² Pa, which allows one to reduce the density of structural defects in single-crystal isolated silicon regions.

 In the proposed method, unlike the prototype, there are no technological operations for intermediate polishing of the soldered surfaces of the initial and supporting silicon wafers.

The use as a powdery glassy dielectric of a powder of a glassy material synthesized in a plasma is associated with a number of advantages of such a material compared to a powdery glassy dielectric obtained by the traditional method of grinding granulate. These benefits include:
- the ability to obtain submicron powders with a particle size of less than 0.5 μm of a regular spherical shape, which allows to reduce the thickness of the applied layers of a powdery dielectric, improves their sintering ability and eliminates the appearance of large pores in the layer of a glassy dielectric. In the case of using glass as a glassy dielectric, the time required for its crystallization at an appropriate temperature decreases with decreasing powder particle size, and when using an amorphous material, its sintering ability and ability to fill irregularities increases, which reduces the duration of high-temperature processing during soldering, and therefore, to reduce the density of structural defects introduced during this treatment.

- the possibility of obtaining a highly pure powder material that has excellent reproducibility of properties, since its chemical composition depends almost exclusively on the composition of the feedstock, in contrast to powders obtained by the traditional method of grinding granulate, which introduces more pollution the smaller the particle size is obtained;
- high activity of the surface of the particles of the plasma powder, which improves adhesion to silicon and powder sintering, which eliminates the need for melting the layers of the glassy dielectric powder on the surfaces of silicon wafers to be brazed and reduces the time of brazing and pressure on the brazed surfaces, and therefore, to reduce the density of structural defects, formed in this case in silicon;
- finally, the manufacturability of plasma synthesis, in which the synthesis of the material and its dispersion and spheroidization of particles are combined in one process.

 PRI me R. For the fabrication of KSDI, we used the initial plates of 1 single-crystal silicon of n-type conductivity with a resistivity of 4 Ohm ˙ cm, diameter 100 mm, orientation (100), and a thickness of 500 μm; as support plates 2, plates of single-crystal silicon EKES-0.01 with a diameter of 100 mm and 500 microns thick.

 The method is illustrated in FIG. 1-3.

The original plate was subjected to double-sided chemical-mechanical polishing, support-double-sided grinding with free abrasive and alkaline etching. On the initial plate 1 (see Fig. 1), anisotropic etching through a mask of SiO ₂ etched V-grooves 3 with a depth of 37 ± 2 μm. The relief surface 1200 ^o C was carried out to obtain the arsenic diffusion n ⁺ -layer 4, depth 6.0 ± 0.5 microns, thermal and pyrolytic oxidation to a thickness of the oxide layer 5 is equal to (2.5-4.5) microns and depositing a polycrystalline 6 silicon thickness of 70 ± 10 microns at 1200 ^C in an installation UNES-101M by chemical reduction of SiCl ₄ in hydrogen. The resulting structure was subjected to grinding with a free abrasive to a depth of 20 μm. Then, a layer of a glassy dielectric powder 7, matched by the coefficient of thermal expansion with silicon synthesized in a low-temperature plasma, was applied to the structure and the base plate by spraying a suspension onto a hot substrate. After that, the plate and the relief structure were connected to each other so that the deposited glass was between them, clamped in a clamp with a spring dynamometer and subjected to heat treatment in a diffusion furnace in a stream of nitrogen at constant pressure. Sintering temperature ^{1200 °} C, time 10 min, resulting in a junction region 8 (FIG. 2). Then, the brazed plates were subjected to standard technological operations to obtain silicon structures with dielectric insulation with insulated silicon islands 9 (Fig. 3).

In the obtained structures, the thermal resistance between the isolated single-crystal silicon regions and the silicon support plate does not exceed 125 K / W, and the average dislocation density in the isolated single-crystal silicon regions is no more than 5 × 10 ³ cm ^-2 .

Claims (1)

METHOD FOR PRODUCING A SILICON STRUCTURE WITH DIELECTRIC INSULATION of elements, including two-sided mechanical processing of an initial single-crystal and support silicon wafer, formation of a relief and a hidden layer in the original single-crystal silicon wafer, formation of an insulating insulating film, and filling of the relief with a field layer soldering of the initial and supporting plates and mechanical removal of the initial plate to obtain single-crystal isolated regions of a given thickness, characterized in that after the two-sided machining of the base plate and the machining of the polysilicon layer filling the relief, a layer of powdery glassy dielectric is matched to the soldered surfaces, matched by the coefficient of thermal expansion with silicon synthesized in the plasma, with a maximum size particles of not more than 0.5 microns on each of the soldered surfaces with a thickness of not more than 10 microns, but not less than twice the height n roughnesses of the soldered surfaces, and the next then the soldering of the initial and supporting plates is carried out at a pressure on the soldered surfaces (5 - 50) · 10 ² Pa.

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