RU2015109474A - Код векторного исключения - Google Patents
Код векторного исключения Download PDFInfo
- Publication number
- RU2015109474A RU2015109474A RU2015109474A RU2015109474A RU2015109474A RU 2015109474 A RU2015109474 A RU 2015109474A RU 2015109474 A RU2015109474 A RU 2015109474A RU 2015109474 A RU2015109474 A RU 2015109474A RU 2015109474 A RU2015109474 A RU 2015109474A
- Authority
- RU
- Russia
- Prior art keywords
- exception
- vector
- code
- led
- vector register
- Prior art date
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
- G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
- G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Complex Calculations (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
Claims (15)
1. Способ улучшения обработки исключений, включающий
определение процессором того, что исполнение команды в вычислительной среде привело к возникновению исключения, причем указанная команда содержит по меньшей мере одну операцию типа "одиночный поток команд, множественный поток данных" (SIMD) и должна действовать на векторный регистр, содержащий набор элементов; и
получение, на основе указанного исключения, кода векторного исключения, содержащего позицию в векторном регистре того элемента из набора элементов векторного регистра, который привел к возникновению исключения.
2. Способ по п. 1, в котором позиция содержит индекс в векторном регистре, соответствующий элементу, который привел к возникновению исключения.
3. Способ по п. 1, в котором позиция содержит элемент с наименьшим индексом в векторном регистре, приведший к возникновению исключения.
4. Способ по п. 1, в котором получение кода векторного исключения основано на том, что указанное исключение привело к возникновению прерывания.
5. Способ по п. 1, в котором код векторного исключения содержит первую часть для указания позиции и вторую часть для указания кода векторного прерывания.
6. Способ по п. 5, в котором позиция содержит элемент с наименьшим индексом в векторном регистре, который привел к возникновению исключения.
7. Способ по п. 5, в котором код векторного прерывания содержит значение, предназначенное для указания недопустимой операции, деления на ноль, переполнения, нехватки разряда или неточного результата.
8. Способ по п. 1, который также включает определение того, какой элемент или элементы векторного регистра привели к возникновению исключения, и на основе указанного определения того, какой элемент или элементы векторного регистра привели к возникновению исключения, получение позиции для включения в код векторного исключения.
9. Способ по п. 8, в котором указанное получение позиции включает определение элемента с наименьшим индексом из одного или нескольких элементов, которые привели к возникновению исключения, и использование индекса указанного элемента с наименьшим индексом в качестве позиции.
10. Способ по п. 1, который также включает помещение кода векторного исключения в поле кода исключения данных управляющего регистра операций с плавающей запятой.
11. Способ по п. 1, в котором длина элемента указывается в поле команды.
12. Система, содержащая средства, приспособленные для выполнения всех шагов способа по любому из пп. 1-11.
13. Компьютерная программа, содержащая команды для выполнения всех шагов способа по любому из пп. 1-11 при ее исполнении в компьютерной системе.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/748,504 | 2013-01-23 | ||
| US13/748,504 US9715385B2 (en) | 2013-01-23 | 2013-01-23 | Vector exception code |
| PCT/IB2013/060697 WO2014115002A1 (en) | 2013-01-23 | 2013-12-06 | Vector exception code |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| RU2015109474A true RU2015109474A (ru) | 2017-03-03 |
Family
ID=51208701
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| RU2015109474A RU2015109474A (ru) | 2013-01-23 | 2013-12-06 | Код векторного исключения |
Country Status (14)
| Country | Link |
|---|---|
| US (2) | US9715385B2 (ru) |
| EP (1) | EP2948870A4 (ru) |
| JP (2) | JP6788347B2 (ru) |
| KR (1) | KR101740841B1 (ru) |
| CN (1) | CN104956364B (ru) |
| AU (1) | AU2013375140B2 (ru) |
| BR (1) | BR112015017663A2 (ru) |
| CA (1) | CA2895653C (ru) |
| IL (1) | IL240105B (ru) |
| MX (1) | MX340052B (ru) |
| RU (1) | RU2015109474A (ru) |
| SG (1) | SG11201503786QA (ru) |
| TW (1) | TWI584190B (ru) |
| WO (1) | WO2014115002A1 (ru) |
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| US9778932B2 (en) | 2013-01-23 | 2017-10-03 | International Business Machines Corporation | Vector generate mask instruction |
| US9471308B2 (en) | 2013-01-23 | 2016-10-18 | International Business Machines Corporation | Vector floating point test data class immediate instruction |
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-
2013
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- 2013-12-06 CA CA2895653A patent/CA2895653C/en active Active
- 2013-12-06 BR BR112015017663A patent/BR112015017663A2/pt not_active Application Discontinuation
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- 2013-12-06 CN CN201380071197.1A patent/CN104956364B/zh active Active
- 2013-12-06 EP EP13872480.2A patent/EP2948870A4/en not_active Withdrawn
- 2013-12-06 RU RU2015109474A patent/RU2015109474A/ru unknown
- 2013-12-06 SG SG11201503786QA patent/SG11201503786QA/en unknown
- 2013-12-06 KR KR1020157020286A patent/KR101740841B1/ko active Active
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| AU2013375140B2 (en) | 2017-03-23 |
| AU2013375140A1 (en) | 2015-07-16 |
| EP2948870A1 (en) | 2015-12-02 |
| TWI584190B (zh) | 2017-05-21 |
| MX340052B (es) | 2016-06-22 |
| US9727334B2 (en) | 2017-08-08 |
| KR101740841B1 (ko) | 2017-06-08 |
| SG11201503786QA (en) | 2015-06-29 |
| US20150143074A1 (en) | 2015-05-21 |
| JP6788347B2 (ja) | 2020-11-25 |
| CA2895653C (en) | 2020-08-04 |
| HK1210845A1 (en) | 2016-05-06 |
| US9715385B2 (en) | 2017-07-25 |
| IL240105B (en) | 2019-03-31 |
| KR20150110556A (ko) | 2015-10-02 |
| TW201447753A (zh) | 2014-12-16 |
| JP2019145164A (ja) | 2019-08-29 |
| CN104956364A (zh) | 2015-09-30 |
| WO2014115002A1 (en) | 2014-07-31 |
| CN104956364B (zh) | 2018-07-27 |
| EP2948870A4 (en) | 2016-11-09 |
| JP2016509716A (ja) | 2016-03-31 |
| IL240105A0 (en) | 2015-09-24 |
| US20140208086A1 (en) | 2014-07-24 |
| BR112015017663A2 (pt) | 2017-07-11 |
| CA2895653A1 (en) | 2014-07-31 |
| MX2015009458A (es) | 2015-09-24 |
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