RS20170694A1 - Method for transferring large quantites of data between a peripheral device and virtual memory - Google Patents

Description

The process of transferring large amounts of data between a peripheral device and virtual memory

Field of technology to which the invention relates

The invention belongs to the field of integrated circuits and peripheral units for the acquisition, processing or transmission of large amounts of data. More precisely, the invention is related to direct memory access (DMA) in systems that have one or more integrated circuits. The key to the invention are page tables (Rage Tables), located in the system memory. Also, the invention belongs to the field of memory management, i.e. the field of translating continuous virtual addresses into physical addresses, which is done using page tables.

The designation according to the International Patent Classification (IPC) is: G06F12/10, G06F12/1009, G06F12/1081, G06F13/00.

Technical problem

The technical problem solved in the presented method is the transfer of large amounts of data between the peripheral unit and virtual memory.

A typical way to transfer data is to use a buffer in physical memory located between the peripheral and the virtual memory. The peripheral writes or reads data to the buffer, and the processor copies the data between the buffer and the virtual memory. The process is repeated until all the necessary data is transferred. However, this process consumes processor time for copying. The proposed invention avoids the use of a buffer, since it can access virtual memory itself, because it performs the algorithm for translating virtual pages into physical ones.

State of the art

Patent US 8898429 V2, published on December 29, 2011 under the title "Application processor and a computing system having the same" by Samsung Electronics, describes a variety of peripherals configured to share page tables and perform direct memory access operations. However, an important difference compared to the proposed method is that in the given patent, each memory management unit (MMU) has a translation lookaside buffer (TLB). The described MMU is random access, as a result of which the TLB is necessary as a cache memory to speed up the execution of the process, while the MMU in the described method has a different role. Also, unlike the given patent, the operating system of the described method takes over some of the functions of the mentioned control unit.

Patent US 7653803 V2 published on January 17, 2006 by Globalfoundries under the title "Address translation for input/output (I/O) devices and interrupt remapping for I/O devices in an I/O management unit (IOMMU)" describes an input/output MMU for several devices and at least one memory in which the translated data is stored; that is, one or more device table entries. In contrast to this, in the proposed method, the MMU is on the device itself. This patent also describes a specific implementation of the page table, i.e. that they have a hierarchical structure.

Patent US 7370137 V2 of Intel Corporation, entitled "Inter-domain data mover for a memory-to-memory source engine", published on June 6, 2005, defines data address translation using different page tables, while the proposed method uses the same page table. A DMA machine is used for the purpose of copying using page table translation. Therefore, copying is performed between two processors, while in the proposed method, copying is performed between a peripheral device and the processor. An important difference is that data movement is performed between virtual machines.

Patent application US 20150261687 A1 published on March 14, 2014 by International Business Machines Corporation under the title "Extended range table for i/o address translation" describes a method and system for extending a page table. A page in the address memory space is accessed based on the start of the table page and the extended index. Contiguous pages are accessed by write and read operations. The advantage of this patent application is related to the translation of virtual addresses into physical addresses for the DMA address space, but it does not solve the problem of accessing existing pages, nor the problem of sharing the same page table between a peripheral device and the central processor.

Exposition of the essence of the invention

The proposed method emphasizes the translation of virtual page addresses into physical addresses, whereby pages are read from the page table. Thus, the essence of the proposed method is the translation of continuous virtual buffer memory using a unit for translating continuous memory addresses (translating virtual to physical addresses). The invention continuously translates an entire region in a buffer with a plurality of pages. The advantage of this method of translation compared to individual translation is the smaller number of copies from the page table, as well as the fact that multiple physical addresses are obtained from the page table, based on which a whole series of pages are loaded and transferred, i.e. copied.

Brief description of the invention images

The following images complete the description of the invention:

Figure 1a: The process of the described invention in stages

Figure 1b: Description of the steps of the second phase of the procedure

Figure 2: System related to the described invention

Figure 3: Data transfer display

Detailed description of the invention

In the described method, the pages of a continuous buffer in virtual memory are automatically translated. Figure 1a shows the method with the main phases, where the process begins with the phase 100 of allocating the virtual memory buffer, which is performed by an application in the central processing unit. This is followed by the phase 200 of translating virtual addresses into physical addresses, namely virtual addresses of pages of the page table. The steps of this phase are described in the following paragraph. The method continues with the phase 300 of forwarding physical addresses, and then follows the phase 400 of transferring a data page sequence. Data is moved to and from the peripheral device, as well as from and to the virtual memory buffer. The phase 500 of checking the end of the page sequence transfer checks whether the transfer of the data pages is complete. If it is not complete, the process is repeated from the phase 200 of translating virtual addresses into physical addresses. Otherwise, phase 600 of interrupting the transmission of the data page sequence is performed and the process ends.

Figure 1b shows the steps in the virtual address to physical address translation phase 200. Thus, physical addresses are obtained from the virtual addresses of the pages of the page table and this process is recursive. By reading pages from the page table, the physical addresses of new pages from the page table are obtained, and finally the physical addresses of the data pages. The translation of the continuous virtual memory of the buffer is performed using a continuous memory address translation unit. Step 210 of calculating the page address of the page table is the first step 200 of the virtual address to physical address translation, which provides the corresponding physical addresses corresponding to the specific virtual addresses. Each table has a plurality of entries, i.e. data pages, which are not transferred individually, but a specific region of pages is translated continuously (the entire multi-page buffer). The table structure could be represented as a tree whose page elements are physical address entries, and the virtual address fields determine which entry to use. In step 220, the page table page address forwarding sends the data page addresses to the page moving unit. After that, in step 230, the page table page entries are read, and then in step 240, the read page forwarding passes the entries, or pages, to the memory address translation unit. If the last level of the data page table has not been reached, the procedure returns to step 210, calculating the page address of the page table, which is checked in step 250, checking the last level of the page table. If the last new page table of the data has been reached, the procedure ends with step 260, calculating the data page address.

Figure 2 shows a system with direct memory access 730, for quickly copying and transferring large amounts of data between a peripheral device 700 and a virtual memory 740. The central processing unit 720 allocates a buffer 745 in the virtual memory 740 and passes to the peripheral device 700 the address, the size of the buffer 745 of the virtual memory 740 and the operation, for example a read or write. The peripheral device 700 translates the contiguous virtual memory 740 using a unit 710 for translating contiguous memory addresses from virtual addresses to physical addresses. The continuous memory address translation unit 710 reads the page table 735 in larger chunks, while the page mover 715 moves data from a specific device to and from the buffer 745 of the virtual memory 740. For this purpose, it uses the physical addresses of the pages obtained from the continuous memory address translation unit 710. Thus, the page mover 715 uses the physical addresses of the buffer 745 from the continuous memory address translation unit 710. The memory management unit 725 receives said physical addresses from the buffer 745 of the virtual memory 740 and manages the memory 730 using the page tables 735. The application 726 passes the virtual addresses of the buffer 745 of the virtual memory 740 to the contiguous memory address translation unit 710.

The unit 710 for translating contiguous memory addresses from virtual addresses to physical addresses is an MMU (Metro management unit) located on the peripheral device 700. Using the translated physical addresses, the MMU accesses memory 730. Unlike a standard MMU, which translates only one address at a time, the unit 710 for translating contiguous memory addresses translates strings of addresses, since it reads entire pages from a page table 735. The number of copies from memory 730 is reduced compared to a standard MMU, which is described in the next paragraph.

Figure 3 shows the transfer of data pages 820 of the page table 735, whereby one page 820 of the page table 735 is always transferred, which represents the smallest unit of transfer. The characteristic of the described method is, as already mentioned, the translation not of a single page 820 of the page table 735, but of an entire region of pages of the page table 735, which are continuously translated. In addition to the fact that the number of copies to the memory 730 is reduced, physical addresses are obtained from the page table 735 and based on them the entire series of pages 820 of the page table 735 is loaded and transferred, i.e. copied.

Data pages 840 contain user data and are located in buffer 745 of virtual memory 740. In this virtual address space, the given user data is located in a continuous series of addresses, one after the other, while in the physical address space, the data pages 840 are not arranged one after the other, but are scattered. Pages 820 of the page table 735 contain physical addresses that can point to another page 820 of the page table 735 or to a data page 840. The algorithm calculates an index based on the virtual address to find which address of a given page 820 of the page table 735 should be read.

Method of industrial and other application of the invention

When a peripheral device wants to write to a buffer, it is usually not possible to directly access the virtual buffer because there is no unit for translating continuous memory addresses from virtual to physical addresses. The application of the described invention is based on the idea that a new driver is not needed and that the mentioned unit for translating continuous memory addresses is used for virtualization. However, the basic application of the described invention is the way in which a virtual continuous buffer is used. Generally, the unit for translating continuous memory addresses does not allow writing to any part of the memory, but also the operating system does not allow allocating a sufficiently large physical buffer. By writing directly to a larger virtual memory buffer, larger amounts of pages are read.

Claims (8)

Patent claims: 1. A method of transferring a large amount of data between a peripheral device 700 and a virtual memory 740, where a buffer 745 of the virtual memory 740 is allocated in the virtual memory 740 of a given user space in the phase 100 of allocating the buffer 745 of the virtual memory 740, and the corresponding virtual addresses are translated in the phase 200 of translating virtual addresses into physical addresses, characterized in that by step (220) of forwarding the page address (820) of the page table (735) and by step (230) of reading the page (820) of the page table 735, virtual addresses of the data pages (840) corresponding to certain physical addresses are obtained; that the read pages (820) of the page table (735) are forwarded by step (240) of forwarding the read pages (820) of the page table (735), while after step (250) of checking the last level of the page table (735), in case of a positive outcome, the procedure continues with step (260) of calculating the address of the page (840) of the data, and otherwise the procedure continues from step (210) of calculating the address of the page (820) of the page table (735); that the procedure continues with phase (300) of forwarding the physical addresses to the unit (715) for moving the pages (820) of the page table (735); that the phase (400) of transferring a series of pages (820) of the page table (735) moves the given data to and from the peripheral device (700), as well as from and to the buffer (745) of the virtual memory (740); that the phase (500) of checking the end of the transfer of the series of pages (820) of the page table (735) checks whether the transfer of the pages (820) of the page table (735) is complete; and that in the affirmative case, the phase (600) of interrupting the transmission of the series of pages (820) of the table (735) of pages is performed. 2. The method defined according to claim 1, characterized in that in the phase (200) of translating virtual addresses into physical addresses, the translation process is performed using a unit (710) for translating continuous memory addresses from virtual addresses into physical addresses. 3. The method defined according to claim 1 and 2, characterized in that the phase (200) of translating virtual addresses into physical addresses continuously translates the entire region of data pages (840), i.e. the entire buffer (745) of virtual memory (740) with a plurality of data pages (840). 4. The method defined in claim 1, characterized in that in the physical address forwarding phase (300), physical addresses of the data page (840) are forwarded, obtained from the continuous memory address translation unit (710). 5. The method defined according to claim 1 and 4, characterized in that in the phase (400) of transferring a series of pages (820) of a table (735) of pages, the smallest unit of transfer is one page (820) of the table (735) of pages. 6. The method defined according to claim 1 and 4, characterized in that in the phase (400) of transferring a series of pages (820) of a table (735) of pages, by moving the data, the entire series of pages (820) of the table (735) of pages is actually moved. 7. The method defined according to claim 1, characterized in that within the phase (200) of translating virtual addresses into physical addresses, and in step (250) of checking the last level of the page table (735), the method returns to step (210) of calculating the page address (820) of the page table (735) in the event that the last level of the page table (735) has not been reached. 8. The method defined according to claim 1, characterized in that by checking in the phase (500) of checking the end of the transfer of the series of pages, the method is re-executed from the phase (200) of translating virtual addresses into physical addresses if the transfer of pages (820) of the table (735) of pages is not completed, i.e. if a sufficient number of pages (820) of the table (735) of pages have not been transferred.