LU102123B1 - Boost converter circuitry, power supply and method for stepping up an input voltage - Google Patents

Abstract

The invention relates to a step-up converter circuit arrangement (100) for the power supply of an electrical consumer, comprising - a two-switch step-up converter circuit (120), and - a control unit (130) for controlling the two semiconductor switches (S1, S2) for operating the Boost converter circuitry (100) in a boundary conduction mode. According to the invention, the control unit (130) is set up to switch the first semiconductor switch (S1) and/or the second semiconductor switch (S2) as a function of a predetermined reference value (Umain) and to switch the predetermined reference value (Umain) as a function of at least one parameter variable dependent on the operating conditions (Pb) to a new reference value (U) for switching the first semiconductor switch (S1) and/or the second semiconductor switch (S2).

Description

EM-2020-0311 -1- LU102123 Boost converter circuit arrangement, power supply and method for converting an input voltage The present invention relates to a boost converter circuit arrangement for the power supply of an electrical consumer according to the preamble of patent claim 1 Boost converter circuitry according to the invention. In this case, a step-up converter circuit arrangement can be used in particular as a power factor pre-regulator in a switched-mode power supply. The invention also relates to a method for stepping up the input voltage in a power supply of an electrical consumer.

The basic circuit of a boost converter (also known as a step-up converter or step-up converter) is used in DC-DC converters whose input voltage is lower than the output voltage. The same principle, but with a transformer instead of an inductor, is used in low-power switched-mode power supplies — also known as flyback converters (actually not a transformer either, but rather a two-winding choke) . In the case of a transformer, the input power consumed is delivered at the same time at the output. In a flyback converter, the power consumption and output of the choke occurs through the windings in different cycles. The circuit is also used in PFC input stages (PowerFactorCorrection) that provide an intermediate circuit voltage of approx. 400 V DC voltage internally in the device. The power consumption of these PFC stages follows the sine curve of the input voltage, so that contamination of the network by harmonics is avoided. Switching power supplies then work on this intermediate circuit voltage,

EM-2020-0311 -2- Frequency converters or electronic ballasts that would otherwise generate strong LU102123 harmonics. Power supplies are required for a wide range of areas and purposes. Since the term power supply is used in many ways, the term converter is used below. Their job is to control the flow of current between the power source and the load, or to convert it from one type of current to another. They belong to the sub-area of power electronics within electrical engineering. There are the following types of power converters: rectifiers, inverters, DC converters and AC converters. These different power converters also include the power supply units, which are also referred to as power supply units. They have the task of supplying electronic equipment with direct current. A distinction is made between linear power supplies and switching power supplies. The switched-mode power supplies also belong to the regulated power supplies.

1 shows the basic structure of a switched-mode power supply. It consists of the components active PFC circuit 10, DC converter 20, power transmission stage 30, smoothing 40, control stage 50, electrical isolation 60 and control 70. The mains voltage from the public power supply network is present at the input of the switched-mode power supply. The AC voltage with an effective value of 230 V and a mains frequency of 50 Hz is given as an example. The following three components can be present in the active PFC circuit 10, line filter 1, step-up converter 2 and filter capacitor 3. At the output of the active PFC circuit 10 there is a high DC voltage, which relates to the voltage value 400 V, for example. This DC voltage is chopped up by the DC converter 20 into a square-wave signal. It contains a power transistor, e.g. bipolar transistor 4, MOSFET transistor, corresponding to Metal Oxide Semiconductor Field Effect Transistor, thyristor or IGBT, corresponding to Insulated Gate Bipolar Transistor, which generates the square-wave signal through switching operations. By changing the pulse duty factor of the square-wave signal, different voltages and currents and thus also different power levels can be set. For controlling the circuit breakers

EM-2020-0311 -3-

mainly the techniques of pulse width modulation (PWM) and pulse train or

LU102123 Pulse Frequency Modulation (PFM) used.

It is for power supplies that are designed for power ranges of 75 W and more

Regulation that they are equipped with PFC technology, according to Power Factor Correction, in order to avoid repercussions on the power supply network by generating harmonics.

This is also defined in the European standard EN61000-3-2.

An active PFC circuit is often used for this.

This consists of a kind of additional switching power supply, which is connected upstream of the actual one and ensures that the current drawn corresponds to the sinusoidal mains voltage.

As a result, the current follows a course that would be caused by a resistance in the current mains voltage.

Thus, if the mains voltage is not exactly sinusoidal, as is often the case in power grids, the actual curve — not the idealized one — becomes the

Mains voltage traced.

The power factor remains close to unity and there are fewer harmonics.

Otherwise, they could build up and overload the power grid.

The power factor indicates the ratio of active power to apparent power.

If the phase shift between current and voltage is zero, real power and apparent power are equal and the power factor remains at unity.

When there is a noticeable phase difference between voltage and current, power flows back to the utility and the power factor drops below unity.

Active PFC circuits typically consist of a rectifier with a boost converter directly downstream, which charges a large capacitance capacitor to a voltage above the peak voltage of the AC line voltage, e.g. 400 V.

From this, the actual consumer (switching power supply or e.g.

B. electronic ballast of fluorescent lamps).

A step-up converter is also referred to as a step-up converter.

It is a flyback converter in which a coil drives a current through the load when the

Switching transistor blocks.

FIG. 2 shows the basic circuit diagram of a step-up converter that can be used in such an active PFC circuit.

By operating boost converter circuits in the so-called boundary conduction mode, a

EM-2020-0311 -4- low-loss switching of commonly used MOSFET LU102123 semiconductor switches S is achieved.

In this case, the step-up converter or the step-up converter circuit arrangement 100 (where the step-up converter circuit arrangement can include other components in addition to the actual step-up converter) is operated in the vicinity of the gap limit of the inductor current IL in such a way that both currentless switching on, so-called “zero current switching” ( ZCS) as well as a voltage-free switching, so-called "Zero Voltage Switching" (ZVS) of the switch S is made possible.

The inductor L1 of the step-up converter 100 and the output capacitance Coss of the semiconductor switch S form a series resonant circuit.

This oscillating circuit is charged within half the period of its natural frequency, so that when the sign of the inductor current IL changes, the output capacitance Coss is charged to twice the value of the step-up converter input voltage Vin, minus the step-up converter output voltage Vout.

As a result, when the semiconductor switch S is switched on again, the switching voltage and the inrush current and thus the switching losses are reduced.

Such switching losses arise when the semiconductor switch S has current flowing through it at the switching time.

According to Ohm's law, P = U*I.

The power loss P, which is converted into heat in the semiconductor switch S, is therefore dependent on how high the voltage that is applied is.

Voltage and current curves over a complete switching period Tperiod of the semiconductor switch S are shown in FIG.

The course of the current I. is triangular.

During the switch-on phase ton of the semiconductor switch S, the current through the inductor L1 increases linearly.

During the switch-off phase tor of the semiconductor switch S, the current IL through the inductor L1 falls linearly.

In the phase tres, which corresponds to half the period of the resonant frequency of the resonant circuit consisting of the inductor L1 and the output capacitance Coss of the semiconductor switch S, the direction of the current also changes.

The temporal relationships are made up as follows: ton = Pin * 2 L Vin Fors = om = Ta ton

EM-2020-0311 -5- LU102123 tres = 1 * /L* Coss Pin is the input power and L is the inductance of the choke coil L1. In order to ensure that the semiconductor switch S switches with as little loss as possible, the period Tperiod of a switching cycle must not be shorter than: Tperiod min = ton + toff + tres- This then ensures that the output capacitance Coss of the semiconductor switch S is discharged for loss-free switching can.

In particularly loss-optimized applications, a half-bridge PFC circuit with at least two active semiconductor switches S1, S2 is used instead of a conventional step-up converter according to FIG. This is shown in FIG. In this case, the diode D from FIG. 2 is replaced by a further semiconductor switch S2.

2 are explained in US Pat. No. 8,766,605 B2 in relation to the use of a half-bridge PFC circuit. The term half-bridge PFC circuit expresses the fact that both the positive and the negative half-wave are upconverted by the same semiconductor switch branch. However, this requires a polarity reversing circuit that closes the circuit.

5 shows the time sequence of the drive signals of the semiconductor switches S1 and S2 for a positive input voltage Vin based on the course of the drain-source voltage Vcoss of the first semiconductor switch 51 during the switching phases. The control signals are set by setting current thresholds In and li of the inductor current |. generated. For this purpose, the inductor current IL must be measured and compared with specified values.

In this case, the condition for switching off semiconductor switch S1 and switching on semiconductor switch S2 is that the current threshold In is exceeded

| EM-2020-0311 -6- of the inductor current IL. The current threshold In for the respective LU102123 operating point is specified by a current controller. In this case, the condition for switching off semiconductor switch S2 and switching on semiconductor switch S1 is that the inductor current IL falls below the current threshold li. The current threshold |; is statically specified and its position ensures that the output capacitance Coss of the semiconductor switch S1 is completely recharged. In contrast to the circuit in FIG. 2, in which the diode D determines the recharging process, the switch S2 remains switched on until the output capacitance Coss has been completely recharged to 0 V.

Thereafter, the semiconductor switch S1 is switched on and the semiconductor switch S2 is switched off at the same time, so that the current I. can commute from the semiconductor switch S2 to the semiconductor switch S1 and the current direction of the current IL changes again. A new cycle begins with the magnetization of the choke coil L1.

Details on this control method are described in more detail in the documents US 20070109822 A1 and US 8026704 B2. An alternative method for generating the drive signals for the semiconductor switches S1 and S2 is from the document "Current Mode Control structure: Current-Mode Control: Modeling and Digital Application", by Jian Li, April 14, 2009, Blacksburg, Virginia Polytechnic Institute and State University, known. In this case, comparators are used to generate the switching times tons: and tons2 of the semiconductor switches S1 and S2, which compare the current |. compare the voltage drop caused in a measuring resistor with voltage threshold values. From the document “LED Application Design Using BCM Power Factor Correction (PFC) Controller for 100W Lightning System”; AN-9731, 02011 Fairchild Semiconductor Corporation Rev. 1.0.0, 3/24/11 a circuit design for a PFC circuit operating in the so-called Boundary Conduction Mode (BCM) is known.

EM-2020-0311 -7- The invention is based on the object of providing a step-up circuit LU102123 circuit arrangement which is further improved with regard to its operation in a boundary-conduction mode. Advantageously, a further reduction in switching losses and an increase in efficiency should be achieved. Finally, it is also desirable to achieve a reduction in the component temperatures of the semiconductor switches and an associated increase in the service life. The invention is also based on the object of providing a power supply for an electrical consumer and a method for step-up conversion of the input voltage of such a power supply, as a result of which a correspondingly improved mode of operation is ensured.

As already described above, a wide variety of methods are already known for generating the control signals for the semiconductor switches of a step-up converter circuit. In some of the procedures, the principle of "constant on-time control" is applied. A controller that is supposed to keep the output voltage of the circuit constant specifies a power-equivalent on-time ton that is constant over a period of the mains half-wave. The demagnetization time tor of the first semiconductor switch S1 and thus the active time of the semiconductor switch S2 from Figure 4 is approximately precalculated using the following formula: rr = Ta ton Since the calculation can deviate due to tolerances and other factors such as delays in drivers, etc., it must be checked whether the current value in the inductance L was also reached with the completed off-time torr. The required information of the current can be taken from the path of the first current switch. A measurement voltage that is proportional to the current through the first semiconductor switch S1 can be generated with the aid of a current measurement resistor. FIG. 9 shows a possible control structure (implemented in a digital signal processor (DSP)), while FIG. 8 shows the course of the inductor current over time during the control.

EM-2020-0311 -8- In two post-published applications (DE 10 2020 117 180.3, DE 10 2020 120 LU102123

530.9) two different adjustment methods are described to ensure zero-voltage switching. In the first post-published application DE 10 2020 117 180.3, a current reference value is specified, at which zero-voltage switching is implemented. In the second post-published application DE 2020 120 530.9, a correction time is determined in order to adjust the calculated times. A time value is generated within the calculations after the demagnetization time has been determined in order to ensure zero-voltage switching. The content of both patent applications is expressly included in the scope of disclosure of this invention, in particular with regard to the structure of the step-up converter circuit arrangement described in each case and with regard to the described activation of the semiconductor switches of the step-up converter circuit.

The object on which the invention is based is achieved by a step-up converter circuit arrangement for the power supply of an electrical load with the features of claim 1. A step-up converter circuit arrangement according to the invention comprises a two-switch step-up converter circuit with a first semiconductor switch with a first output capacitance, with a second semiconductor switch with a second output capacitance, with an inductance and with a filter capacitor, the two-switch step-up converter circuit being set up to ensure that the output capacitance of the first semiconductor switch is discharged and/or that the output capacitance of the second semiconductor switch is discharged. The boost converter circuit arrangement also includes a rectifier or pole changer circuit with a first semiconductor element and a second semiconductor element, and a control unit for controlling the two semiconductor switches for operating the boost converter circuit arrangement in a boundary conduction mode. The first semiconductor switch and the second semiconductor switch are connected in series in a common first path and are arranged in parallel with a second path in which the semiconductor elements of the rectifier or pole changer circuit are connected in series. The connection contacts for the output voltage of the step-up converter are parallel to the first path in a first node and in a second node.

EM-2020-0311 -9- circuit arrangement, and is connected between the connection contacts of the LU102123 filter capacitor. The inductance is connected between a first supply terminal for connection to a voltage source and the connection node of the two series-connected semiconductor switches. A second supply connection for connection to the voltage source is connected to the node in which the semiconductor elements of the second path are connected in series. According to the invention, the control unit is set up to switch the first semiconductor switch and/or the second semiconductor switch as a function of a predetermined reference value and to convert the predetermined reference value into a new reference value for the actuation or switching of the first semiconductor switch and / or to adapt the second semiconductor switch. This achieves the desired advantage of reducing losses occurring within the circuit and increasing the efficiency of the circuit arrangement.

Further advantageous refinements of the invention are specified in the dependently formulated claims. The features listed individually in the dependent claims can be combined with one another in a technologically meaningful manner and can define further refinements of the invention. In addition, the features specified in the claims are specified and explained in more detail in the description, with further preferred configurations of the invention being presented.

According to an advantageous embodiment of the invention, it can be provided that the control unit is set up to adapt the current reference value to the operating condition described by the parameter variable as a function of the at least one parameter variable dependent on the operating condition, so that the switch-on time of the first semiconductor switch and/or the second semiconductor switch during the demagnetization phase the inductance is variable. As a result, the short-term adjustment of the control of the semiconductor switches, which is regulated to a reference current value for the best possible zero-voltage switching, can be adjusted to a selected one by a longer-term regulation superimposed on the short-term regulation

EM-2020-0311 -10 -

parameter value dependent on the operating conditions (e.g. the component temperature LU102123 of a semiconductor switch).

According to an alternative further development of the invention, it can also be provided that the control unit is set up to adapt the switching cycle time or the switch-on time of the semiconductor switch during the phase of demagnetization of the inductance to the operating condition described by the parameter size as a function of the at least one parameter size dependent on the operating conditions, so that the switch-on time of the first semiconductor switch and/or the second semiconductor switch can be varied during the demagnetization phase of the inductance.

As a result, the short-term adjustment of the control of the semiconductor switches, with the switching cycle time being continuously adjusted for zero-voltage switching that is as optimal as possible, can be superimposed by a longer-term adjustment over the short-term adjustment

Regulation, to a selected operating condition-dependent parameter value (such as the component temperature of a semiconductor switch) are optimally adjusted.

In order to implement such a superimposed regulation to optimize zero-voltage switching, it can be provided that the control device is set up to carry out a command variable regulation to a predetermined fixed reference value of the operating condition-dependent parameter size, which must not be undershot or exceeded.

In this case, the selected parameter variable is recorded in the form of a control variable and, for offsetting with a predetermined reference variable for the parameter variable, in the form of a

Deviation, fed to an optimization controller.

The first semiconductor switch and/or the second semiconductor switch is then actuated as a function of the optimization manipulated variable generated.

In an alternative implementation for a superimposed regulation for optimizing a zero-voltage switching, it can be provided that the control device is set up to carry out a reference variable regulation to a variable reference value of the parameter variable dependent on the operating conditions, depending on the change in the measured control variable representing the parameter variable.

The parameter variable is recorded as the controlled variable and the recorded controlled variable

EM-2020-0311 -11 -

of the current switching cycle of the semiconductor switches as a predetermined command variable Lu102123 for offsetting with the detected controlled variable from the previous switching cycle in the form of a command variable value for the parameter variable dependent on the operating conditions, in the form of a control deviation, to an optimization controller.

The first semiconductor switch and/or the second semiconductor switch is then actuated as a function of the optimization manipulated variable generated.

A third possibility for the realization of such a superimposed regulation for

Optimization of a zero-voltage switching provides that the control device is set up, depending on the measured control variable representing the parameter size from a control variable table, in which a plurality of experimentally or arithmetically determined operating point-dependent model control variables are stored, an optimized model control variable in

To be determined as a function of the measured control variable, and as a function of the determined optimized model reference variable, to enable control of the first semiconductor switch and/or the second semiconductor switch.

The measured reference variable and/or the model reference variables stored in the reference variable table are preferably represented by one or a combination of several of the following operating parameters: - the input voltage of the step-up converter circuit arrangement, - the output voltage of the step-up converter circuit arrangement, - the current through the current measuring resistor and the first semiconductor switch, or the current through the second semiconductor switch,

- the current through one of the semiconductor elements of the rectifier or

polarity reversing circuit,

- the current through the inductance or through the connection from the voltage source to the node between the semiconductor elements of the rectifier or pole-changing circuit,

- the current through the filter capacitor, - the component temperature of the first and/or second semiconductor switch, - the drain-source voltage of the first and/or second semiconductor switch.

EM-2020-0311 -12- In a further development of the invention it can also be provided that the LU102123 at least one parameter quantity dependent on the operating conditions is represented by a single operating parameter or a combination of several of the following operating parameters: - the drain-source voltage of the first and/or or second semiconductor switch, - the component temperature of the first and/or second semiconductor switch, - the reference efficiency of the boost converter circuit arrangement of the first and/or second semiconductor switch, - the reference power loss. Depending on the application, the activation of the semiconductor switches for zero-voltage switching can be further improved by superimposed control of one or more of the above-mentioned parameter variables that are dependent on the operating conditions to control the first semiconductor switch and/or the second semiconductor switch as a function of the current flowing through the inductance. Finally, the invention can also be advantageously implemented in such a way that the control unit is set up to control the first semiconductor switch and/or the second semiconductor switch depending on the current flowing through a measuring resistor, the measuring resistor being arranged in series with the first semiconductor switch S in the path is.

In addition, the object underlying the invention is achieved by a power supply for an electrical consumer, the power supply having a boost converter circuit arrangement constructed according to the invention and the boost converter circuit arrangement being used for power factor pre-regulation in the power supply. This provides a power supply with a step-up converter circuit arrangement that ensures low-loss switching of the semiconductor switches of the step-up converter circuit using simple circuitry. The power supply is preferably designed as a switched-mode power supply.

EM-2020-0311 „13 - Finally, the object on which the invention is based is achieved by a LU102123 method for step-up conversion of the input voltage in such a power supply. The control unit controls the first semiconductor switch and/or the second semiconductor switch as a function of a predetermined reference value and adapts the predetermined reference value as a function of at least one parameter variable dependent on the operating conditions to form a new reference value for the control or switching of the first semiconductor switch and/or the second semiconductor switch . The conventional control of the semiconductor switches by means of a definable reference value results in a very real-time effect with regard to zero-voltage switching, while the additional adaptation of this preset reference value (by superimposed control) depending on an operation-dependent parameter variable (e.g. the component temperature the semiconductor switch) results in an effect that, in terms of time, only shows its effect much later with a view to optimizing zero-voltage switching. As a result, the point (point in time or current value through the semiconductor switch) at which the demagnetization phase of the inductance is completed and the magnetization phase of the inductance is to be started is optimized and, depending on predetermined operating conditions (or i.A.v.

operating condition-dependent parameter sizes) with a view to zero-voltage switching optimized control of the semiconductor switches. Analogously to the design and further development of the step-up converter circuit arrangement, the method is also correspondingly further developed in advantageous configurations.

According to an advantageous embodiment of the method, it can be provided that the current reference value is adapted to the operating condition described by the parameter variable as a function of the at least one parameter variable dependent on the operating condition, so that the switch-on time (tons1) of the first semiconductor switch (S1) and/or the switch-on time (tons2 ) of the second semiconductor switch (S2) during the demagnetization phase of the inductance (L1) can be varied.

EM-2020-0311 - 14 - LU102123 As an alternative to adjusting the current reference value, the switching cycle time or the switch-on time of the semiconductor switch during the demagnetization phase of the inductance can also be adjusted to the operating condition described by the parameter size as a function of the at least one parameter variable dependent on the operating condition, so that the switch-on time of the first semiconductor switch and/or the second semiconductor switch can be varied during the demagnetization phase of the inductance (with a view to optimizing zero-voltage switching).

Advantageously, a control variable is carried out to a predetermined fixed reference value of the parameter size, which must not be fallen below or exceeded. In this case, the selected parameter variable is recorded as a control variable and fed to an optimization controller for offsetting with a predetermined reference variable for the parameter variable in the form of a control deviation. The first semiconductor switch and/or the second semiconductor switch is then actuated as a function of the optimization manipulated variable generated.

As an alternative to the reference variable control to a predetermined fixed reference value of the parameter variable, a reference variable control to a variable reference value of the parameter variable can also be carried out as a function of the change in the measured controlled variable representing the parameter variable. The parameter variable is recorded as a controlled variable and the controlled variable of the current switching cycle of the semiconductor switches is fed to an optimization controller as a specified reference variable for offsetting against the controlled variable of the power semiconductor switches from the previous switching cycle in the form of a reference variable value for the parameter variable, in the form of a control deviation. The first semiconductor switch and/or the second semiconductor switch is then actuated as a function of the optimization manipulated variable generated.

EM-2020-0311 | -15- In a third option for superimposed control or regulation, an optimized model reference variable can also be determined from a reference variable table as a function of the measured control variable and then, as a function of the determined optimized model reference variable, the first semiconductor switch and/or can be activated. or the second semiconductor switch to take place. In this case, a plurality of experimentally or arithmetically determined operating-point-dependent model reference variables are then stored in the reference variable table.

With regard to the operational parameter variables to be used and the stored model control variables, reference is made at this point to the relevant statements on the circuit arrangement.

In a further development of the method, the first semiconductor switch and/or the second semiconductor switch are/are controlled as a function of the current flowing through the inductor.

In a particularly preferred development of the method, a reference current is measured at a measuring resistor connected in series with the first semiconductor switch, and the first semiconductor switch and/or the second semiconductor switch are/are controlled as a function of the reference current.

In summary, the primary goal is to change the point at which the inductor demagnetization phase is completed and the inductor magnetization phase is started. In order to adapt this point, the invention proposes a total of three basic control structures for optimization in further developments. In a first method (see in particular Patent Claim 4 in conjunction with Figure 11), superimposed control to a fixed reference value, which, for example, must not be exceeded or fallen below, is proposed. According to a further superimposed control or control structure, it is proposed to regulate to a minimum or maximum target value. In this case, the information on the change in the measured variable is used as a basis for the regulation (see in particular patent claim 5 in conjunction with FIG. 12). Finally, according to a third possibility, a type of superimposed control is proposed

EM-2020-0311 | - 16 - to be provided, with the semiconductor switches being controlled accordingly on the basis of system variables from which a specific LU102123 control value results (see in particular patent claim 6 in conjunction with FIG. 13). All three control structures for optimizing zero-voltage switching (ZVS optimization) are embedded in an existing conventional main control structure (main control) as shown in the figures. A controlled variable results from the fixed controlled variable of the main control and the optimized controlled variable of the superimposed control structure.

The invention and the technical environment are explained in more detail below with reference to the figures. It should be pointed out that the invention should not be limited by the exemplary embodiments shown. In particular, unless explicitly stated otherwise, it is also possible to extract partial aspects of the facts explained in the figures and to combine them with other components and findings from the present description and/or figures. In particular, it should be pointed out that the figures and in particular the proportions shown are only schematic. The same reference symbols designate the same objects, so that explanations from other figures can be used as a supplement if necessary.

1 shows a basic circuit diagram of a switched-mode power supply; 2 shows a basic circuit diagram of a half-bridge PFC circuit with a semiconductor switch; 3 shows the course of the current through the inductance of the half-bridge PFC circuit according to FIG. 4 shows a basic circuit diagram of a half-bridge PFC circuit with two semiconductor switches;

| |

EM-2020-0311

-17-

Fig. 5 shows the current flow through the inductance of the half-bridge PFC LU102123 circuit acc.

4 and the shape of the voltage profile of the output capacitance of the semiconductor switch;

6 shows a basic circuit diagram of a half-bridge PFC circuit with two semiconductor switches and pole changer circuit for operation on an AC voltage source;

7 shows a basic circuit diagram of a half-bridge PFC circuit with two

Semiconductor switches, the pole changer circuit being implemented with diodes, for operation on an AC voltage source;

8 shows the course of the current through the inductance or the measuring resistor of the half-bridge PFC circuit according to FIG.

Fig. 7 with a positive half-wave

Input voltage and control of the semiconductor switches according to the method described in DE 10 2020 120 530.9,

9 shows the course of the current through the inductance or the measuring resistor R1 of the half-bridge PFC circuit according to FIG.

7 with a positive half-wave of the input voltage and activation of the semiconductor switches according to the method described in DE 10 2020 117 180.3,

10 shows a block diagram of a control unit of the step-up converter circuit arrangement according to the invention,

11 shows a basic circuit diagram of a controller structure implemented within the control unit in a first possible embodiment,

12 shows a basic circuit diagram of one implemented within the control unit

Controller structure in a second possible embodiment, and

EM-2020-0311 | -18 - FIG. 13 shows a basic circuit diagram of a LU102123 control/regulator structure implemented within the control unit in a third possible embodiment. The present description illustrates the principles of the inventive disclosure. It is thus understood that those skilled in the art will be able to conceive various implementations which, while not explicitly described herein, embody principles of the inventive disclosure and are intended to be protected within their scope.

The idea according to the invention is discussed using the example of a positive input voltage or a positive half-wave of an input AC voltage. If a negative input voltage or the negative half-cycle of the AC input voltage is applied, the functionality of the semiconductor switches of the step-up converter circuit is reversed accordingly.

As described, there is the approach of operating a PFC circuit in Boundary Conduction Mode (BCM). The time ton for repeated magnetization of the inductance L; L1, kept constant over a sine half wave of the mains AC voltage. This time is proportional to the power output of the switching power supply and is specified by a voltage regulator, which is intended to keep the output voltage of the circuit, e.g. 400 V DC, constant.

In addition, the time for demagnetizing tor the inductance L; L1 can be set. In the publication mentioned, this is done by generating a Zero Current Detection (ZCD) signal that is caused by the recharging process of a diode. However, this cannot be produced in a step-up converter or step-up converter circuit in which the function of the diode is implemented by a semiconductor switch, since this semiconductor switch does not block by itself.

As already described at the outset, various control methods for controlling the semiconductor switches of a step-up converter circuit 120 are already known.

| EM-2020-0311 -19- LU102123 The aim of this invention is to change the point at which the demagnetization phase of the inductance L1 is completed and the magnetization phase of the inductance L1 is started, and this point with regard to a so-called zero-voltage switching to optimize. Around this point, which is either reached in the form of a reference current le: by one of the semiconductor switches S1, S2 or in the form of a time value (e.g. a correction value for shortening or lengthening the period time tperiod_correct for the next switching cycle) which indicates the current zero crossing during the zero Voltage-Switching (ZVS) characterizes adapt, various options are described below.

The mode of operation of the step-up converter circuit arrangements 100 illustrated in FIGS. 6 and 7 is briefly described first.

Figure 6 and Figure 7 each show a basic circuit diagram of the step-up converter circuit arrangement 100 according to the invention. The step-up converter circuit arrangement 100 shown in Figure 6 and in Figure 7 for the power supply of an electrical load each includes a rectifier or pole changer circuit 110, a two-switch step-up converter circuit 120 and a control unit 130 for driving the two semiconductor switches S1, S2 of the two-switch boost converter circuit 3.

In the embodiment according to FIG. 6, pole reversing circuit 110 is formed by two series-connected controllable semiconductor switches S3, S4, while in the embodiment according to FIG.

Rectifier circuit 110 is formed by two series-connected diodes D1, D2.

In both cases or versions, the two semiconductor elements D1, D2; S3, S4 are arranged in series and the first semiconductor switch S1 and the second semiconductor switch S2 of the two-switch step-up converter circuit 3 are arranged in another path P1 in series, with the two paths P1, P2 being connected in parallel at one free end in a first node K1 and at its other free end are brought together in a second node K2 and at the same time the connection contacts for the output voltage Vout of

| EM-2020-0311 - 20 - form step-up converter circuit arrangement 100.

The filter capacitor C1 is connected between the LU102123 connection contacts for the output voltage Vout.

The inductance L1 is connected between a first supply terminal Q1 for connection to an AC voltage source ACin and the connection node K3 of the two series-connected semiconductor switches S1, S2.

A second supply connection Q2 for connection to the voltage source ACin is connected between the first semiconductor element D1, S3 and the second semiconductor element D2, S4 in a connection node K4.

The first semiconductor switch S1 is connected in series with a measuring resistor R1.

As described in detail in document DE 10 2020 120 530.9, which is already included in the scope of disclosure of this application, and illustrated in FIG 130 be set up, a reference time period Tmess_ref, within which the current flowing through the measuring resistor R1 |, in absolute terms a predetermined current | reference value lret should have reached within a switching period Tperiod (also referred to as switching cycle), to be determined by calculation and to be compared with the actual period of time Tmeas, within which the current i flowing through the measuring resistor R1 has reached the predetermined current reference value ler, and depending on the comparison result between the calculated reference period Tmess ref and the actual period Tmess is to determine a time difference Tair, depending on which the duration of the subsequent switching period Tperiod can be adjusted by a determined time correction value Tperiod-correct.

In the exemplary embodiment shown, a sinusoidal input voltage Vin (mains voltage) with an effective value of 230 V and a mains frequency of 50 Hz is present at the connection terminals Q1, Q2 of the AC voltage source ACin.

The choke coil L1 is connected to the upper connection terminal Q1.

In the example, it has an inductance of 64 pH.

This line goes to node K3, which is connected on the one hand to the drain output of the first semiconductor switch S1.

On the other hand, the node K3 is connected to the source input of the second semiconductor switch S2.

Both semiconductor switches S1 and S2 are as

EM-2020-0311 | -21- n-channel MOSFET type field effect transistors.

Instead, LU102123 other semiconductor switches such as bipolar transistors, thyristors or IGBTs could be used.

They serve to rectify and chop the input signal.

To do this, they are switched at a relatively high frequency, e.g. 100 kHz.

The drive signal CTRL1 is applied to the gate of the first semiconductor switch (field effect transistor) S1.

The drive signal CTRL2 is applied to the gate of the second semiconductor switch (field effect transistor) S2.

The exact timing of these control signals CTRL1, CTRL2 is calculated in a control unit 130 designed as a digital circuit, which is explained in more detail below with reference to FIG. 9 and FIG.

At the output of the two-switch | Boost converter circuit 120 is connected to a filter capacitor C1 which | is charged during the switching phase of the semiconductor switch S2 and [a subsequent DC converter of the switched-mode power supply has a high | Voltage of e.g. 400 V direct voltage is available.

The | For example, filter capacitor C1 has a capacitance of 600 uF.

The current, which flows in the opposite direction to discharging the output capacitance of semiconductor switch S1 when semiconductor switch S2 is open, flows through measuring resistor R1, which is provided in the lower switching branch of the series connection of the two semiconductor switches S1 and S2 in path P2.

For example, the measuring resistor R1 has a resistance value of 20 mΩ.

With this current flow, the transistor capacitance Coss is discharged, which is necessary for lossless switching.

In order to achieve this, the current flow through the measuring resistor R1 must first be measured.

Therefore, the voltage drop across the measuring resistor R1 is recorded.

For this purpose, the voltage present across the measuring resistor R1 at the node K5, between the source connection of the first semiconductor switch S1 and the series-connected measuring resistor R1, is routed to an input of the control unit 130, via which the voltage is measured and further processed.

An A/D input of the control unit 130 can be used for this purpose.

Two further semiconductor switches S3 and S4 are provided in a second branch.

It is also an n-channel MOSFET, for example. The node K4, to which both semiconductor switches S3, S4 are connected, is connected to the return line to the E-Werk.

Both semiconductor switches S3 and S4 are used to reverse the polarity of the circuit.

For the positive half-wave of the input voltage, S4 is blocked and S3 is switched on.

For the negative half-wave of

EM-2020-0311 | -22- input voltage, S3 is blocked and S4 is switched on. The switching signals LU102123 CTRL3 and CTRL4 are therefore switched with the 50 Hz mains frequency.

FIG. 7 shows another variant of this circuit, in which the two semiconductor switches S3 and S4 are replaced by diodes D1, D2. These have the advantage that they do not require dedicated switching signals. The diodes D1, D2 are self-locking and show the desired polarity reversal behavior even without control signals. The other components in Fig. 7 that have the same reference numerals as in Fig. 6 denote the same components. In contrast to the embodiment in FIG. 6, however, higher switching losses occur here. In principle, with this topology shown in FIG. 7, it is also possible to feed back into the supply network.

FIG. 6 shows the current flows for magnetizing and demagnetizing the coil L1 in the case of a negative half-cycle of the input voltage. The Mag_auf arrow curve shown in broken lines represents the current flow for magnetizing the inductance L1 and the Mag-down arrow curve shown in broken lines represents the current flow for demagnetizing the inductance L1. The current flow direction of the magnetization is from ACin/Q2 via S4, S2, L1 to ACin/ Q1 The current flow direction of the demagnetization is from ACin/Q2 via S4, C1, S1, L1 to ACin/Q1. The current curves shown for the negative input voltage half-wave naturally also apply analogously to the embodiment according to FIG.

Analogous to this, the current flows for magnetizing and demagnetizing the inductance L1 with a positive input voltage or with a positive half-wave of the input voltage are shown in FIG. 7 as an example. Here, too, the Mag_auf arrow curve shown as a dashed line represents the current flow for magnetizing the inductance L1 and the Mag_ab arrow curve shown as a dotted line represents the current flow for demagnetizing the inductance L1. The current flow direction of the magnetization is from ACin/Q1 via L1, S1, D2 to ACin/Q2 . The current flow direction of the demagnetization is starting from ACin/Q1 via L1, S2,

EM-2020-0311 | -23- C1, D2, to ACin/Q2. The current curves shown for the positive input voltage half-wave LU102123 naturally also apply analogously to the embodiment according to FIG. 6. With the circuit according to FIG (PFC) Controller for 100W Lightning System; AN-9731, 02011 Fairchild Semiconductor Corporation Rev. 1.0.0, 3/24/11. With this circuit design, a PFC circuit is operated in the so-called "Boundary Conduction Mode" (BCM). The time Ton, which is used to chop the input voltage at approx. 100 kHz, is kept constant over a sine half wave of the mains voltage. This time corresponds to the time for each magnetizing of the inductance L1 per switching period. As described, the PFC circuit with the voltage regulator 132 includes a current control loop which has the task of keeping the instantaneous value of the input current I(t) (inductor current) proportional to the instantaneous value of the input voltage Vin(t). In this way, the power factor can then be kept close to one. This time is proportional to the power and is specified by a voltage regulator, which is intended to keep the output voltage of the circuit constant at 400 V, for example. In order to set the time for demagnetization of the inductor L1, a Zero Current Detection (ZCD) signal is used in the cited publication, which is caused by the charge reversal process of the diode. However, this cannot be produced in a step-up converter circuit in which the function of the diode D is implemented with a low-loss semiconductor switch S2, since this semiconductor switch does not turn off by itself when a gate voltage is present.

The point in time at which the second semiconductor switch S2 should switch off is therefore calculated in advance. With this method, the current value Ib from the shunt R1 is fed to a comparator 131b. The comparator 131b is given a reference current value Irer as a threshold value, to which an associated

EM-2020-0311 - 24 - Time value Tmess_ret calculated. The calculated time value Tmess_ret corresponds to the time LU102123 required for the current edge to reach the threshold/reference current value Iret of the comparator 131b after it has started to rise. The time value Tmess_ret is calculated as follows.

Les =L—L Tmess_ref Vin lret is the amount of current that one wants to achieve with the lower peak value of the inductor current in order to ensure ZVD switching. Vin is the actual value of the input voltage and L is the value of the inductance of the choke. If the desired lower peak value Irer is not reached due to errors, tolerances, etc., then the threshold value at comparator 131b is also reached at a different point in time Tmess act than was calculated in Tmess_rer. If you now measure the time from the switch-on point of the current edge until the threshold value is reached at the comparator, you get the time Tmeas_actual. If you form the difference between the time that you have pre-calculated Tmess_rer and the time that you then measured Tmess_act, you get the time Taq. Taif f= Thess ref - Tess. With this time difference, a time correction value Tperiod_correct can be determined for the time toff and thus for the entire period Tperioge of the switching cycle, with which the desired current would be achieved in the next switching cycle. This time correction value Tperiod_correct is to be calculated as follows. Vin Tperiod_correct = Vout - Vin aiff Figure 9 shows the current regulation process by the control unit 130, with a positive input voltage Vin, as already described in the post-published document DE

EM-2020-0311 | -25- 10 2020 117 180.3 is described in detail.

The current measured via LU102123 the measuring resistor R1 is plotted along the ordinate.

The time t is plotted along the abscissa.

The course of the current measured via the measuring resistor R1 is denoted by |,.

The time Ton for magnetizing the choke coil L1 is kept constant during the positive half cycle of the AC input voltage.

During this time, semiconductor switch S1 is closed and semiconductor switch S2 is open.

The remaining time of the control cycle Tperiod is variable and is used to demagnetize the inductor coil L1 and to discharge the | Transistor capacitance Cosss1 of semiconductor switch S1 with the precalculated | value and for correcting the deviations.

During the remainder of | Tperiod the semiconductor switch S1 is open and the semiconductor switch S2 | closed.

A settling time is shown in FIG. 9 during the second illustrated control cycle and is denoted by Tofset.

This corresponds to a correction value, | by which the time T period | is corrected.

It can also be seen in FIG. 9 that the period T period IM of the second illustrated control cycle is correspondingly shortened.

Because the previous control process has shown that the pre-calculated time Tperiod is too long because the measured current le does not correspond to the defined reference value lf but deviates by the value lerr(t-1) and only reaches the reference value If by shortening the period can be.

In the third control cycle, the desired reference value Irer is actually reached.

The times when the current values were recorded are marked with a "+" symbol.

These points in time correspond to the precalculated and corrected values for T period- FIG. 10 shows a block diagram of a control unit 130 designed as an integrated circuit with which this type of regulation and the associated this type of control of the semiconductor switches S1, S2 of the step-up converter circuit arrangement 100 is implemented will.

The integrated circuit can be implemented in the form of a DSP (digital signal processor), FPGA (field programmable gate array), or ASIC (application specific integrated circuit) or using a standard microcontroller and appropriate software.

The | Regulator architecture in the event that the positive input voltage (half-wave) | applied. |

EM-2020-0311 -26 -

The control signals CTRL1 and CTRL2 for the LU102123 semiconductor switches S1 and S2 of the step-up converter circuit 120 are generated with the controller.

The block diagram contains the following components: Reference numerals 131a and 131b designate two subtraction stages.

In stage 131a, the

Output voltage Vou subtracted from the reference voltage Vout ref.

The output voltage Vout should be kept as constant as possible at the value of 400 V.

The deviation from the desired value is thus determined in the subtraction stage 131a.

Depending on the load on the switched-mode power supply, the intermediate circuit voltage can vary from 400 V and must be readjusted.

In the subtraction stage 131b, the currently measured current I, through the measuring resistor R1, is subtracted from the specified reference value Ir.

As described, the current is always measured at the precalculated and corrected points in time.

No further current measurement values need to be recorded.

Thus, in this subtraction stage 131b, the respective deviation ler from that

Setpoint lr determined.

This is the essential information for the subsequent control stage 133, in which the correction Tortset is calculated for the precalculated period duration Tperiod of the control cycle.

A PI controller or PID controller, for example, can be used for this.

Depending on the requirement as to how quickly the difference should be corrected, a different controller can also be used.

The control stage 133 outputs the correction value Tofset to the downstream master timer unit 136 .

It corresponds to a programmable timer unit that outputs an event after the set times have elapsed.

The event could also be output in the form of a generated signal.

In digital technology, the event can also be

Form of a software event are output, through which a specific program routine is called up similarly to an interrupt generated by software.

The timers are set in the master timer unit 136, with which the pulse duty factor for the control signals CTRL1 and CTRL2 is calculated.

The actual signal generation takes place in the PWM

Signal generation unit 139. In order to be able to generate both the control signals CTRL1 and CTRL2 with the desired pulse duty factor, information about the precalculated magnetization time Ton is required.

This information is provided by the control stage 132.

This time is kept constant for the positive half-wave.

It is therefore a control stage that controls the control value

EM-2020-0311 - 27 - readjusts relatively slowly. It has been shown that even a 10 Hz Pl-LU102123 controller is sufficient for this. The magnetization time Ton can be calculated using the formula ton = Pin * 2x L Vin, which was already explained at the beginning. This formula always applies when the current flow through the choke coil L1 is operated at the gap limit. This control stage 132 works with the input information about the difference between the desired intermediate circuit voltage of e.g. 400 V and the actually measured intermediate circuit voltage from the subtraction stage 131a. The regulated magnetization time Ton is made available to a second timer unit 135, which outputs corresponding events to the PWM signal generation unit 139. On the other hand, the magnetization time Ton is given to a calculation unit 134, which uses the formula Tp = = 7 * Ton + Ton calculates the time for the total length of magnetization time and demagnetization time. The first part of the formula corresponds to the formula for calculating the demagnetization time tor, which was mentioned at the beginning.

The status of the input voltage is detected with the status machine 137 .

This is sampled with a time grid of 25 kHz. The state machine 137 determines whether the positive half cycle or the negative half cycle of the input voltage is present. The state determined is forwarded to a configuration unit 138, which makes corresponding register settings for the various blocks of the integrated circuit 130 depending on the state. At least the PWM signal generation unit 139 has to be reconfigured, since the functions of the semiconductor switches S1 and S2 are reversed when the input voltage is negative.

In FIGS. 11-13, three basic control structures for optimizing the control of the semiconductor switches S1, S2 of the step-up converter circuit 120 are shown. With the aid of the regulator structures shown, the point at which the demagnetization of the inductance is completed and the demagnetization of the inductance L1 is initiated should be set as optimally as possible. Included

EM-2020-0311 -28- the semiconductor switches S1, S2 are controlled and switched promptly within a sine wave by means of a main control structure or a LU102123 main control (main control), for example according to one of the methods described above. According to the invention, a superimposed regulation is now proposed, by means of which a “longer-term” optimization of the switching points for zero-voltage switching is to be ensured. One or more selected operation-dependent parameter variables are measured and operated depending on their development, the superimposed control to optimize the zero-voltage switching. For this purpose, control unit 130 is set up to switch the first semiconductor switch S1 and/or the second semiconductor switch S2 as a function of a predetermined reference value Umain and to switch the predetermined reference value Umain as a function of at least one parameter variable Pb dependent on the operating conditions to a new reference value U for switching the first semiconductor switch To adapt S1 and / or the second semiconductor switch S2.

In FIG. 11, a controller structure is provided for the optimization of the zero-voltage switching, with a fixed reference value as a reference variable. The control device (130) is set up in such a way that a control of the command variable is carried out to a predetermined fixed reference value of the parameter size Pb, which must not be fallen below or exceeded. The parameter value Pb is recorded as a controlled variable y(t) and supplied to an optimization controller Ropt for offsetting with the specified reference variable wop(t) for the parameter value Pb in the form of a control deviation e(t). The first semiconductor switch S1 and/or the second semiconductor switch S2 is then actuated as a function of the generated optimization manipulated variable (Ucp:(t).

In FIG. 12, a controller structure | provided with a minimum or maximum target value. Accordingly, the information on the change in the measured variable Re (or the measured manipulated variable y(t)) is used here as a basis. The control device 130 is set up in such a way that a control variable is based on a variable

| EM-2020-0311 -29- reference value of the parameter size Pb as a function of the change in the measured control variable y(t) mapping the LU102123 parameter size Pb, whereby the controlled variable Re y(t) is detected and the controlled variable Re y(t) of the current switching cycle Tperiod of the semiconductor switches S1, S2 as a specified command variable Wopt(t) for offsetting with the controlled variable Re y(t) from the previous switching cycle Tperiod(t-1) in the form of a command variable value for the parameter variable Pb in the form of a control deviation e(t) an optimization controller Ropt is supplied, and the first semiconductor switch S1 and/or the second semiconductor switch S2 is driven as a function of the generated optimization manipulated variable Uopr(t). In FIG. 13, a “controller structure” is provided for the optimization of the zero-voltage switching, in which the command variable is selected from a command variable table FGT as a function of the measured controlled variable y(t). The control device 130 is set up in such a way that, depending on the measured control variable y(t) representing the parameter variable, from a reference variable table FGT, in which a plurality of experimentally or arithmetically determined operating-point-dependent model reference variables (w′(t)) are stored, to determine an optimized model reference variable Be w'(t) depending on the measured control variable Be ym1(t) ... ymx(t), and depending on the determined optimized model reference variable Be w'(t) driving the first semiconductor switch S1 and / or to allow the second semiconductor switch S2. The basic idea of optimizing zero-voltage switching using a superimposed control structure according to FIGS. 11-13 is based on changing the control values using the superimposed controls. For example, the following operational parameters can be used for this:

1. Regulation to drain-source voltage Vos With method 1 (according to FIG. 11) the following applies: y(t)=Vos(t); Wopt = Vbs_ref

EM-2020-0311 - 30 -

2. Regulation to the change in the drain-source voltage Vos LU102123 With method 2 (according to FIG. 12) the following applies: y(t)=Vos(t);

3. Regulation to reference component temperature θret ret With method 1 (according to FIG. 11), the following applies: y(t)=SFET rer(t); Wopt = DFET ref

4. Tracking control to minimum component temperature Ser With method 2 considering Figure 12, y(t) = Sret(t) applies

5. Tracking control to maximum efficiency Nmax With method 2 considering Figure 12, y(t) =n (t) applies

6. Regulation to reference efficiency Nnref With method 1 considering FIG. 11, y(t)=n(t) applies; wopt = nref

7. Regulation to reference power loss Pv With method 1 considering FIG. 11, y(t)=Pv(t) applies; Wopt= Pv_ref.

8. Tracking control for minimum power loss Pv With method 2 considering Figure 12, y(t) = Pv(t) applies

9. Control of the switching threshold as a function of the operating point The system variables were previously determined experimentally, at which switching is as low-loss as possible. The knowledge is stored in a look-up table, which then outputs the correct controlled variable based on the measured variables. With Method 3 considering Figure 13, Yma(t) = Vin(t);

EM-2020-0311 | -31- Yumz(t) = Vout(t); LU102123 Yma(t) = lin(t); Yma(t) = lout(t); Yms(t) = Srer(t) Yme(t) = Dambient(t) Ymz(t) = Vos(t) All of the parameter values given above can be used, but also only one or additional values not listed here, the available to the system through measurements.

The adjustment based on these optimization methods can be used in various control methods for boost converter circuits.

So not only in the examples given here / from the non-prepublished applications. | The invention is not limited to the embodiments shown in the figures.

The foregoing description is therefore not to be considered as limiting but as illustrative.

The following patent claims are to be understood in such a way that a mentioned feature is present in at least one embodiment of the invention.

This does not exclude the presence of other features.

If the patent claims and the above description define 'first' and 'second' feature, this designation serves to distinguish between two similar features without establishing a ranking.

EM-2020-0311 | -32- List of reference symbols LU102123 10 active PFC circuit 20 DC converter 30 power transmission stage 40 smoothing stage 50 control stage 60 electrical isolation 70 controller 100 boost converter circuit arrangement 110 rectifier or pole reversing circuit 120 two-switch boost converter circuit P1 path 1 P2 path 2 130 control unit 131a subtraction stage 131b regulation stage/voltage regulator stage 132 comparator 133 timer 134 calculation unit 135 further timer unit 136 timer unit 137 AC input voltage detection unit 138 configuration unit 139 PWM signal generation unit C1 filter capacitor CTRL1 control signal (semiconductor switch 1) CTRL2 control signal (semiconductor switch 1) CTRL3 control signal (semiconductor element 3 designed as a semiconductor switch) CTRLA4 control signal (semiconductor element 4 designed as a semiconductor switch )

EM-2020-0311 | -33- D Diode LU102123 D1, D2 Rectifier diode Coss Transistor capacitance lb Measured current ler Deviation from target current IL Coil current Iret Current reference value L1 Choke coil S1, S2, S3, S4 Semiconductor switch SNG Switching power supply fon, Ton Magnetization time tof, Tor demagnetization time Tper_correct Correction value Tperiod Switching cycle time/ Period duration ACin Input voltage source/AC voltage DCin Input voltage source/DC voltage Vin Input voltage Vout Output voltage Vout _ref Reference value of the output voltage

Claims (13)

EM-2020-0311 "34 - Claims LU102123 1. Boost converter circuit arrangement (100) for the power supply of an electrical consumer, comprising - a two-switch boost converter circuit (120) with a first semiconductor switch (S1) with a first output capacitance (Coss_s1), with a second semiconductor switch (S2) with a second output capacitance (Coss _s2), with an inductor (L1) and with a filter capacitor (C1), the two-switch step-up converter circuit (120) being set up to discharge the output capacitance (Coss s1) of the first semiconductor switch (S1) and/or to discharge the output capacitance (Coss_s2) of the second semiconductor switch (S2), and - a control unit (130) for controlling the two semiconductor switches (S1, $2), the first semiconductor switch (S1) and the second semiconductor switch (S2) being in a common path (P1 ) are connected in series and being parallel to the first path (P1) in a first node (K1) and in a second K node (K2) the connection contacts for the output voltage (Vout) of the step-up converter circuit arrangement (100) are formed, and the filter capacitor (C1) is connected between the connection contacts, and the inductance (L1) between a first supply connection (Q1) for connection is connected to a voltage source (ACin) and the connection node (K3) of the two series-connected semiconductor switches (S1, S2), and a second supply connection (Q2) is connected to the voltage source (ACin) at the node (K4), characterized in that the control unit (130) is set up to switch the first semiconductor switch (S1) and/or the second semiconductor switch (S2) as a function of a predetermined reference value (Umain) and to switch the predetermined reference value (Umain) as a function of at least one operating condition-dependent Parameter size (Pb) to a new EM-2020-0311 -35- reference value (U) for the switching of the first semiconductor switch (S1) and/or LU102123 of the second semiconductor switch (S2). 2. Boost converter circuit arrangement (100) according to claim 1, characterized in that the control unit (130) is set up to adapt the current reference value (Iref) to the operating condition described by the parameter value Re (Pb) as a function of the at least one parameter value Be (Pb) dependent on the operating condition , so that the switch-on time (tons1) of the first semiconductor switch (S1) and/or the switch-on time (tons2) of the second semiconductor switch (S2) can be varied during the demagnetization phase of the inductor (L1). 3. Boost converter circuit arrangement (100) according to claim 1, characterized in that the control unit (130) is set up, depending on the at least one operating condition-dependent parameter variable (Pb), the switching cycle time (Tperiod) or the switch-on time (tons1, tons2) of the semiconductor switch ( S1, S2) during the phase of demagnetization of the inductance (L1) to the operating condition described by the parameter size (Pb) to adapt, so that the switch-on time (tons1) of the first semiconductor switch (S1) and/or the switch-on time (tons2) of the second semiconductor switch (S2) can be varied during the demagnetization phase of the inductance (L1). 4. Boost converter circuit arrangement (100) according to one of the preceding claims, characterized in that the control device (130) is set up to carry out a command variable control to a predetermined fixed reference value of the parameter variable (Pb), which must not be fallen below or not exceeded, wherein the parameter variable (Pb) is recorded as a controlled variable (y(t)) and fed to an optimization controller (Ropt) in the form of a control deviation (e(t)) for offsetting with a specified command variable (wopt(t)) for the parameter variable (Pb). , and as a function of the optimization manipulated variable generated (uopt(t)) EM-2020-0311 - 36 - activation of the first semiconductor switch (S1) and/or the second LU102123 semiconductor switch (S2). 5. Boost converter circuit arrangement (100) according to any one of the preceding claims 1-3, characterized in that the control device (130) is set up a guide variable control to a variable reference value of the parameter variable (Pb) depending on the change in the parameter variable (Pb) imaging measured controlled variable (y(t)), the parameter variable (Pb) being recorded as the controlled variable (y(t) and the controlled variable (y(t) of the current switching cycle (Tperiod) of the semiconductor switches (S1, S2) being the specified reference variable). (wop(t)) for offsetting with the control variable Re (y(t) from the previous switching cycle (treriode(t-1)) in the form of a reference variable value for the parameter variable (Pb) in the form of a control deviation (e(t)) an optimization controller (Ropt) is supplied, and the first semiconductor switch (S1) and/or the second semiconductor switch (S2) is driven as a function of the optimization manipulated variable (uopt(t)) generated. 6. Boost converter circuit arrangement (100) according to one of the preceding claims 1-3, characterized in that the control device (130) is set up as a function of the measured control variable (y(t)) from a reference variable table ( FGT) in which a plurality of experimentally or arithmetically determined operating point-dependent model reference variables (w'(t)) are stored, an optimized model reference variable Re (w'(t)) depending on the measured control variable RBe (ym1(t) ... to determine ymx(t)) and to enable control of the first semiconductor switch (S1) and/or the second semiconductor switch (S2) as a function of the determined optimized model reference variable Re (w'(t)). 7. step-up converter circuit arrangement (100) according to any one of the preceding claims, EM-2020-0311 "37 - characterized in that LU102123 the at least one operating condition-dependent parameter quantity (Pb) is represented by a single one or a combination of several of the following operating parameters: - the drain-source voltage (Vos) of the first and/or second semiconductor switch (S1, S2), - the component temperature (Scase) of the first and/or second semiconductor switch (S1, S2), - the reference efficiency of the boost converter circuit arrangement (100), - the reference power loss of the boost converter circuit arrangement (100 ). 8. Boost converter circuit arrangement (100) according to claim 6, characterized in that the measured reference variable (y (t)) and / or in the reference variable table (FGT) stored model reference variables ((y '(t)) mapped by a individual or a combination of several of the following operating parameters: - input voltage (Vin) of the boost converter circuit arrangement (100), - output voltage (Vout) of the boost converter circuit arrangement (100), - current (Ib) through the current measuring resistor R1 and the semiconductor switch S1, or through the semiconductor switch S2, - current through one of the semiconductor switches S3 and/or S4, - current (lin) through the inductance L1 or through the connection Q2 from the voltage source to the node K4, - current (lout) through the filter capacitor C1, - component temperature of the first and/or second semiconductor switch (S1, S2), drain-source voltage of the first and/or second semiconductor switch (S1, S2). 9. boost converter circuit arrangement (100) according to any one of the preceding claims, characterized in that EM-2020-0311 - 38 - the control unit (130) is set up to control the first semiconductor switch (S1) LU102123 and/or the second semiconductor switch (S2) depending on the current flowing through the inductor (L1). 10. Boost converter circuit arrangement (100) according to any one of the preceding claims 1-8, characterized in that the control unit (130) is set up to switch the first semiconductor switch (S1) and/or the second semiconductor switch (S2) as a function of the through a measuring resistor (R1) to control the current (ib) flowing, the measuring resistor (R1) being arranged in the path (P1) in series with the first semiconductor switch (S1). 11. Power supply of an electrical consumer, characterized in that the power supply has a boost converter circuit arrangement (100) according to any one of the preceding claims, wherein the boost converter circuit arrangement (100) is used for power factor pre-regulation in the power supply. 12.Power supply according to claim 11, characterized in that the power supply is designed as a switching power supply. 13. Method for step-up conversion of the input voltage in a power supply according to claim 11 or 12, characterized in that the control unit (130) switches the first semiconductor switch (S1) and/or the second semiconductor switch (S2) depending on a predetermined reference value (Umain). and adapting the predetermined reference value (Umain) to a new reference value (U) for switching the first semiconductor switch (S1) and/or the second semiconductor switch (S2) as a function of at least one parameter variable (Pb) dependent on operating conditions.