KR950000108B1 - 다층 금속 배선방법 - Google Patents
다층 금속 배선방법 Download PDFInfo
- Publication number
- KR950000108B1 KR950000108B1 KR1019910023300A KR910023300A KR950000108B1 KR 950000108 B1 KR950000108 B1 KR 950000108B1 KR 1019910023300 A KR1019910023300 A KR 1019910023300A KR 910023300 A KR910023300 A KR 910023300A KR 950000108 B1 KR950000108 B1 KR 950000108B1
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- KR
- South Korea
- Prior art keywords
- metal
- silicide
- layer metal
- aluminum
- group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (3)
- 다층 금속배선 방법에 있어서, 하층 금속위에 층간절연막을 입힌 후 비아홀을 형성하고 실리사이드와 알루미늄의 혼합금속으로 된 상층금속을 코스퍼터링(Co-Sputtering) 방식을 실시하여 동시에 데포지션하는 단계(a)와, 소정의 온도를 열처리 하여 상층금속 중 융점이 낮은 알루미늄 원자가 리플로우되면서 비아홀의 깊은 곳으로 흘러들어가고 실리사이드 원자는 그대로 남아서 상층금속의 스텝 커버리지를 양호하게 하는 단계(b)를 포함하는 다층 금속배선 방법.
- 제 1 항에 있어서, 단계(a)의 실리사이드는 리프렉토리 금속(주기율표 상의 4A족, 5A족, 6A족, 7A족 금속)으로 대치하여 사용되는 것을 특징으로 하는 다층 금속배선 방법.
- 제 1 항에 있어서, 단계(b)의 열처리 온도는 약 500℃인 것을 특징으로 하는 다층 금속배선방법.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019910023300A KR950000108B1 (ko) | 1991-12-18 | 1991-12-18 | 다층 금속 배선방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019910023300A KR950000108B1 (ko) | 1991-12-18 | 1991-12-18 | 다층 금속 배선방법 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR950000108B1 true KR950000108B1 (ko) | 1995-01-09 |
Family
ID=19325072
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019910023300A Expired - Fee Related KR950000108B1 (ko) | 1991-12-18 | 1991-12-18 | 다층 금속 배선방법 |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR950000108B1 (ko) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7601632B2 (en) | 2006-09-08 | 2009-10-13 | Hynix Semiconductor Inc. | Method of forming a metal line of a semiconductor device |
-
1991
- 1991-12-18 KR KR1019910023300A patent/KR950000108B1/ko not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7601632B2 (en) | 2006-09-08 | 2009-10-13 | Hynix Semiconductor Inc. | Method of forming a metal line of a semiconductor device |
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