KR950009291B1 - Sililated photo resist removing method - Google Patents
Sililated photo resist removing method Download PDFInfo
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- KR950009291B1 KR950009291B1 KR1019920014811A KR920014811A KR950009291B1 KR 950009291 B1 KR950009291 B1 KR 950009291B1 KR 1019920014811 A KR1019920014811 A KR 1019920014811A KR 920014811 A KR920014811 A KR 920014811A KR 950009291 B1 KR950009291 B1 KR 950009291B1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
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Abstract
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Description
제1도 내지 제6도는 종래의 DESIRE공정을 설명하기 위한 도면.1 to 6 are views for explaining a conventional DESIRE process.
제7도 내지 제12도는 본 발명에 의한 패턴형성방법을 나타낸 도면.7 to 12 are views showing a pattern forming method according to the present invention.
본 발명은 반도체장치 제조를 위한 패턴형성방법에 관한 것으로, 특히 DESIRE(Diffusion Enhanced Silylatig Resist)공정에 의해 패터닝된 레지스트를 제거하는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pattern forming method for manufacturing a semiconductor device, and more particularly, to a method of removing a resist patterned by a DESIRE (Diffusion Enhanced Silylatig Resist) process.
LSI의 고집적화에 따라 고반사, 고단차기판상에서의 하프미크론(Half-micron)이하의 리소그래피(Lithography)가 요구되어지게 되었다. 다층 레지스트공정은 이와 같은 요구에 부응하는 공정이나, 공정수가 많고 이로 인해 양산기에 있어서는 수율, 비용 등의 문제점이 있다. 이러한 문제점을 해결한 것이 1층 레지스트공정인 레지스트시릴화공정으로서, 이 레지스트시릴화공정은 Coopmans과 Roland에 의해 DESIRE공정으로서 먼저 발표되었다. (Proc. of SPIE, Vol. 631, pp. 34, 1986)The high integration of LSI has resulted in the need for half-micron or lower lithography on high reflection and high stepped substrates. The multilayer resist process meets such demands, but has a large number of processes, which causes problems such as yield and cost in mass production. Solving this problem is a resist silylation process, which is a one-layer resist process, which was first published by Coopmans and Roland as the DESIRE process. (Proc. Of SPIE, Vol. 631, pp. 34, 1986)
상기 DESIRE공정을 제1도 내지 제6도를 참조하여 설명하면 다음과 같다.The DESIRE process will be described with reference to FIGS. 1 to 6 as follows.
피가공기판, 예컨대 웨이퍼(1)위에 포토레지스트(Photoresist; 이하 PR이라 한다)(2)를 도포한 후, 마스크(3)를 통해 상기 PR(2)을 자외선(4)에 의해 노광시키면 PR이 노광된 영역(5)에서 산(Acid)이 형성되면서 PAC(Photo Active Compound)가 결합한다(제1도).After applying a photoresist (PR) 2 on a substrate to be processed, for example, a wafer 1, the PR 2 is exposed by ultraviolet light 4 through a mask 3, whereby PR As the acid is formed in the exposed region 5, the PAC (Photo Active Compound) is combined (FIG. 1).
이어서 상기 노광된 PR(2)을 110℃ 이상의 온도에서 베이크(Bake)를 실시하면 상기 PR의 노광된 영역(5)의 산(Acid)이 확산되면서 수지(Resin)의 교차결합(Crosslinking)이 일어나 분자량이 커지게 되는 교차결합(Crosslink)을 한다(제2도).Subsequently, when the exposed PR (2) is baked at a temperature of 110 ° C. or higher, crosslinking of resin occurs as acid diffuses in the exposed region 5 of the PR. Crosslink to increase molecular weight (Figure 2).
이어서 상기 노광된 PR을 100℃의 오븐 안에서 실리콘을 함유하는 시릴화제(Silylated agent)인 HMDS(Hexa Methyl Di Silazne) 또는 TMDS(Tetr Methyl Di Silazne)의 가스분위기(7)에 노출시키면 상기 PR의 노광된 영역(5)은 수지(Resion)의 교차결합에 의해 실리콘확산이 억제되며, 상대적으로 결합력이 약한 비노광부(6)에서는 수지가 상기 HMDS 또는 TMDS의 실리콘원자와 반응하여 새로운 시릴화층(8)을 형성한다(제3도).Subsequently, when the exposed PR is exposed to a gas atmosphere (7) of HMDS (Hexa Methyl Di Silazne) or TMDS (Tetr Methyl Di Silazne), which is a silylated agent containing silicon in an oven at 100 ° C., the PR is exposed. In the non-exposed portion 6 in which the region 5 is cross-linked with the resin, the resin is suppressed by cross-linking of the resin, and the resin reacts with the silicon atoms of the HMDS or TMDS in the non-exposed portion 6 having a relatively weak bonding force. (Fig. 3).
이어서 실제 패턴형성공정인 건식현상(Dry Development)시에 O2 RIE(Reactive Ion Etching)를 실시하면 상기 시릴화층(8)내의 실리콘이 O2와 결합하여 SiOx(9)구조로 되면서 PR식각시 마스크역할을 하는 패턴을 형성하게 된다(제4도).Subsequently, when O2 Reactive Ion Etching (RIE) is performed during dry development, which is an actual pattern forming process, silicon in the silylated layer 8 is combined with O2 to form SiOx (9), which serves as a mask during PR etching. A pattern is formed (FIG. 4).
상기와 같이 패턴을 형성한 후에 PR을 재작업(Rework)하거나 피가공기판을 식각한 후 PR을 제거하는 경우, 현재 일반적으로 사용하고 있는 O2 애싱(Ashing ; 10)을 실시하게 되면(제5도), SiOx가 형성된 시릴화층(9)의 영향으로 레지스트의 측면으로 애싱이 약간 진행되나, O2의 영향으로 SiOx구조가 더 단단해져 특히 넓은 영역에서는 PR의 제거가 불가능하게 된다. 이는 상기 O2 애싱공정이 상기 시릴화공정후에 진행되는 건식현상시의 O2 RIE공정과 같은 매카니즘이기 때문이다.When the PR is removed after reworking the PR or etching the substrate after forming the pattern as described above, O2 ashing (10), which is generally used, is performed (FIG. 5). However, ashing slightly progresses to the side surface of the resist under the influence of the silylated layer 9 on which SiOx is formed, but the SiOx structure becomes harder due to the influence of O2, which makes it impossible to remove PR particularly in a wide area. This is because the O2 ashing process is the same mechanism as the O2 RIE process at the time of dry development after the cylylation process.
또한 상기 SiOx구조(9)를 제거하기 위하여 불소(F)계통의 가스인 CF4, C2F6, CHF4 등을 사용하는 경우 부분적으로는 제거가 가능하나 잔유물이 남으며, 패터닝된 영역에서 원치 않는 식각이 일어나는 문제점이 발생한다(제6도).In addition, when CF4, C2F6, CHF4, etc., which are fluorine (F) -based gases, are used to remove the SiOx structure (9), partial removal is possible, but residues remain, and unwanted etching occurs in the patterned region. This occurs (Figure 6).
따라서 본 발명은 상술한 문제점을 해결하기 위하여 잔유물이 남거나 사용하는 식각가스에 의해 원하지 않는 부분이 손상되는 일이 없이 시릴화된 레지스트의 박리시킬 수 있는 방법을 제공하는 그 것을 목적으로 한다.Accordingly, an object of the present invention is to provide a method capable of exfoliating a silylated resist without remaining undesired or damaged by an etching gas that remains or uses in order to solve the above problems.
상기 목적을 달성하기 위해 본 발명은 피가공기판상에 레지스트를 도포한 후 소정의 마스크패턴을 적용하여 노광시키고 베이크하는 공정, 상기 레지스트의 비노광영역상부에 시릴화층을 형성하는 공정, 상기 레지스트를 건식현상에 의해 패터닝하는 공정, 상기 패터닝 된 레지스트를 마스크로 하여 피가공기판을 식각하는 공정으로 이루어진 패턴형성방법에 있어서, 상기 패터닝된 레지스트를 마스크로 하여 피가공기판을 식각하는 공정 후에 결과물상에 레지스트를 마스크로 하여 피가공기판을 식각하는 공정 후에 결과물상에 레지스트를 도포한 후 소정의 마스크패턴을 적용하여 노광시킨 다음 습식현상에 의해 상기 패터닝 된 레지스트와 반대톤으로 패터닝하는 공정, 상기 시릴화층을 제거하는 공정, 상기 남아 있는 레지스트를 모두 제거하는 공정이 더 포함되는 것을 특징으로 하는 시릴화된 레지스트의 박리방법을 제공한다.In order to achieve the above object, the present invention is a process of applying a resist on a substrate to be processed, followed by exposing and baking by applying a predetermined mask pattern, forming a silylated layer on the non-exposed area of the resist, and drying the resist. A pattern forming method comprising a step of patterning by development and a process of etching a substrate by using the patterned resist as a mask, wherein the resist is formed on the resultant after the process of etching the substrate by using the patterned resist as a mask Using a mask as a mask, and then applying a resist on the resultant, and then applying a predetermined mask pattern to expose the pattern, and then patterning the patterned resist in opposite tone with the patterned resist by wet development. Process of removing, removing all remaining resist Provided is a peeling method of a silylated resist, characterized in that it further comprises a tablet.
이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.
제7도 내지 제12도는 본 발명에 의한 레지스트의 박리방법을 나타낸 것이다.7 to 12 show a method for peeling a resist according to the present invention.
먼저, DESIRE공정이나 실리콘이 함유된 PR을 이용하여 건식현상(Dry Development)이 진행된 PR패턴(제4도 참조)을 재작업하거나 제7도에 도시된 바와 같이 PR패턴을 마스크로 하여 피가공기판(1)을 식각한 후 상기 패터닝에 사용된 PR(2)과 동일한 PR(12)을 도포한다(제8도). 이때, 상기 PR은 반도체제조시의 사진식각공정에서 일반적으로 사용되는 평탄도 및 식각특성이 우수한 노블락(Novolac) 및 PVP(Poly Vinyl Phenol)수지를 베이스로 하는 레지스트를 사용한다. 또한, 도포하는 PR두께는 상기 SiOx화 된 시릴화층(9)을 식각마스크로 사용하는 PR(6)이 전부 덮이는 두께면 된다.First, reprocess the PR pattern (see FIG. 4) in which dry development is performed using the DESIRE process or the PR containing silicon, or as a mask using the PR pattern as a mask as shown in FIG. After etching (1), the same PR 12 as the PR (2) used for the patterning is applied (Fig. 8). In this case, the PR uses a resist based on Novolac and PVP (Poly Vinyl Phenol) resins having excellent flatness and etching characteristics generally used in photolithography during semiconductor manufacturing. The PR thickness to be applied may be a thickness that is entirely covered by the PR 6 using the SiOxized silylated layer 9 as an etching mask.
이어서 상기 PR의 패터닝시 사용되었던 마스크(제1도 참조부호 3)를 사용하여 상기 PR(12)을 자외선(4)에 노광시킨 다음(제9도), 습식현상(Wet Development)을 실시하면 처음 패터닝된 PR과는 반대 톤(Tone)으로 패터닝된다(제10도). 이와 같이 반대 톤으로 패턴이 형성되는 것은 건식현상과는 반대로 습식현상시에는 노광영역에서 수지(Resin)가 가교결합하기 때문이다. 건식현상시에는 노광영역에서 실리콘의 확산이 일어나지 않아 SiOx구조가 형성되지 않으므로 노광영역이 O2에 의해 식각되지만, 습식현상시에는 노광영역이 용액에 녹지 않고 패턴으로 남아 있게 된다.Subsequently, the PR 12 is exposed to the ultraviolet ray 4 (FIG. 9) using a mask used for patterning the PR (see FIG. 1). Then, wet development is first performed. It is patterned in tones opposite to the patterned PR (FIG. 10). The reason why the pattern is formed in the opposite tone is because the resin crosslinks in the exposure region during the wet development, as opposed to the dry phenomenon. In the dry development, since the diffusion of silicon does not occur in the exposure area and thus no SiOx structure is formed, the exposure area is etched by O 2, but in the wet development, the exposure area remains in a pattern without melting in a solution.
이어서 상기 SiOx화 된 시릴화층(9)을 제거하기 위해 불소계가스인 CF4, C2F6, CHF3와 O2, N2 등의 혼합가스를 사용하여 SiOx화된 시릴화층을 제거한다(제11도). 이 경우, 상기 PR(12)이 반대 톤으로 패터닝되어 있기 때문에 패터닝된 PR(6)의 측벽을 보호할 뿐만 아니라, 식각된 부분도 반대 톤으로 패터닝된 PR(12)에 의해 마스킹이 되어 있어 피가공기판(1)에 손상을 가하는 일없이 상기 SiOx화된 시릴화층(9)을 제거하는 것이 가능하다. 제11도에서와 같이 SiOx화된 시릴화층 제거후, PR(6, 12)만 남아 있는 패턴에서는 O2애싱(13)에 의해서 잔존하는 PR층(6, 12)을 제거하게 되면 단차가 있는 피가공기판에서도 잔유물 및 가스에 의한 손상없이 PR을 박리시킬 수 있다.Subsequently, in order to remove the SiOxylated silylated layer 9, a mixed gas such as CF4, C2F6, CHF3 and O2, N2, which are fluorine-based gases, is removed to remove the SiOxylated silylated layer (FIG. 11). In this case, since the PR 12 is patterned in the opposite tone, not only the sidewall of the patterned PR 6 is protected, but the etched portion is also masked by the PR 12 patterned in the opposite tone. It is possible to remove the SiOxized silylation layer 9 without damaging the processing substrate 1. In the pattern in which only PR (6, 12) remains after removing the SiOxized silylation layer as shown in FIG. 11, if the remaining PR layers 6, 12 are removed by O2 ashing 13, the substrate to be processed has a step. Also, the PR can be peeled off without being damaged by residues and gases.
다음에 본 발명의 일실시예를 설명한다.Next, an embodiment of the present invention will be described.
실리콘웨이퍼 또는 산화막으로 된 피가공기판(1) 위에 SAL601-ER7레지스트(2)를 0.8㎛∼1.0㎛ 정도의 두께로 도포한 후, 마스크(3)를 통해 상기 PR(2)을 자외선(4)에 의해 노광시킨 다음(제1도), 상기 노광된 PR(2)을 110℃의 온도에서 60초간 PSB(Pre Silylation Bake)를 실시하고(제2도) 이어서 상기 노광된 PR을 100℃의 온도에서 100초간 TMDS의 가스분위기(7)에 노출시키면 상기 PR(2)의 비노광부(6)상에 3000Å 정도의 시릴화층(8)이 형성된다(제3도). 이어서 O2 RIE(Reactive Ion Etching)를 이용한 건식현상을 실시하면 상기 시릴화층(8)내의 실리콘이 O2와 결합하여 SiOx(9)구조로 되면서 PR식각시 마스크역할을 하여 패턴을 형성하게 된다(제4도). 이어서 상부에 SiOx화 된 시릴화층(9)이 형성된 PR(6)을 마스크로 하여 상기 피가공기판(1)을 식각한다(제7도).After applying the SAL601-ER7 resist 2 to a thickness of about 0.8 μm to 1.0 μm on the substrate 1 to be made of silicon wafer or oxide film, the PR 2 is applied to the ultraviolet ray 4 through the mask 3. After exposure (FIG. 1), the exposed PR (2) was subjected to PSB (Pre Silylation Bake) for 60 seconds at a temperature of 110 ° C (Figure 2), and then the exposed PR was subjected to a temperature of 100 ° C. When exposed to the gas atmosphere 7 of the TMDS for 100 seconds at, a silylated layer 8 of about 3000 Å is formed on the non-exposed part 6 of the PR 2 (FIG. 3). Subsequently, when dry development is performed using O2 RIE (Reactive Ion Etching), the silicon in the silylation layer 8 combines with O2 to form an SiOx (9) structure and forms a pattern by acting as a mask during PR etching (fourth). Degree). Subsequently, the substrate 1 to be etched is etched using the PR 6 having the SiOxized silylated layer 9 formed thereon as a mask (FIG. 7).
상기와 같이 형성된 구조에 상기 PR(2)과 동일한 PR(12), 즉, SAL601-ER7 레지스트 도포한 후(제8도), 상기 PR(2)의 패터닝시에 사용된 마스크(3)를 적용하여 자외선(248㎚)(4)에 노광시키고(제9도) 습식현상을 실시하여 상기 패터닝 된 PR(6)과 반대 톤으로 패터닝한다(제10도).After applying the same PR 12 as the PR (2), that is, the SAL601-ER7 resist (Fig. 8) to the structure formed as described above (Fig. 8), the mask 3 used at the time of patterning the PR (2) is applied. The film is exposed to ultraviolet light (248 nm) 4 (FIG. 9) and wet-developed to pattern the tone opposite to the patterned PR 6 (FIG. 10).
이어서 MERIE방식의 설비인 MRC사의 BMC-600을 사용하여(RIE방식이나 ECR방식이 설비에서도 가능하다) RF파워 1.5㎾, 반응가스 CF4 : 50sccm, O2 : 20sccm, N2 : 70sccm, 시간 60초의 공정조건으로 상기 SiOx화 된 시릴화층(9)을 제거한다(제11도).Subsequently, using MRC's BMC-600, which is a MERIE system (RIE or ECR system is also available), RF power 1.5㎾, reaction gas CF4: 50sccm, O2: 20sccm, N2: 70sccm, time 60 seconds This removes the SiOxized silylated layer 9 (FIG. 11).
이어서 상기의 BMC-600설비를 이용하여 RF파워 1.5㎾, 반응가스 O2 : 70sccm, 시간 180초의 공정조건으로 잔존하는 PR(6, 12)을 제거한다(제12도).Subsequently, the remaining PR (6, 12) was removed using RF power 1.5 kW, reaction gas O2: 70 sccm, time 180 seconds using the above BMC-600 equipment (FIG. 12).
상기 본 발명의 실시예의 결과물을 입자(Particle)측정기인 텐코(Tencor)설비로 측정한 결과, 일반 단층 레지스트 공정시의 레지스터 박리공정과 차이가 없는 완벽한 박리가 이루어졌음이 확인되었다.As a result of measuring the result of the embodiment of the present invention by the Tencor (Tencor facility), which is a particle measuring machine, it was confirmed that perfect peeling was performed without difference from the resist peeling process in the general single layer resist process.
이상 상술한 바와 같이 본 발명에 의하면, DESIRE공정에 의한 패턴제조시에 가장 문제가 되었던 레지스트 식각후의 재작업이 가능하게 되고, 피가공기판에 손상을 가하지 않고 레지스트를 제거할 수 있으며, 특히 단차가 있는 패턴에서의 레지스트 제거가 용이한 잇점이 있다.As described above, according to the present invention, it is possible to rework after resist etching, which has been the most problematic during pattern manufacturing by the DESIRE process, and to remove the resist without damaging the substrate to be processed. The advantage is easy removal of resist in a pattern.
Claims (10)
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| KR1019920014811A KR950009291B1 (en) | 1992-08-18 | 1992-08-18 | Sililated photo resist removing method |
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| KR1019920014811A KR950009291B1 (en) | 1992-08-18 | 1992-08-18 | Sililated photo resist removing method |
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