KR940002903B1 - Main storage memory cards having single bit set and reset functions - Google Patents

Main storage memory cards having single bit set and reset functions

Info

Publication number: KR940002903B1
Authority: KR; South Korea
Prior art keywords: main storage; storage memory; memory cards; single bit; bit set
Prior art date: 1989-12-13
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

KR9020065A

Other languages

English (en)

Other versions

KR910012955A (ko

Inventor

Richard G Eikill

Quentin G Schmierer

Original Assignee

Ibm

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1989-12-13

Filing date

1990-12-07

Publication date

1994-04-07

1990-12-07 Application filed by Ibm filed Critical Ibm

1991-08-08 Publication of KR910012955A publication Critical patent/KR910012955A/ko

1994-04-07 Application granted granted Critical

1994-04-07 Publication of KR940002903B1 publication Critical patent/KR940002903B1/ko

2010-12-07 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Multi Processors (AREA)
Memory System (AREA)
Storage Device Security (AREA)

KR9020065A 1989-12-13 1990-12-07 Main storage memory cards having single bit set and reset functions Expired - Fee Related KR940002903B1 (en)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
US07/450,182 US5167029A (en)	1989-12-13	1989-12-13	Data processing system and associated process using memory cards having data modify functions utilizing a data mask and an internal register
US450,182		1989-12-13

Publications (2)

Publication Number	Publication Date
KR910012955A KR910012955A (ko)	1991-08-08
KR940002903B1 true KR940002903B1 (en)	1994-04-07

Family

ID=23787110

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
KR9020065A Expired - Fee Related KR940002903B1 (en)	1989-12-13	1990-12-07	Main storage memory cards having single bit set and reset functions

Country Status (10)

Country	Link
US (1)	US5167029A (ko)
EP (1)	EP0437160B1 (ko)
JP (1)	JPH03189843A (ko)
KR (1)	KR940002903B1 (ko)
CN (1)	CN1017837B (ko)
AU (1)	AU636680B2 (ko)
BR (1)	BR9006026A (ko)
CA (1)	CA2026741C (ko)
DE (1)	DE69033416T2 (ko)
ES (1)	ES2140376T3 (ko)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
IT1247640B (it) *	1990-04-26	1994-12-28	St Microelectronics Srl	Operazioni booleane tra due qualsiasi bit di due qualsiasi registri
US5434970A (en) *	1991-02-14	1995-07-18	Cray Research, Inc.	System for distributed multiprocessor communication
AU7049694A (en) *	1993-06-14	1995-01-03	Rambus Inc.	Method and apparatus for writing to memory components
AU677673B2 (en) *	1993-10-12	1997-05-01	Samsung Electronics Co., Ltd.	Method and apparatus for executing an atomic read-modify-write instruction
US5499376A (en) *	1993-12-06	1996-03-12	Cpu Technology, Inc.	High speed mask and logical combination operations for parallel processor units
US5692154A (en) *	1993-12-20	1997-11-25	Compaq Computer Corporation	Circuit for masking a dirty status indication provided by a cache dirty memory under certain conditions so that a cache memory controller properly controls a cache tag memory
US6532180B2 (en)	2001-06-20	2003-03-11	Micron Technology, Inc.	Write data masking for higher speed DRAMs
US7016999B1 (en) *	2002-02-05	2006-03-21	Adaptec, Inc.	Hardware circuit and method for automatically configuring on-the-fly a sub-unit in a SCSI message
US6671212B2 (en) *	2002-02-08	2003-12-30	Ati Technologies Inc.	Method and apparatus for data inversion in memory device
US8510569B2 (en) *	2009-12-16	2013-08-13	Intel Corporation	Providing integrity verification and attestation in a hidden execution environment
US8850137B2 (en) *	2010-10-11	2014-09-30	Cisco Technology, Inc.	Memory subsystem for counter-based and other applications
US11537319B2 (en) *	2019-12-11	2022-12-27	Advanced Micro Devices, Inc.	Content addressable memory with sub-field minimum and maximum clamping
CN114579189B (zh) *	2022-05-05	2022-09-09	深圳云豹智能有限公司	单核以及多核访问寄存器数据的方法、处理器和系统

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS559742B2 (ko) *	1974-06-20	1980-03-12
JPS5671154A (en) *	1979-11-15	1981-06-13	Nec Corp	Information processing device
US4363093A (en) *	1980-03-10	1982-12-07	International Business Machines Corporation	Processor intercommunication system
US4412286A (en) *	1980-09-25	1983-10-25	Dowd Brendan O	Tightly coupled multiple instruction multiple data computer system
US4520439A (en) *	1981-01-05	1985-05-28	Sperry Corporation	Variable field partial write data merge
JPS5960658A (ja) *	1982-09-30	1984-04-06	Fujitsu Ltd	論理機能を備えた半導体記憶装置
JPS59188764A (ja) *	1983-04-11	1984-10-26	Hitachi Ltd	メモリ装置
US4569016A (en) *	1983-06-30	1986-02-04	International Business Machines Corporation	Mechanism for implementing one machine cycle executable mask and rotate instructions in a primitive instruction set computing system
DE3467549D1 (en) *	1984-02-06	1987-12-23	Boeing Co	Counterbalanced hinge assembly
JPS60189043A (ja) *	1984-03-07	1985-09-26	Fuji Electric Co Ltd	プロセツサ
US4663728A (en) *	1984-06-20	1987-05-05	Weatherford James R	Read/modify/write circuit for computer memory operation
JPS61104391A (ja) *	1984-10-23	1986-05-22	Fujitsu Ltd	半導体記憶装置
US4712190A (en) *	1985-01-25	1987-12-08	Digital Equipment Corporation	Self-timed random access memory chip

1989
- 1989-12-13 US US07/450,182 patent/US5167029A/en not_active Expired - Fee Related
1990
- 1990-10-02 CA CA002026741A patent/CA2026741C/en not_active Expired - Fee Related
- 1990-10-31 DE DE69033416T patent/DE69033416T2/de not_active Expired - Fee Related
- 1990-10-31 EP EP90480174A patent/EP0437160B1/en not_active Expired - Lifetime
- 1990-10-31 ES ES90480174T patent/ES2140376T3/es not_active Expired - Lifetime
- 1990-11-07 JP JP2299989A patent/JPH03189843A/ja active Pending
- 1990-11-13 AU AU66553/90A patent/AU636680B2/en not_active Ceased
- 1990-11-28 BR BR909006026A patent/BR9006026A/pt not_active Application Discontinuation
- 1990-12-07 KR KR9020065A patent/KR940002903B1/ko not_active Expired - Fee Related
- 1990-12-11 CN CN90109923A patent/CN1017837B/zh not_active Expired

Also Published As

Publication number	Publication date
CN1052562A (zh)	1991-06-26
EP0437160A2 (en)	1991-07-17
AU636680B2 (en)	1993-05-06
KR910012955A (ko)	1991-08-08
EP0437160B1 (en)	2000-01-05
CA2026741C (en)	1994-02-01
BR9006026A (pt)	1991-09-24
ES2140376T3 (es)	2000-03-01
DE69033416D1 (de)	2000-02-10
CN1017837B (zh)	1992-08-12
US5167029A (en)	1992-11-24
JPH03189843A (ja)	1991-08-19
EP0437160A3 (en)	1993-01-13
DE69033416T2 (de)	2000-07-06
CA2026741A1 (en)	1991-06-14
AU6655390A (en)	1991-06-20

Publication	Publication Date	Title
GB2225657B (en)	1992-07-01	Random access memory system
GB2218237B (en)	1991-01-16	Inductively-powered data storage card
GB2205186B (en)	1991-02-13	Memory cards
EP0336330A3 (en)	1990-10-10	Memory card connector
EP0425849A3 (en)	1992-07-29	Data memory access
EP0233649A3 (en)	1989-06-14	Ic-incorporated memory card
ZA893785B (en)	1990-03-28	Data memory system
GB2248707B (en)	1994-11-23	Memory card and data management system in memory card
EP0574094A3 (en)	1994-07-20	Memory devices
EP0421693A3 (en)	1992-03-04	Memory self-test
AU4767090A (en)	1990-07-19	Prevention of alteration of data stored in secure integrated circuit chip memory
AU4234989A (en)	1990-04-05	Memory write protection circuit
KR940002903B1 (en)	1994-04-07	Main storage memory cards having single bit set and reset functions
KR930011349B1 (en)	1993-11-30	Memory card
GB2234873B (en)	1994-07-27	Read-write memory device
EP0169360A3 (en)	1989-02-08	Random access memory
GB8905571D0 (en)	1989-04-19	Information storage and retrieval
EP0420112A3 (en)	1992-08-26	Information processor and disk memory used in the same
EP0463374A3 (en)	1993-03-17	Memory cell circuit and operation thereof
ZA89345B (en)	1989-10-25	Data memory system
EP0185156A3 (en)	1989-02-08	Random access memory
EP0457310A3 (en)	1991-12-11	Memory card
GB9226598D0 (en)	1993-02-17	Memory utilisation and data retrieval
GB9125453D0 (en)	1992-01-29	Memory card
GB8529623D0 (en)	1986-01-08	Addressing data stored in storage device

Legal Events

Date	Code	Title	Description
1990-12-07	A201	Request for examination
1990-12-07	PA0109	Patent application	Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19901207
1990-12-07	PA0201	Request for examination	Patent event code: PA02012R01D Patent event date: 19901207 Comment text: Request for Examination of Application
1993-04-12	E902	Notification of reason for refusal
1993-04-12	PE0902	Notice of grounds for rejection	Comment text: Notification of reason for refusal Patent event date: 19930412 Patent event code: PE09021S01D
1994-03-12	G160	Decision to publish patent application
1994-04-07	PG1605	Publication of application before grant of patent	Comment text: Decision on Publication of Application Patent event code: PG16051S01I Patent event date: 19940312
1994-06-30	E701	Decision to grant or registration of patent right
1994-06-30	PE0701	Decision of registration	Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 19940630
1994-07-22	GRNT	Written decision to grant
1994-07-22	PR0701	Registration of establishment	Comment text: Registration of Establishment Patent event date: 19940722 Patent event code: PR07011E01D
1994-07-22	PR1002	Payment of registration fee	Payment date: 19940722 End annual number: 3 Start annual number: 1
1997-03-27	PR1001	Payment of annual fee	Payment date: 19970324 Start annual number: 4 End annual number: 4
1998-03-31	PR1001	Payment of annual fee	Payment date: 19980326 Start annual number: 5 End annual number: 5
1999-03-23	FPAY	Annual fee payment	Payment date: 19990324 Year of fee payment: 6
1999-03-23	PR1001	Payment of annual fee	Payment date: 19990324 Start annual number: 6 End annual number: 6
2000-04-08	LAPS	Lapse due to unpaid annual fee
2000-04-08	PC1903	Unpaid annual fee