KR940000679B1 - Recording data dynamic range control circuit and method of digital audio apparatus - Google Patents

Abstract

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Description

Dynamic range control circuit and method for recording data of digital audio equipment

1 is a dynamic range adjustment circuit diagram according to the present invention.

2 is an operating waveform diagram of each part of FIG.

* Explanation of symbols for main parts of the drawings

11-14: First-Fourth Parallel Parallel Conversion Unit 15-16: First-First MUX

17-20: 1st-4th control unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data recording apparatus in a digital audio device, and more particularly, to an apparatus and method for adjusting the dynamic range of recording data according to analog signals and digital signals when copying from a recordable audio device.

Generally, recordable digital audio equipment such as CDP (Compact Disk Player) or DAT (Digital Audio Tape recorder) is the original source of digital copy due to the superior characteristics of digital audio. The dynamic range of the source can be realized and recorded.

As a result, software companies that produce record albums have suffered a lot when the recordable digital audio system has appeared in the market because of illegal copying. Therefore, as a result of the agreement between DAT's DAT manufacturer and the software company, it was decided that copy-protected software, which is prohibited from copying, can be copied up to the first generation.

However, at this time, the general user cannot copy when there is no original source, so there is no meaning to use a recordable audio device, and there have been a lot of limitations in spreading digital audio devices.

Accordingly, an object of the present invention is to provide a dynamic range control circuit and method for adjusting the dynamic range of recording data according to an analog audio signal and a digital audio signal during copying in a digital audio device.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a dynamic range control circuit diagram according to the present invention. First to fourth serial-to-parallel conversion for inputting serial digital audio data and converting and outputting each of R-channel parallel digital audio data and L-channel parallel digital audio data using a serial clock. When the digital audio signal is copied by the analog / digital copy selection signal by inputting the 11-11 and the lowest predetermined number of bits (n) parallel data of the L channel output from the second serial-to-parallel converter 12, The first MUX 15 which switches to adjust the dynamic range of the L channel by removing the least predetermined number of bits (n) parallel data, and the least predetermined number of bits of the R channel output from the second serial-to-parallel converter 14. n) When the parallel data is input and the digital audio signal is copied by the analog / digital copy selection signal, the least significant number of bits (n) of the parallel data are removed to remove the D channel of the R channel. L-channel / R-channel separated clock signal (L /) by inputting parallel data of the second MUX (16) switched to adjust the range and the L-channel most significant byte (LSB) output from the first serial-parallel converter (11). A first latch unit 17 latched by R), a predetermined number of upper bits (8-n) parallel data among the least significant bytes of the L channel output from the second serial-to-parallel converter 12, and the first latch unit 17; A second latch unit 18 for inputting a predetermined number of sub-bits (n) parallel data selectively output from the 1MUX 15 and latching the L bit by the L channel / R channel separation clock signal L / R; A third latch unit 19 for inputting parallel data of the R channel most significant byte (LSB) output from the third serial-to-parallel converter 13 and latched out by the L-channel / R channel-separated clock signal L / R. ), And a predetermined number of low-bit (8-n) parallel data of the least significant byte of the R channel output from the fourth serial-to-parallel converter 14, and the second MUX 16. Enter the low-order bit (n) parallel data of a predetermined output can be configured as a fourth latch part (2) for latching output by the L-channel / R-channel clock separation signal (L / R).

2 is a furniture motion waveform diagram of FIG.

Based on the above configuration, an embodiment of the present invention will be described in detail with reference to FIGS.

By inputting a digital audio signal played on a digital audio device such as a CDP or DAT and copying the original source (ie the record), a dynamic range of more than 96dB is achieved. However, removing the lower 1 bit of the least significant byte of data reproduced from a digital source yields a 90 dB dynamic range, and removing the lower 2 bits drops to a 84 dB dynamic range. Therefore, if the lower bit removed among the least significant bytes of the data reproduced by the digital source is n, the relation of the dynamic range is expressed by the following equation (1).

Dynamic Range ≒ 96-6n (dB). … … … … … … … … … Formula (1)

By removing the lower 3 bits of the least significant byte of the data reproduced from the digital source according to Equation (1), a dynamic range of about 78 dB can be obtained. As described above, the operation of adjusting the dynamic range when copying audio data is performed by inputting a serial clock signal to the first input terminal P1 to the clock terminal CLK of the first to fourth serial-to-parallel converters 11-14. Each is applied. In addition, serial digital audio data is applied from the reproduction unit (not shown) of the external digital audio device to the data input terminal D of the fourth serial-to-parallel conversion unit 14 through the second input terminal P2. In this case, when the signal input through the second input terminal P2 is an analog audio signal, it is input from an analog / digital converter (not shown). In the case of a digital audio signal, a serial clock and a serial digital audio data are input from a digital audio source. It is input by playing. The analog audio signal copy or the digital audio signal copy is selected by the user at the time of recording, and the analog / digital signal is determined accordingly. Whether the analog audio signal is copied or the digital audio signal is copied, the serial data SDATA is input in synchronization with the falling transition of the serial clock SCLK. R-channel parallel audio data and 2-byte L-channel parallel audio data are converted and output. One-byte digital audio data output from the first serial-to-parallel converting unit 11 becomes Most Significant Byte digital audio data of the L channel, and one-byte digital audio data output from the second serial-to-parallel converting unit 12 is performed. The digital audio data is digital audio data of least significant byte of one channel, and the digital audio data of one byte output from the third-parallel conversion unit 13 is digital of the most significant byte (MSB) of the R channel. The 1-byte digital audio data which becomes audio data and output from the fourth serial-to-parallel converter 14 becomes digital audio data of the least significant byte of the R channel.

In order to implement the desired dynamic range as described in Equation (1), the second serial-parallel converter 12 outputting the least significant byte audio data of the L channel and the fourth serial parallel outputting the least significant byte audio data of the R channel are output. The lower predetermined number bits n of the 8-bit digital audio data output from the converter 14 are input to one input terminal A of the first to second MUXs 15 and 16, and the other input terminal B of the multiplexer is Ground it.

Therefore, when the analog selection is controlled by controlling the selection stage of the first-second MUX 15-16 with the selection signal of analog / digital copy, the selection stage becomes high so that the output is intact without damage to the data. Since the selection stage is low, the data is removed by setting the lower predetermined number bits n of the L and R channels to 0 according to the dynamic range to be obtained. Therefore, the most significant single-byte data of the L channel as shown in FIG. 2D (2D) output from the first serial-parallel conversion unit 11 is input to the data input terminal R of the first latch unit 17, and thus the fourth input terminal ( The first latch unit 17 latches and outputs the L channel / R channel separation clock as shown in FIG. 2C input through P4. The upper predetermined number of bit (8-n) data of the lowest 1-byte data of the L channel as shown in FIG. 2D (2D) output from the second serial-to-parallel converter 12 and the lower one removed by the first MUX 11. The predetermined number of bits (n) of data is latched out of the second latch unit 18 by the L channel / R channel separation clock as shown in FIG. 2C input through the fourth input terminal P4.

In addition, the most significant single-byte data of the R channel as shown in FIG. 2D (2D) output from the third serial-to-parallel converter 13 is input to the data input terminal D of the first latch unit 17, and thus the fourth input terminal ( The first latch unit 17 is latched by the L channel / R channel separation clock as shown in FIG. 2C input through P4. The upper predetermined number of bit (8-n) data of the lowest 1-byte data of the R channel as shown in FIG. 2D (2D) output from the fourth serial-to-parallel converter 14 and the lower one removed by the second MUX 16. The predetermined number of bits n of data are latched out of the fourth latch unit 20 by the L channel / R channel separation clock as shown in FIG. 2C input through the fourth input terminal P4.

Accordingly, in the first to fourth latch units 17-20, 8 bits of which the dynamic range is adjusted by the L channel / R channel separation clock as shown in FIG. 2C input through the fourth input terminal P4. Audio data of the L channel and the R channel is sequentially output.

As described above, the problem of illegal copying of a software company producing a record by adjusting a certain level of dynamic range by removing a predetermined number of lower bits of the least significant byte of the reproduced digital audio data for copying from a digital audio device is raised. There is an advantage that can be solved.

Claims (2)

A circuit for adjusting the dynamic range of recorded data when copying reproduced audio data from a digital audio device, wherein the serial digital audio data is input and converted into R channel parallel digital audio data and L channel parallel digital audio data by a serial clock. Analog-digital copy selection by inputting the first to fourth parallel converters 11-14 to output and the least significant number of bits (n) parallel data of the L channel output from the second serial to parallel converter 12; A first MUX 15 for switching the L-channel dynamic range by removing the lowest predetermined number n parallel data when the digital audio signal is copied by the signal, and an output from the second serial-to-parallel converter 14. Lowest number when the digital audio signal is copied by analog / digital copy selection signal by inputting the lowest predetermined number (n) parallel data of the R channel Parallel data of the L-channel most significant byte (LSB) output from the first M / P conversion unit 11 and the second MUX 16 which switches to adjust the dynamic range of the R channel by removing the integer bit (n) parallel data. A first latch unit 17 for latching and outputting the L channel by the L channel / R channel separation clock signal L / R, and the least significant byte of the L channel output from the second serial-to-parallel converter 12. A number of upper bit (8-n) parallel data and a predetermined number of lower bit (n) parallel data selected by the first MUX 15 are input to the L channel / R channel separation clock signal (L / R). The L-channel / R channel-separated clock signal L by inputting parallel data of the second latch unit 18 latch-outputted and the R-channel most significant byte LSB output from the third serial-to-parallel converter 13. / R) the predetermined latch of the third latch unit 19 and the R channel least significant byte output from the fourth serial-to-parallel conversion unit 14 The lower bit (8-n) of parallel data and a predetermined number of lower bit (n) parallel data selected by the second MUX (16) are inputted to the L channel / R channel separation clock signal (L / R). A dynamic range control circuit for recording data in a digital audio device, characterized by comprising a fourth latch section 20 for latch output. A method of adjusting the dynamic range of recorded data when copying reproduced audio data in a digital audio device, comprising converting serial digital audio data into the highest byte and least significant byte parallel digital audio data of the R channel, respectively, and the lowest of the R channel. A predetermined number of lower bits of the byte parallel digital audio data and the least significant byte parallel digital audio data of the L channel are respectively removed by an analog / digital selection signal, and the most significant byte parallel audio data of the L channel and the predetermined number of lower bits are respectively removed. L-channel least significant parallel audio data of the L-channel having been removed is sequentially latched by an L-channel R-channel separation clock, and the most significant byte parallel audio data of the R-channel and the least-significant byte parallel audio data of the R-channel with the predetermined number of lower bits removed. L channel / R I separate clock for sequentially latched by the dynamic range control also characterized by the digital recording control data in the audio device to the dynamic range by the method.