[go: up one dir, main page]

KR910005932Y1 - Brightness and contrast control circuit - Google Patents

Brightness and contrast control circuit Download PDF

Info

Publication number
KR910005932Y1
KR910005932Y1 KR2019880010566U KR880010566U KR910005932Y1 KR 910005932 Y1 KR910005932 Y1 KR 910005932Y1 KR 2019880010566 U KR2019880010566 U KR 2019880010566U KR 880010566 U KR880010566 U KR 880010566U KR 910005932 Y1 KR910005932 Y1 KR 910005932Y1
Authority
KR
South Korea
Prior art keywords
brightness
variable resistor
transistor
signal
contrast
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR2019880010566U
Other languages
Korean (ko)
Other versions
KR900002020U (en
Inventor
김영석
Original Assignee
삼성전자 주식회사
안시환
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사, 안시환 filed Critical 삼성전자 주식회사
Priority to KR2019880010566U priority Critical patent/KR910005932Y1/en
Publication of KR900002020U publication Critical patent/KR900002020U/en
Application granted granted Critical
Publication of KR910005932Y1 publication Critical patent/KR910005932Y1/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/10—Intensity circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/066—Adjustment of display parameters for control of contrast

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Television Receiver Circuits (AREA)

Abstract

내용 없음.No content.

Description

휘도 및 콘트라스트 조정회로Luminance and Contrast Adjustment Circuit

제 1 도는 종래의 휘도 및 콘트라스트 조정회로.1 is a conventional brightness and contrast adjustment circuit.

제 2 도는 본 고안 회로도.2 is a circuit diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : 인터페이스 I1-I6: 인버터10: Interface I 1 -I 6 : Inverter

OP1, OP2: 연산증폭기 VR1, VR2: 가변저항OP 1 , OP 2 : operational amplifier VR 1 , VR 2 : variable resistor

Q1-Q14: 트랜지스터Q 1 -Q 14 : Transistor

본 고안은 64색을 표현할 수 있는 EGA(Enhanced Graphic Adaptor)모니터와 16색 칼라 모니터의 휘도 및 콘트라스트 조정회로에 관한 것이다.The present invention relates to a luminance and contrast adjustment circuit of an enhanced graphic adapter (EGA) monitor capable of representing 64 colors and a 16 color monitor.

일반적으로 EGA모니터 영상입력단과 휘도 및 콘트라스트 조정단은 제 1 도에 도시된 바와같이 인터페이스로부터 신호를 받아 위상을 맞추기 위하여 인버터(I1-I6)를 통과시킨 후 1단 영상증폭 트랜지스터를 구동시키도록 구성된다.In general, the EGA monitor image input terminal and the brightness and contrast adjustment stage pass the inverters I 1 -I 6 to receive a signal from the interface and adjust the phase as shown in FIG. It is configured to.

이러한 휘도 및 콘트라스트 조정회로는 가변저항(VR1)에 의해 R, G, B, R', G', B' 색신호의 증폭량을 가변함으로써 휘도 조정이 수행되고, 가변저항(VR2)에 의해 R', G', B' 색신호의 증폭량을 가변함으써 콘트라스트 조정이 수행된다.The brightness and contrast adjustment circuit by varying the R, G, B, R ' , G', B ' jeungpokryang of the color signal by a variable resistance (VR 1), the luminance adjustment is performed, R by a variable resistor (VR 2) Contrast adjustment is performed by varying the amount of amplification of the ', G', B 'color signals.

그러나 상기한 바와 같은 종래의 휘도 및 콘트라스트 조정회로에서는 LSB(Least Significant Bit 신호, 즉 R', G', B' 신호)신호의 디스플레이 시에 휘도 조정용 가변저항을 조정하게 되면 LSB신호의 증폭량이 가변되어 콘트라스트가 조정되는 문제점이 있었다.However, in the conventional luminance and contrast adjustment circuit as described above, the amplification amount of the LSB signal is variable when the luminance resistance variable resistor is adjusted when the LSB (Least Significant Bit signal, ie, R ', G', and B 'signals) is displayed. There was a problem that the contrast is adjusted.

따라서 사용자가 휘도 조정용 가변저항만을 조정하여도 MSB(Most Significant Bit 신호, 즉 R', G', B' 신호)신호가 디스플레이되면 휘도 조정용가변저항의 조정으로 인하여 MSB신호도 가변되어 있으므로 재조정을 해야하는 불편함이 있었다.Therefore, even if the user adjusts only the variable resistor for brightness adjustment, if the MSB (Most Significant Bit signal, ie, R ', G', B 'signal) is displayed, the MSB signal is also variable due to the adjustment of the brightness adjustable variable resistor. There was discomfort.

본 고안은 상기한 문제점을 개선하기 위하여 안출한 것으로서 LSB만의 디스플레이시에 휘도를 조정하여도 LSB신호가 가변되지 않으며, 사용자가 콘트라스트 조정만으로 화면을 맞추어 MSB신호가 디스플레이 될 때에 재조정을 필요로하지 않는 휘도 및 콘트라스트 조정회로를 제공하는 것을 그 목적으로 한다.The present invention has been made to solve the above problems, and the LSB signal is not changed even when the luminance is adjusted during the display of the LSB only, and the user does not need to readjust when the MSB signal is displayed by adjusting the contrast. It is an object to provide a brightness and contrast adjustment circuit.

상기한 목적을 달성하기 위하여 본 고안에서는 MSB신호를 받는 트랜지스터(Q1-Q3)의 공통 출력단을, 휘도조정용 가변저항(VR1)의 고정 중간탭과 끝단 사이에 연결된 트랜지스터(Q5)의 베이스단자와, 상기 가변저항(VR1)의 유동 중간탭과 타끝단을 연결하는 트랜지스터(Q6)의 베이스단자에 공통으로 접속되도록 한다.In order to achieve the above object, according to the present invention, a common output terminal of the transistors Q 1 to Q 3 receiving the MSB signal is connected to a fixed middle tap of the luminance adjusting variable VR 1 and an end of the transistor Q 5 . The base terminal is connected to the base terminal of the transistor Q 6 which connects the floating intermediate tab of the variable resistor VR 1 and the other end thereof in common.

이하 첨부된 제 2 도의 본 고안 회로도를 참조하여 본 고안을 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the present invention circuit diagram of FIG.

퍼스널 컴퓨터로 부터 인터페이스(10)를 통하여 영상 입력단으로 인가되는 신호(R, R', G, G', B, B')는 각각 인버터(I1-I6)를 통하여 1단 영상증폭 트랜지스터(Q9-Q14)의 베이스로 인가된다.The signals R, R ', G, G', B, and B 'applied from the personal computer to the image input terminal through the interface 10 are respectively connected to the first stage image amplification transistors through the inverters I 1 to I 6 . Q 9 -Q 14 ).

한편 휘도 조정용 가변저항(VR1)은 연산증폭기(OP1)의 비반전입력단자에 구성되어 연산증폭기(OP1)의 출력신호에 의해 동작하는 트랜지스터(Q7)의 전류를 제어하게 된다. 또한 콘트라스트 조정용 가변저항(VR2)은 연산증폭기(OP2)의 비반전입력단에 구성되어 연산증폭기(OP2)의 출력신호에 의해 동작하는 트랜지스터(Q8)의 전류를 제어하게 된다.The brightness adjusting variable resistor (VR 1) is to control the current of the operational amplifier (OP 1) is configured in the non-inverting input terminal of the operational amplifier (OP 1) the transistor (Q 7) operated by an output signal. Also the contrast-adjustment variable resistor (VR 2) is to control the current of the operational amplifier is configured in the non-inverting input terminal of the (OP 2) the operational amplifier (OP 2) transistor (Q 8) which is operated by the output signal of the.

상기한 트랜지스터(Q7)의 에미터 출력신호는 콘덴서(C2)에 충전되어 LSB신호 출력 트랜지스터(Q9, Q11, Q13)의 콜렉터 단으로 연결되고, 트랜지스터(Q8)의 에미터 출력신호는 콘덴서(C1)에 충전되어 MSB신호 출력 트랜지스터(Q10, Q12, Q14)의 콜렉터 단으로 연결된다.The emitter output signal of the transistor Q 7 is charged in the capacitor C 2 and connected to the collector stage of the LSB signal output transistors Q 9 , Q 11 , and Q 13 , and the emitter of the transistor Q 8 . The output signal is charged in the capacitor C 1 and connected to the collector stage of the MSB signal output transistors Q 10 , Q 12 , Q 14 .

본 고안 회로는 상기와 같은 종래의 회로 구성에 MSB신호가 출력되는 인버터(I1, I3, I5)의 출력단에 각각 신호반전용 트랜지스터(Q1, Q2, Q3)의 베이스를 연결하고, 상기 트랜지스터(Q1, Q2, Q3)의 콜렉터 출력단은 공통 접속되어 트랜지스터(Q5, Q6)의 베이스 바이어스 신호가 인가되도록 구성되며, 트랜지스터(Q5)는 전원으로 부터 가변저항(VR1) 고정 중간탭을 스위칭하고 트랜지스터(Q6)는 유동중간 탭과 연산증폭기(OP1)의 비반전입력단을 스위칭하도록 연결된다.The circuit of the present invention connects the bases of the signal-transistor transistors Q 1 , Q 2 , and Q 3 to the output terminals of the inverters I 1 , I 3 , and I 5 to which the MSB signal is output in the conventional circuit configuration as described above. The collector output terminals of the transistors Q 1 , Q 2 and Q 3 are commonly connected so that a base bias signal of the transistors Q 5 and Q 6 is applied, and the transistor Q 5 is a variable resistor from a power supply. (VR 1 ) switches the fixed intermediate tap and the transistor Q 6 is connected to switch the non-inverting input of the floating intermediate tap and the operational amplifier OP 1 .

한편 미설명 저항(R1-R30)은 바이어스용이며 Ro, Go, Bo는 각각 적색, 녹색, 청색 출력신호이다.On the other hand, the non-described resistors (R 1- R 30 ) are for bias and Ro, Go, and Bo are red, green, and blue output signals, respectively.

상기한 본 고안의 회로의 동작은 다음과 같다.The operation of the circuit of the present invention described above is as follows.

LSB신호의 디스플레이시에는 트랜지스터(Q1, Q2, Q3)가 모두 오프상태이므로 트랜지스터(Q5, Q6)의 베이스로 하이레벨 신호가 바이어스 되어 트랜지스터(Q5)가 온 상태를 유지하게 된다. 따라서 휘도 조정용 가변저항(VR1)을 조정하여도 유동 중간랩과 연결된 트랜지스터(Q6)가 오프 상태이므로 출력되는 신호의 세기를 조정할 수 없게 된다.In the display of the LSB signal, since the transistors Q 1 , Q 2 , and Q 3 are all off, the high level signal is biased to the base of the transistors Q 5 and Q 6 so that the transistor Q 5 remains on. do. Therefore, even if the variable resistance VR 1 for brightness adjustment is adjusted, the transistor Q 6 connected to the floating intermediate wrap is turned off, and thus the intensity of the output signal cannot be adjusted.

이와 반대로 MSB신호의 디스플레이시에는 적어도 트랜지스터(Q1, Q2, Q3)중의 하는 온 상태가 되므로 트랜지스터(Q5, Q6)의 베이스에는 항상 로우레벨신호가 바이어스된다.On the contrary, when the MSB signal is displayed, at least one of the transistors Q 1 , Q 2 , and Q 3 is turned on, so that the low level signal is always biased at the base of the transistors Q 5 and Q 6 .

따라서 트랜지스터(Q5)는 오프상태이고 트랜지스터(Q6)는 온 상태가 되어, 이때 휘도 조정용 가변저항을 조정하게 되면 가변저항(VR1)의 저항값이 유동중간탭에 의해 가변되므로 출력되는 신호의 세기를 조정할 수 있게 된다.Therefore, the transistor Q 5 is in the off state and the transistor Q 6 is in the on state. At this time, if the variable resistor for brightness adjustment is adjusted, the resistance value of the variable resistor VR 1 is changed by the floating intermediate tap so that the signal is output. You can adjust the intensity of the.

이상과 같은 본 고안 회로는 16색 칼라 모니터에서도 적용이 가능하여, 16색 칼라 모니터 회로의 휘도 조정용 가변저항에 본 고안과 같이 트랜지스터(Q5, Q6)를 구성하고 I(Inphase)신호로서 상기 트랜지스터(Q5, Q6)를 온, 오프 제어하도록 구성하므로써 본 고안에서 목적한 바와 같이 휘도 조정 및 콘트라스트 조정이 간섭으로 인한 재조정의 불편함을 해결할 수 있다.The circuit of the present invention as described above can be applied to a 16-color color monitor, and the transistors Q 5 and Q 6 are formed in the variable resistor for brightness adjustment of the 16-color color monitor circuit as in the present invention, and as the I (Inphase) signal, By configuring the transistors Q 5 and Q 6 to be turned on and off, brightness and contrast adjustments can solve the inconvenience of readjustment due to interference as intended in the present invention.

Claims (3)

1단 영상증폭 트랜지스터의 콜렉터 신호를 변화시켜 휘도 및 콘트라스트를 조정하도록 휘도 조정용 가변저항(VR1)과 콘트라스트 조정용 가변저항(VR2)을 구성한 영상출력 회로의 휘도 및 콘트라스트 조정회로에 있어서, 휘도 조정용 가변저항(VR1)의 고정 중간탭과 일단 사이에 트랜지스터(Q5)를 연결하고 유동 중간탭과 타단 사이에 트랜지스터(Q6)를 연결하여 컴퓨터로부터 입력되는 색신호에 의하여 상기 트랜지스터(Q5, Q6)를 동시에 배타적으로 스위칭 구동시키는 것을 특징으로 하는 휘도 및 콘트라스트 조정회로.The first stage in the video amplifying luminance by varying a collector signal of the transistor to adjust the brightness and contrast adjusting variable resistor (VR 1) and a contrast adjusting variable resistor (VR 2) the brightness and contrast of the video output circuit configured to adjust the circuit, the brightness adjustment by a fixed center tap and color signals received from the computer by one end connected to the transistor (Q 5) between and connect the floating center tap and transistors (Q 6) between the other end of the variable resistor (VR 1) the transistor (Q 5, Q 6 ) switching exclusively at the same time characterized in that the brightness and contrast adjustment circuit. 제 1 항에 있어서, 휘도 조정용 가변저항(VR1)에 연결된 트랜지스터(Q5, Q6)는 64색 EGA 모니터에서 MSB(Most Significant Bit)신호의 논리합신호에 의하여 구동되도록 구성하는 것을 특징으로 하는 휘도 및 콘트라스트 조정회로.The method of claim 1, wherein the brightness adjusting variable resistor transistor connected to the (VR 1) (Q 5, Q 6) is in a 64-color EGA monitor characterized in that configured to be driven by a logical OR signal of signals (Most Significant Bit) MSB Luminance and contrast adjustment circuit. 제 1 항에 있어서, 휘도 조정용 가변저항(VR1)에 연결된 트랜지스터(Q5, Q6)는 16색 칼라 모니터에서 I(Inphase)신호에 의하여 구동되도록 구성하는 것을 특징으로 하는 휘도 및 콘트라스트 조정회로.The method of claim 1, wherein the brightness adjusting variable resistor transistor connected to the (VR 1) (Q 5, Q 6) in brightness, characterized in that configured to be driven by an I (Inphase) signal from the 16-color display and a contrast adjustment circuit .
KR2019880010566U 1988-06-30 1988-06-30 Brightness and contrast control circuit Expired KR910005932Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019880010566U KR910005932Y1 (en) 1988-06-30 1988-06-30 Brightness and contrast control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019880010566U KR910005932Y1 (en) 1988-06-30 1988-06-30 Brightness and contrast control circuit

Publications (2)

Publication Number Publication Date
KR900002020U KR900002020U (en) 1990-01-19
KR910005932Y1 true KR910005932Y1 (en) 1991-08-12

Family

ID=19276984

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019880010566U Expired KR910005932Y1 (en) 1988-06-30 1988-06-30 Brightness and contrast control circuit

Country Status (1)

Country Link
KR (1) KR910005932Y1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010106910A (en) * 2000-05-24 2001-12-07 서춘식 Folding/opening type tent frame of cabin style

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010106910A (en) * 2000-05-24 2001-12-07 서춘식 Folding/opening type tent frame of cabin style

Also Published As

Publication number Publication date
KR900002020U (en) 1990-01-19

Similar Documents

Publication Publication Date Title
US4982287A (en) Control of brightness level adapted to control of contrast
KR910005932Y1 (en) Brightness and contrast control circuit
US4553141A (en) Picture control for RGB monitor
JPS6222512B2 (en)
JP2821120B2 (en) Image display circuit
JPH04243393A (en) Video control circuit for video display equipment
KR910005934B1 (en) Contrast / Luminance Programming Circuit
KR940002934B1 (en) TV screen and phenomenon prevention circuit
JP2587917B2 (en) Cut-off adjustment device
KR900000564Y1 (en) Video driving device
KR890004972Y1 (en) Contrast Control Circuit
KR900002303Y1 (en) In-put level control circuits of display devices
KR940000966Y1 (en) Green and orange text mode devices on the color monitor
KR940003249Y1 (en) Front switching circuit of tv and av
KR910007198Y1 (en) Brightness control circuit
JPS61111086A (en) Rgb input signal processing system
KR890005765Y1 (en) White balance compensation circuit for t.v.
KR870003024Y1 (en) Image amplification circuit of a color monitor
KR940003513Y1 (en) White balance compensator for tv monitor
KR910000102Y1 (en) Mode changing circuit using channel selecting switch
KR930006185Y1 (en) Automatic brightness adjustment circuit
JPS62226788A (en) Color video amplifier circuit
JP3591040B2 (en) Arc welding equipment
KR920003482Y1 (en) Amber color text circuit of color monitor
KR930004547Y1 (en) Text mode apparatus of color monitor

Legal Events

Date Code Title Description
A201 Request for examination
R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

UA0108 Application for utility model registration

St.27 status event code: A-0-1-A10-A12-nap-UA0108

UA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-UA0201

UG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-UG1501

UG1604 Publication of application

St.27 status event code: A-2-2-Q10-Q13-nap-UG1604

E701 Decision to grant or registration of patent right
UE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-UE0701

REGI Registration of establishment
UR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-UR0701

UR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-UR1002

Fee payment year number: 1

UR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-UR1001

Fee payment year number: 4

UR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-UR1001

Fee payment year number: 5

UR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-UR1001

Fee payment year number: 6

UR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-UR1001

Fee payment year number: 7

FPAY Annual fee payment

Payment date: 19980729

Year of fee payment: 8

UR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-UR1001

Fee payment year number: 8

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

UN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-UN2301

St.27 status event code: A-5-5-R10-R11-asn-UN2301

LAPS Lapse due to unpaid annual fee
UC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-UC1903

Not in force date: 19990813

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

UN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-UN2301

St.27 status event code: A-5-5-R10-R11-asn-UN2301

UC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-UC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 19990813

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

R17-X000 Change to representative recorded

St.27 status event code: A-5-5-R10-R17-oth-X000

UN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-UN2301

St.27 status event code: A-5-5-R10-R11-asn-UN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

UN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-UN2301

St.27 status event code: A-5-5-R10-R11-asn-UN2301

UN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-UN2301

St.27 status event code: A-5-5-R10-R11-asn-UN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000