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KR910005801Y1 - TV's back limit circuit - Google Patents

TV's back limit circuit Download PDF

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Publication number
KR910005801Y1
KR910005801Y1 KR2019870023580U KR870023580U KR910005801Y1 KR 910005801 Y1 KR910005801 Y1 KR 910005801Y1 KR 2019870023580 U KR2019870023580 U KR 2019870023580U KR 870023580 U KR870023580 U KR 870023580U KR 910005801 Y1 KR910005801 Y1 KR 910005801Y1
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South Korea
Prior art keywords
emitter
white
transistor
signal
limit circuit
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KR2019870023580U
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Korean (ko)
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KR890015269U (en
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김홍기
강동원
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대우전자 주식회사
김용원
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Publication of KR910005801Y1 publication Critical patent/KR910005801Y1/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/16—Circuitry for reinsertion of DC and slowly varying components of signal; Circuitry for preservation of black or white level
    • H04N5/18—Circuitry for reinsertion of DC and slowly varying components of signal; Circuitry for preservation of black or white level by means of "clamp" circuit operated by switching circuit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)

Abstract

내용 없음.No content.

Description

TV의 백폭 제한 회로TV's back limit circuit

제 1 도는 본 고안의 회로도.1 is a circuit diagram of the present invention.

제 2 도는 본 고안의 설명을 위한 신호 파형도.2 is a signal waveform diagram for explaining the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

R1, R2:저항 Q1, Q2: 트랜지스터R 1 , R 2 : Resistor Q 1 , Q 2 : Transistor

C1: 콘덴서 A : 영상신호단자C 1 : Capacitor A: Video Signal Terminal

D : 다이오드D: Diode

본 고안은 TV회로에서 백 신호 또는 백 문자 신호수신시 발생하는 화면의 번짐 및 고휘도 발생이 문제점을 제거하기 위한 백폭 제한 회로에 관한 것이다.The present invention relates to a white width limiting circuit for eliminating the problem of blurring and high brightness generated on the screen when receiving a white signal or a white character signal in a TV circuit.

일반적으로 텔레비젼 수상기에서 수신되는 영상화면이 백색이거나 또는 자막이 백색을 띄게되면 귀선소거 신호에 포함되어지는 영상 신호중 백레벨의 전압레벨의 폭이 크게되어지므로서 페데스텔레벨은 동일 하더라도 결국 흑레벨이 상승되는 것과 같은 효과를 얻게되어 화면이 밝게 되면서 그 백색화면과 백색문자의 번짐과 밝기가 재현이 되지않는 결점을 낳게된다.In general, when a video screen received from a television receiver is white or a subtitle becomes white, the width of the voltage level of the white level among the video signals included in the blanking signal increases, so that the black level is the same even though the pedestal level is the same. The effect is that it is raised, and the screen becomes brighter, which causes the defect that the blur and brightness of the white screen and white characters are not reproduced.

본 고안은 이러한 폐단을 개선하여 백색화면 및 백색문자를 수신시에는 벡레벨의 저압폭을 감쇄시킴으로서 화질을 향상시킬 수 있는 백폭제한 회로를 제공하려는데 목적이 있는 것이다.The present invention aims to provide a whitening limiting circuit that can improve image quality by attenuating the low-pressure width of the back level when receiving white screens and white characters by improving such closure.

이를 첨부된 도면에 의하여 보다 상세히 설명하면 다음과 같다.When described in more detail by the accompanying drawings as follows.

블랭킹 신호를 갖는 영상신호가 전달되는 영상신호단자(A)에 트랜지스터(Q1, Q2)의 베이스를 공통 접속하고 트랜지스터(Q1)의 에미터에는 출력단자(Vout)와 병렬 접속된 콘덴서(C1) 및 저항(R2)을 연결하며, 트랜지스터(Q1)의 에미터에는 저항(R1)을 접속하고 두 트랜지스터(Q1), (Q2)의 에미터에 다이오드(D1)를 연결하여서 된 것이다.A capacitor connected in parallel with the base of the transistors Q 1 and Q 2 is connected to the video signal terminal A through which the video signal having a blanking signal is transmitted, and the output terminal Vout is connected in parallel to the emitter of the transistor Q 1 . C 1) and resistor (R 2) the connection and, in the emitter of the transistor (Q 1) connected to the resistance (R 1) and two transistors (Q 1), the emitter of the (Q 2) the diode (D 1) It was made by connecting.

이와 같이 구성된 본 고안의 작용효과를 설명하면 다음과 같다.Referring to the effect of the present invention configured as described above are as follows.

귀선이 화면에 나오는 것을 소거시키기 위해 동기신호와 함께 보내져오는 합성영상신호가 영상신호단자(A)에 입력되고 이 신호가 백색문자나 또는 백색화면을 나타내는 백레벨의 영상신호인 경우에는 제 2a 도와 같이 t1의 시간동안 계속 신호가 유지되며, 이 신호는 트랜지스터(Q1), (Q2)의 베이스에 입력이 되어진다.If the composite video signal sent together with the synchronization signal to cancel the blanking on the screen is input to the video signal terminal A, and the signal is a white character or a white level video signal representing a white screen, the second 2 Likewise, the signal is maintained for the time t 1 , which is input to the bases of the transistors Q 1 and Q 2 .

이때, 트랜지스터(Q1)는 에미터 플로워 트랜지스터이므로 그 에미터에서는 입력신호와 동형의 파형이 얻어지며, 동일한 과정으로 트랜지스터(Q2)의 에미터에도 동형의 파형출력이 얻어지나 이에는 콘덴서(C1)의 저항(R2)이 접속되어 있으므로 이들에 의하여 설정된 시간 t2가 지난 후에는 트랜지스터(Q2)의 에미터 전압이 트랜지스터(Q1)의 에미터 전압보다 월등히 높은 상태가 되어 다이오드(D1)가 턴 온 되면서 저항(R1)과 저항(R2)이 병렬 접속되며, 그 결과 콘덴서(C1)의 전압은 저항(R1)과 저항(R2)으로 신속히 방전되어 그 출력전압은 급하게 저하된다.At this time, since the transistor Q 1 is an emitter follower transistor, the same waveform as that of the input signal is obtained from the emitter. In the same process, the same waveform output is also obtained from the emitter of the transistor Q 2 . C 1) the resistance (R 2) after the time t 2 is set by these because it is connected last in is is much higher than the emitter voltage of the transistor (Q 2) the emitter voltage of the transistor (Q 1) of the diode As (D 1 ) is turned on, resistor (R 1 ) and resistor (R 2 ) are connected in parallel, so that the voltage of capacitor (C 1 ) is quickly discharged to resistor (R 1 ) and resistor (R 2 ). The output voltage drops rapidly.

이때의 시정수×(C1)으로 되어 작아지며 트랜지스터(Q2)의 에미터에 나타나는 파형은 (나)와 같이 되고 이는 당초에 입력된 신호의 유지시간 t1이 시간 t2로 감소되어 시간t2동안 제로레벨로 되는 것이어서 결국 백레벨의 전압레벨폭이 감소되어 입력신호에 백신호 및 백색문자가 입력되어도 폭이 감소된 비디오 신호가 출력 단자 (Vout)로 출력되는 것이다.Time constant at this time × waveform, the smaller is a (C 1) that appear on the emitter of the transistor (Q 2) is (b) and, as it is the holding time t 1 of the signal input to the original reduced to time t 2 zero for a time t 2 As a result, the voltage level of the back level is reduced so that the video signal having the reduced width is output to the output terminal Vout even when a vaccine code and white characters are input to the input signal.

본 고안은 이러한 신호 또는 백 문자 영상신호가 입력되는 경우에도 전압레벨폭을 감소시켜 화면의 번짐 및 밝기를 제한 할 수 있으므로 결국 시각에 자극을 주지않는 양호한 화면을 얻을 수 있게 되는 유용한 고안이다.The present invention is useful when it is possible to obtain a good screen that does not cause visual stimulus because it can limit the spreading and brightness of the screen by reducing the voltage level width even when such a signal or a white character video signal is input.

Claims (1)

통상의 블랭킹 신호를 갖는 영상신호단자(A)에 트랜지스터(Q1), (Q2)의 베이스를 공통 접속하고 트랜지스터(Q2)의 에미터에는 출력단자(Vout)와 병렬접속된 콘덴서(C1)및 저항 (R2)를 연결하며, 트랜지스터(Q1)의 에미터에는 저항(R1)을 접속하고 두 트랜지스터(Q1)(Q2)의 에미터에 다이오드(D1)를 연결하여서 된 TV의 백폭 제한 회로.A capacitor C connected in common with a base of transistors Q 1 and Q 2 to a video signal terminal A having a normal blanking signal, and connected in parallel with an output terminal Vout to an emitter of transistor Q 2 . 1) and connected to the resistance (R 2), the emitter of the transistor (Q 1) is connected to a resistor (R 1) and connecting the diode (D 1) to the emitter of two transistors (Q 1) (Q 2) TV's back limit circuit.
KR2019870023580U 1987-12-29 1987-12-29 TV's back limit circuit Expired KR910005801Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019870023580U KR910005801Y1 (en) 1987-12-29 1987-12-29 TV's back limit circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019870023580U KR910005801Y1 (en) 1987-12-29 1987-12-29 TV's back limit circuit

Publications (2)

Publication Number Publication Date
KR890015269U KR890015269U (en) 1989-08-12
KR910005801Y1 true KR910005801Y1 (en) 1991-08-03

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ID=19270957

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019870023580U Expired KR910005801Y1 (en) 1987-12-29 1987-12-29 TV's back limit circuit

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KR890015269U (en) 1989-08-12

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