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KR910005167A - 데이터 처리장치 - Google Patents

데이터 처리장치

Info

Publication number
KR910005167A
KR910005167A KR1019900011517A KR900011517A KR910005167A KR 910005167 A KR910005167 A KR 910005167A KR 1019900011517 A KR1019900011517 A KR 1019900011517A KR 900011517 A KR900011517 A KR 900011517A KR 910005167 A KR910005167 A KR 910005167A
Authority
KR
South Korea
Prior art keywords
data processing
processing device
data
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
KR1019900011517A
Other languages
English (en)
Other versions
KR930001922B1 (ko
Inventor
기요가즈 아라이
아끼라 야마기와
도시히로 오까베
Original Assignee
가부시기가이샤 히다찌세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시기가이샤 히다찌세이사꾸쇼 filed Critical 가부시기가이샤 히다찌세이사꾸쇼
Publication of KR910005167A publication Critical patent/KR910005167A/ko
Application granted granted Critical
Publication of KR930001922B1 publication Critical patent/KR930001922B1/ko
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
KR1019900011517A 1989-08-28 1990-07-28 데이터 처리장치 Expired - Lifetime KR930001922B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP221,067 1989-08-28
JP22106789 1989-08-28

Publications (2)

Publication Number Publication Date
KR910005167A true KR910005167A (ko) 1991-03-30
KR930001922B1 KR930001922B1 (ko) 1993-03-20

Family

ID=16760975

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900011517A Expired - Lifetime KR930001922B1 (ko) 1989-08-28 1990-07-28 데이터 처리장치

Country Status (3)

Country Link
US (1) US5452436A (ko)
JP (1) JPH082055B2 (ko)
KR (1) KR930001922B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100877524B1 (ko) * 2001-09-11 2009-01-07 엔엑스피 비 브이 전자 장치

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5887196A (en) * 1991-12-30 1999-03-23 Apple Computer, Inc. System for receiving a control signal from a device for selecting its associated clock signal for controlling the transferring of information via a buffer
US5640599A (en) * 1991-12-30 1997-06-17 Apple Computer, Inc. Interconnect system initiating data transfer over launch bus at source's clock speed and transfering data over data path at receiver's clock speed
US5524237A (en) * 1992-12-08 1996-06-04 Zenith Electronics Corporation Controlling data transfer between two microprocessors by receiving input signals to cease its data output and detect incoming data for reception and outputting data thereafter
JP3489147B2 (ja) * 1993-09-20 2004-01-19 株式会社日立製作所 データ転送方式
JP2991023B2 (ja) * 1993-12-28 1999-12-20 株式会社日立製作所 データ送信装置、データ送受信装置及びシステム
US5808487A (en) * 1994-11-30 1998-09-15 Hitachi Micro Systems, Inc. Multi-directional small signal transceiver/repeater
JPH08278916A (ja) * 1994-11-30 1996-10-22 Hitachi Ltd マルチチャネルメモリシステム、転送情報同期化方法及び信号転送回路
JP3417741B2 (ja) * 1995-10-06 2003-06-16 富士通株式会社 取引制御システム
US5822571A (en) * 1996-06-05 1998-10-13 Compaq Computer Corporation Synchronizing data between devices
US5805088A (en) * 1996-11-01 1998-09-08 International Business Machines Corporation High speed asynchronous serial to parallel data converter
US6359815B1 (en) 1998-03-12 2002-03-19 Hitachi, Ltd. Data transmitter
US6473871B1 (en) 1999-08-31 2002-10-29 Sun Microsystems, Inc. Method and apparatus for HASS testing of busses under programmable control
US6546507B1 (en) 1999-08-31 2003-04-08 Sun Microsystems, Inc. Method and apparatus for operational envelope testing of busses to identify halt limits
US6609221B1 (en) 1999-08-31 2003-08-19 Sun Microsystems, Inc. Method and apparatus for inducing bus saturation during operational testing of busses using a pattern generator
US6275077B1 (en) 1999-08-31 2001-08-14 Sun Microsystems, Inc. Method and apparatus for programmable adjustment of bus driver propagation times
US6502212B1 (en) 1999-08-31 2002-12-31 Sun Microsystems, Inc. Method and apparatus for bus parameter optimization using probes of system configurations
US6535945B1 (en) 1999-08-31 2003-03-18 Sun Microsystems, Inc. Method and apparatus for programmable adjustment of computer system bus parameters
US6499113B1 (en) 1999-08-31 2002-12-24 Sun Microsystems, Inc. Method and apparatus for extracting first failure and attendant operating information from computer system devices
US6574154B2 (en) 2000-09-12 2003-06-03 Hitachi, Ltd. Data transmitter
US6976114B1 (en) * 2001-01-25 2005-12-13 Rambus Inc. Method and apparatus for simultaneous bidirectional signaling in a bus topology
GB2388501A (en) 2002-05-09 2003-11-12 Sony Uk Ltd Data packet and clock signal transmission via different paths
US8190722B2 (en) * 2003-06-30 2012-05-29 Randy Oyadomari Synchronization of timestamps to compensate for communication latency between devices
US8782458B2 (en) * 2011-11-29 2014-07-15 Advanced Micro Devices, Inc. System and method of data communications between electronic devices
DE102017109455A1 (de) * 2017-05-03 2018-11-08 Carl Zeiss Microscopy Gmbh Mikroskopsystem und Verfahren zur Zeitsteuerung von Abläufen in einem Mikroskopsystem
US11126216B2 (en) * 2019-01-15 2021-09-21 SK Hynix Inc. Signal generation circuit synchronized with a clock signal and a semiconductor apparatus using the same
KR102728609B1 (ko) * 2019-01-15 2024-11-12 에스케이하이닉스 주식회사 클럭 신호에 동기되는 신호 생성 회로 및 이를 이용하는 반도체 장치

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2104427C3 (de) * 1971-01-30 1978-09-07 Ibm Deutschland Gmbh, 7000 Stuttgart Einrichtung zur Zeitsteuerung von Übertragungsvorgängen
US4164787A (en) * 1977-11-09 1979-08-14 Bell Telephone Laboratories, Incorporated Multiple microprocessor intercommunication arrangement
JPS55143859A (en) * 1979-04-26 1980-11-10 Nec Corp Signal distribution system
US4354227A (en) * 1979-11-19 1982-10-12 International Business Machines Corp. Fixed resource allocation method and apparatus for multiprocessor systems having complementarily phased cycles
JPS56140459A (en) * 1980-04-04 1981-11-02 Hitachi Ltd Data processing system
US4503490A (en) * 1981-06-10 1985-03-05 At&T Bell Laboratories Distributed timing system
JPS5856549A (ja) * 1981-09-30 1983-04-04 Fujitsu Ltd バス駆動回路
JPS59111445A (ja) * 1982-12-17 1984-06-27 Nec Corp デ−タ伝送方式
JPS59121522A (ja) * 1982-12-28 1984-07-13 Fujitsu Ltd バススキユ−補償回路
US4527075A (en) * 1983-07-11 1985-07-02 Sperry Corporation Clock source with automatic duty cycle correction
US4805195A (en) * 1984-06-08 1989-02-14 Amdahl Corporation Selectable timing delay circuit
ZA857137B (en) * 1984-09-21 1986-04-30 Int Computers Ltd Data transfer system
JPS6227813A (ja) * 1985-07-29 1987-02-05 Hitachi Ltd 位相同期方式
US4866664A (en) * 1987-03-09 1989-09-12 Unisys Corporation Intercomputer communication control apparatus & method
US5133064A (en) * 1987-04-27 1992-07-21 Hitachi, Ltd. Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
US4882738A (en) * 1987-06-25 1989-11-21 Nec Corporation Clock control system
US4815109A (en) * 1987-06-25 1989-03-21 Racal Data Communications Inc. Sampling clock synchronization
US4881165A (en) * 1988-04-01 1989-11-14 Digital Equipment Corporation Method and apparatus for high speed data transmission between two systems operating under the same clock with unknown and non constant skew in the clock between the two systems
US5237670A (en) * 1989-01-30 1993-08-17 Alantec, Inc. Method and apparatus for data transfer between source and destination modules

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100877524B1 (ko) * 2001-09-11 2009-01-07 엔엑스피 비 브이 전자 장치

Also Published As

Publication number Publication date
JPH082055B2 (ja) 1996-01-10
JPH03157030A (ja) 1991-07-05
KR930001922B1 (ko) 1993-03-20
US5452436A (en) 1995-09-19

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