KR900002600Y1 - Vertical oscilliation frequency and magnitude automatic control circuit - Google Patents
Vertical oscilliation frequency and magnitude automatic control circuit Download PDFInfo
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- KR900002600Y1 KR900002600Y1 KR2019860007451U KR860007451U KR900002600Y1 KR 900002600 Y1 KR900002600 Y1 KR 900002600Y1 KR 2019860007451 U KR2019860007451 U KR 2019860007451U KR 860007451 U KR860007451 U KR 860007451U KR 900002600 Y1 KR900002600 Y1 KR 900002600Y1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/06—Generation of synchronising signals
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Abstract
내용 없음.No content.
Description
제 1 도는 종래의 회로도.1 is a conventional circuit diagram.
제 2 도는 제 1 도의 각부의 파형도.2 is a waveform diagram of each part of FIG.
제 3 도는 본 고안에 따른 회로도.3 is a circuit diagram according to the present invention.
제 4 도 제 3 도의 각부의 파형도.Fig. 4 is a waveform diagram of each part of Fig. 3.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
R1-R12: 저항 C1-C7: 콘덴서R 1 -R 12 : Resistor C 1 -C 7 : Capacitor
D1-D4: 다이오드 VR1-VR4: 가변저항D 1 -D 4 : Diode VR 1- VR 4 : Variable resistor
TR1-TR2: 트랜지스터 OP1: 비교기TR 1 -TR 2 : Transistor OP 1 : Comparator
본 고안은 수직편향회로에 있어서, 수직동기신호가 50Hz/60Hz로 입력됨에 따라 수직발진주파수와 수직크기가 자동으로 조절될 수 있게한 수직발진주파수 및 수직 크기 자동조절회로에 관한 것이다.The present invention relates to a vertical oscillation frequency and vertical size automatic control circuit in the vertical deflection circuit, the vertical oscillation frequency and vertical size can be automatically adjusted as the vertical synchronization signal is input at 50Hz / 60Hz.
종래의 경우에는 제1도에 도시한 바와 같이, 수직동기 신호 입력단자(Sv)는 저항(R1)을 통해 트랜지스터(TR1)의 베이스에 접속하고 그 접속점은 저항(R2)을 통해 트랜지스터(TR1)의 콜렉터 및 콘덴서(C1)의 일측에 접속하며, 또한 상기 접속점은 저항(R3) 을 통한 후 저항(R4) 및 가변저항(VR1)을 병렬로 통해 접지하고, 상기 트랜지스터(TR1)의 에미터는 상기 콘덴서(C1)의 타측에 접속함과 아울러 가변저항(VR2)을 통해 수직 발진출력단자(So)에 접속한 것으로, 이의 동작을 보면 전원단자(B+)를 통해 전원을 인가하면, 전원인가의 초기에 콘덴서(C1)를 통한 순간전압으로 트랜지스터(TR1)의 에미터는 고전위가 되고, 콘덴서(C1)가 충전이 완료되어지는 동안 트랜지스터(TR1)의 베이스는 저전위가 되어 그가 오프되고, 콘덴서(C1)의 충전이 완료되어 가면서 트랜지스터(TR1)이 베이스에 인가된 전압이 그의 에미터 전압보다 높아지게 되어 트랜지스터(TR1)가 온된다.In the conventional case, as shown in FIG. 1, the vertical synchronous signal input terminal Sv is connected to the base of the transistor TR 1 through the resistor R 1 , and the connection point thereof is connected through the resistor R 2 . and connected to one side of the collector and the capacitor (C 1) of the (TR 1), also the attachment point is a resistance (R 3) and then through the ground through a parallel resistor (R 4) and a variable resistor (VR 1), and the that connected to the transistor (TR 1) emitter of the capacitor (C 1) perpendicular to the oscillation output terminal (So) connected to the other end also with the well through the variable resistor (VR 2) of, look at its operating power supply terminal (B + When the power is applied through the power supply, the emitter of the transistor TR 1 becomes a high potential at an initial voltage through the capacitor C 1 at the initial stage of application of the power, and the capacitor C 1 is charged while the charging of the capacitor C 1 is completed. The base of TR 1 ) becomes low potential and it is turned off, and the charging of capacitor C 1 is completed. At the same time, the voltage applied to the base of the transistor TR 1 becomes higher than its emitter voltage, thereby turning on the transistor TR 1 .
이때, 수직동기신호 입력단자(Sv)를 통해 제2도 (a)에 도시한 바와 같은 수직동기신호가 입력되면 그 신호는 트랜지스터(TR1)의 베이스에 인가되어 트랜지스터(TR1)의 에미터 전압은 제2도 (b)에 도시한 바와 같이 점차 낮아지게 된다. 이와같은 동작이 계속 반복되면서 결국 제2도 (b)에 도시한 바와 같은 파형으로 수직발진이 하게 되는데, 이때 수직동기신호가 50Hz/ 60Hz로 입력됨에 따라서 가변저항(VR1)의 값을 일정값으로 고정시켜 놓아 수직발진주파수를 조절하여 가변저항(VR2)을 조절하여 수직크기를 조정하게 된다.At this time, the emitter of the vertical sync signal through the input terminal (Sv) If the second degree of the vertical synchronizing signal is input as shown in (a) the signal is applied to the base of the transistor (TR 1) transistor (TR 1) The voltage is gradually lowered as shown in FIG. As the above operation is repeated repeatedly, the oscillation is performed vertically in the waveform as shown in FIG. 2 (b). At this time, the vertical synchronous signal is input at 50Hz / 60Hz, and the value of the variable resistor VR 1 is constant. By adjusting the vertical oscillation frequency by adjusting the variable resistor (VR 2 ) to adjust the vertical size.
그러나, 이와 같은 상태에서 이전과 다른 주파수, 즉 50Hz에서 60Hz 또는 60Hz에서 50Hz로 주파수가 다른 수직동기신호가 입력되면, 그에 따라 발진주파수가 달라지게 되어 수직동기가 흐르고 화면의 수직크기가 달라지게 되어 두개의 주파수 즉 50Hz/ 60Hz에 맞는 회로를 준비하여 입력 수직동기신호의 주파수에 따라 수동으로 절환하여 사용해야 되므로 회로의 이중구성에 따르는 복잡성, 원가상승은 물론 사용시마다 회로를 수동절환해야 되는 단점이 많이 있었다.However, in this state, if a vertical synchronization signal having a different frequency from the previous frequency, i.e., 50 Hz to 60 Hz or 60 Hz to 50 Hz is input, the oscillation frequency is changed accordingly, and the vertical synchronization flows and the vertical size of the screen is changed. Since a circuit suitable for two frequencies, 50Hz / 60Hz, must be prepared and used manually according to the frequency of the input vertical synchronous signal, there are many disadvantages in the complexity, cost increase, and manual switching of the circuit every time it is used. there was.
본 고안은 이와 같은 종래의 단점을 해결하기 위하여 수직동기신호의 주파수에 따라 수직발진주파수 및 수직크기가 자동으로 조절될 수 있도록 안출한 것으로 첨부한 도면에 의하여 이를 상세히 설명하면 다음과 같다.The present invention is designed to automatically adjust the vertical oscillation frequency and the vertical size according to the frequency of the vertical synchronization signal in order to solve such a conventional disadvantage described in detail by the accompanying drawings as follows.
제3도는 본 고안에 따른 회로도로서 이에 도시한 바와 같이 수직동기신호 입력단자(Sv)는 콘덴서(C1) 및 저항(R1)을 통해 트랜지스터(TR1)의 베이스에 접속하고 그 접속점은 저항(R2)을 통해 트랜지스터(TR1)의 콜렉터 및 콘덴서(C2)의 일측에 접속하며, 또한 상기 접속점은 저항(R3)을 통한후 저항(R4) 및 가변저항(VR1)을 통해 병렬로 통해 접지하고, 상기 트랜지스터(TR1)의 에미터는 상기 콘덴서(C2)의 타측에 접속하여 그 접속점은 가변저항(VR2)을 통해 수직발진출력단자(So)에 접속한 것에 있어서, 상기 수직동기신호입력단자(Sv)는 저항(R7) 및 콘덴서(C3)(C4)를 통해 트랜지스터(TR2)의 베이스에 접속하고, 그의 에미터는 일측이 전원단자(B+)에 접속된 콘덴서(C3)를 통한후 콘덴서(C6), 다이오드(D3) 및 저항(R12)을 통해 비교기(OP1)의 반전입력단자(-)에 접속하며 그의 출력단자는 역방향 다이오드(D4)를 통한후 가변저항(VR3)(VR4)을 통해 상기 저항(R1)과 콘덴서(C2)의 접속점 및 수직발진출력단자(So)에 각기 접속하여 구성한 것으로, 도면의 미설명 부호 B+는 전원단자이고 상기에서 비교기(OP1)이 비반전입력단자(+)에는 수직동신호입력단자(Sv)에 50Hz의 수직 동기신호가 입력될 때 비교기(OP1)의 비반전입력단자9-)에 인가되는 전압보다 낮게 설정하고 60Hz의 수직동기신호의 경우보다는 높게 설정한 것으로, 이와 같이 구성된 본 고안의 작용 및 효과를 상세히 설명하면 다음과 같다.3 is a circuit diagram according to the present invention. As shown therein, the vertical synchronous signal input terminal Sv is connected to the base of the transistor TR 1 through a capacitor C 1 and a resistor R 1 , and the connection point thereof is a resistor. (R 2 ) is connected to one side of the collector of the transistor TR 1 and the capacitor C 2 , and the connection point is connected to the resistor R 4 and the variable resistor VR 1 through the resistor R 3 . Grounded in parallel, and the emitter of the transistor TR 1 is connected to the other side of the capacitor C 2 , and its connection point is connected to the vertical oscillation output terminal So through the variable resistor VR 2 . The vertical synchronous signal input terminal Sv is connected to the base of the transistor TR 2 through a resistor R 7 and a capacitor C 3 and C 4 , and one side of the emitter is a power supply terminal B + . Through the condenser (C 3 ) connected to the inverter of the comparator (OP 1 ) through the capacitor (C 6 ), diode (D 3 ) and resistor (R 12 ) Connected to the output terminal (-), and its output terminal through the reverse diode (D 4 ) and then through the variable resistor (VR 3 ) (VR 4 ) the connection point and vertical oscillation output of the resistor (R 1 ) and the capacitor (C 2 ) Each of the terminals So is connected to each other. In the drawing, reference numeral B + denotes a power supply terminal, and the comparator OP 1 is connected to the non-inverting input terminal (+) at a vertical voltage of 50 Hz to the vertical dynamic signal input terminal Sv. When the synchronization signal is input, it is set lower than the voltage applied to the non-inverting input terminal 9-) of the comparator OP 1 and higher than the case of the vertical synchronization signal of 60 Hz. It will be described in detail as follows.
전원단자(B+)를 통해 전원이 인가되면, 전원인가 초기에 콘덴서(C2)(C5)가 충전이 되는 동안 트랜지스터(TR1)(TR2)가 오프되었다가 콘덴서(C2)(C5)의 충전이 완료되면서 트랜지스터(TR1)(TR2)의 베이스전위가 그이 에미터 전위보다 높아지면서 트랜지스터(TR1)(TR2)가 온되고, 이때 수직동기신호 입력단자(Sv)를 통해 제4도(a)(b)에 되시한 바와 같이 50Hz/60Hz 수직동기신호가 입력되면 그 신호는 상기 트랜지스터(TR1)(TR2)의 베이스에 인가되어 그의 에미터는 제4도 (c)(d)에 도시한 바와 같은 파형이 출력된다. 이때 50Hz의 신호에 따른 출력신호[제4도 (d)]는 60Hz에 대한 출력신호 [제4도 (c)]보다 1. 2 배 더 크게 된다 When power is applied through the power supply terminal B + , the transistors TR 1 and TR 2 are turned off while the capacitors C 2 and C 5 are initially charged, and then the capacitors C 2 ( As the charging of C 5 is completed, the transistors TR 1 and TR 2 are turned on as the base potential of the transistors TR 1 and TR 2 is higher than the emitter potential, and the vertical synchronization signal input terminal Sv is turned on. As shown in Fig. 4 (a) and (b), when a 50 Hz / 60 Hz vertical synchronization signal is input, the signal is applied to the base of the transistors TR 1 and TR 2 and its emitter is c) A waveform as shown in (d) is output. At this time, the output signal [Fig. 4 (d)] according to the signal of 50 Hz is 1. 2 times larger than the output signal [Fig. 4 (c)] for 60 Hz.
이와 같이 입력수직동기신호의 주파수에 따라 트랜지스터(TR2)의 에미터를 통해 출력된 신호(제4도 (c)(d)]는 콘덴서(C6), 다이오드(D2)(D3) 및 콘덴서(C7)로 구성된 회로를 통해 직류전원으로 되어 비교기(OP1)이 반전입력단자(-)에 인가된다. 이때 상기한 바와 같이 비교기(OP1)의 비반전입력단자(+)에 인가되는 기준전압단자(Vref)의 기준전압은 60Hz의 수직동기신호가 입력될때 그의 비반전입력단자와 입력신호보다 높게 설정하였으므로 비교기(OP1)로부터 고전위가 출력되어 다이오드(D4)가 오프되고, 이에 따라 회로는 최초 60Hz의 수직동기신호에 맞게 설정해 놓은 가변저항(VR1)(VR2)에 의해 수직발진 및 수직크기가 고정되어 출력되게 하며, 50Hz의 수직동기신호가 입력되면 상기 60Hz의 경우와는 반대로 상기 비교기(OP1)의 출력단자는 저전위가 되어 다이오드(D4)가 온되고, 이에 따라 그 다이오드(D4)에 접속된 가변저항(VR3)(VR4) 및 상기 다이오드(D4)를 통해 전류가 흐르게 되어 가변저항(VR3)의 값을 트랜지스터(TR1)의 베이스 전위가 낮아져 그의 에미터로부터 얻은 수직발진 주파수가 50Hz의 수직동기신호입력에 맞게 자동조절되게 되며, 이때 상기한 바와 같이 60Hz의 경우에 비해 수직크기가 커지게 되지만 가변저항(VR2)에 접속된 가변저항(VR4)를 통해 전류가 흐르게 되므로 수직크기도 상기 가변저항(VR4)의 값을 설정함에 따라 자동으로 일정치로 조절되게 된다.As such, the signal output through the emitter of the transistor TR 2 according to the frequency of the input vertical synchronization signal (FIG. 4 (c) (d)) is the capacitor C 6 and the diode D 2 D 3 . And a comparator OP 1 is applied to the inverting input terminal (-) by a DC power supply through a circuit composed of a condenser (C 7 ), as described above, to the non-inverting input terminal (+) of the comparator (OP 1 ). Since the reference voltage of the applied reference voltage terminal Vref is set higher than that of the non-inverting input terminal and the input signal when the vertical synchronization signal of 60 Hz is input, the high potential is output from the comparator OP 1 so that the diode D 4 is turned off. Accordingly, the circuit allows the vertical oscillation and the vertical size to be fixed and output by the variable resistor VR 1 (VR 2 ) set for the first 60 Hz vertical synchronization signal, and when the vertical synchronization signal of 50 Hz is input, the 60 Hz. In contrast to the case of the output terminal of the comparator (OP 1 ) is a low potential A diode (D 4) is turned on, so that in the diode (D 4) of the variable resistor (VR 3) (VR 4) and the diode flows the current variable resistance through (D 4) (VR 3) connected to the The base potential of the transistor TR 1 is lowered so that the vertical oscillation frequency obtained from the emitter thereof is automatically adjusted according to the 50Hz vertical synchronous signal input. As described above, the vertical size becomes larger than that of 60Hz. Since a current flows through the variable resistor VR 4 connected to the variable resistor VR 2 , the vertical size is automatically adjusted to a predetermined value by setting the value of the variable resistor VR 4 .
이상에서 설명한 바와 같이 본 고안은 수직편향회로에서 입력수직동기신호의 주파수가 50Hz/60Hz로 됨에 따라 수직발진주파수 조절용 가변저항 및 수직크기 조절용 가변저항의 값이 달라지게 함으로써 해당 주파수의 수직 동기신호에 맞는 수직발진주파수 및 수직크기를 자동으로 조절되어 수동으로 주파수 선택을 조정하는 불편함을 해결하게 되고, 또한 회로의 일원화로 회로 구성의 간략화 및 원가절감의 효과가 있게 된다.As described above, according to the present invention, as the frequency of the input vertical synchronization signal becomes 50 Hz / 60 Hz in the vertical deflection circuit, the value of the variable resistor for vertical oscillation frequency adjustment and the variable resistor for vertical size adjustment is changed to the vertical synchronization signal of the corresponding frequency. The correct vertical oscillation frequency and the vertical size are automatically adjusted to solve the inconvenience of manually adjusting the frequency selection, and the unification of the circuit has the effect of simplifying the circuit configuration and reducing the cost.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019860007451U KR900002600Y1 (en) | 1986-05-27 | 1986-05-27 | Vertical oscilliation frequency and magnitude automatic control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019860007451U KR900002600Y1 (en) | 1986-05-27 | 1986-05-27 | Vertical oscilliation frequency and magnitude automatic control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR870019240U KR870019240U (en) | 1987-12-28 |
| KR900002600Y1 true KR900002600Y1 (en) | 1990-03-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019860007451U Expired KR900002600Y1 (en) | 1986-05-27 | 1986-05-27 | Vertical oscilliation frequency and magnitude automatic control circuit |
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| Country | Link |
|---|---|
| KR (1) | KR900002600Y1 (en) |
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1986
- 1986-05-27 KR KR2019860007451U patent/KR900002600Y1/en not_active Expired
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| Publication number | Publication date |
|---|---|
| KR870019240U (en) | 1987-12-28 |
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