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KR900001910Y1 - Digital Power Pack - Google Patents

Digital Power Pack Download PDF

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Publication number
KR900001910Y1
KR900001910Y1 KR2019850014474U KR850014474U KR900001910Y1 KR 900001910 Y1 KR900001910 Y1 KR 900001910Y1 KR 2019850014474 U KR2019850014474 U KR 2019850014474U KR 850014474 U KR850014474 U KR 850014474U KR 900001910 Y1 KR900001910 Y1 KR 900001910Y1
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South Korea
Prior art keywords
voltage
diode
transformer
line
terminal
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KR2019850014474U
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KR870009043U (en
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차영환
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삼성전자주식회사
정재은
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/12—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/16—Means for providing current step on switching, e.g. with saturable reactor

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

내용 없음.No content.

Description

디지탈용 파워 팩Digital Power Pack

제1도는 1점 쇄선으로된 본 고안 회로(A)를 장착한 파워 트랜스.1 is a power transformer equipped with the present invention circuit (A) of a one-dot chain line.

제2도는 제1도에서 1점 쇄선으로된 본 고안 회로(A)의 상세도.2 is a detailed view of the circuit (A) of the present invention made with a dashed-dotted line in FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 디지탈용 파워 팩 B : 자동전압 장치1: Digital Power Pack B: Automatic Voltage Device

C : 정류장치 D1-D6: 다이오드C: stop D 1 -D 6 : diode

R1-R4: 저항 ZD : 제너다이오드R 1 -R 4 : Resistor ZD: Zener Diode

SCR : 다리스터 Q : 트랜지스터SCR: Darster Q: Transistor

C1, C2: 콘덴서 T : 트랜스 포머C 1 , C 2 : Condenser T: Transformer

본 고안은 디지탈용 파워 팩에 관한 것으로, 특히 디지탈 회로 동작시 동작에 필요한 전압과 전류를 신속히 공급할 수 있는 회로에 관한 것이다.The present invention relates to a digital power pack, and more particularly, to a circuit capable of quickly supplying a voltage and a current required for operation in a digital circuit operation.

종래의 트랜스 포머는 전류 공급이 신속하지 않아 리플 전압이 강하고 디지탈 동작에 급격히 많은 전류를 공급할 수 없어서 디지탈 동작에서 오동작을 하는 결점이 있었다.Conventional transformers have the drawback of malfunctioning in digital operation because the current supply is not fast and the ripple voltage is strong and the current cannot be supplied rapidly to the digital operation.

따라서 본 고안의 목적은 디지탈 동작에서 급격히 요구되는 전류를 신속하게 공급하며 또한 리플전압이 적은 전류를 공급하여 디지탈 동작에서 오동작을 방지할 수 있는 회로를 제공하는데 있다.Accordingly, an object of the present invention is to provide a circuit capable of quickly supplying a current rapidly required in digital operation and also preventing a malfunction in digital operation by supplying a current having a low ripple voltage.

이하 첨부된 도면에 의거 본 고안의 실시에를 상세히 설명한다.Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

트랜스포머(T)2차측 b와 c단자 사이에 다이오드(D1), (D2)를 연결하고, 상기 다이오드(D1), (D2)사이에서 그라운드(GROUND)선을 인출하고, 트랜스 포머(T) 2차측 a와 이단자 사이에 다이오드(D3), (D4)와 다이오드(D5), (D6)를 병렬로 연결시키고, 상기 다이오드(D3)와 다이오드(D4)사이에 다리스터(SCR)의 캐소우드 단자를 연결한다.A transformer (T) diode between the secondary side b and c terminal (D 1), (D 2 ) for connection, and the diode (D 1), the ground (GROUND) draw a line, and the transformer between (D 2) (T) A diode (D 3 ), (D 4 ) and diodes (D 5 ), (D 6 ) are connected in parallel between the secondary side a and two terminals, and between the diode (D 3 ) and the diode (D 4 ). Connect the cathode terminal of the Darster (SCR) to the

그리고 다이오드(D5)와 다이오드(D6)사이에 직류전압선(VD)을 인출한다. 상기의 직류전압선(VD)과 그라운드선 사이의 저항(R1, R2), 가변저항(VR)을 연결시키며, 상기 가변저항(VR)에는 제너다이오드(ZD)와 트랜지스(Q)의 베이스 단자를 연결하고, 트랜지스터(Q)의 에미터단자와 다리스터(SCR)의 캐소우드 단자를 서로 연결시키고, 상기 트랜지스터(Q)의 콜렉터 단자가 저항(R4)을 거쳐 직류전압선(VD)에 연결한다.The DC voltage line VD is drawn between the diode D 5 and the diode D 6 . The resistors R 1 and R 2 and the variable resistor VR are connected between the DC voltage line VD and the ground line, and the base of the zener diode ZD and the transistor Q is connected to the variable resistor VR. Terminals are connected, and the emitter terminal of the transistor Q and the cathode terminal of the darster SCR are connected to each other, and the collector terminal of the transistor Q is connected to the DC voltage line VD through the resistor R 4 . Connect.

그리고 상기 제너다이오드(ZD)와 트랜지스터(Q) 베이스 단자 사이에 저항(R3)을 연결하여 다리스터(SCR)의 캐소우드단자에 연결시키며, 트랜지스터(Q)의 콜렉터 단자와 다리스터(SCR)의 케이트 단자를 서로 연결시킨다.The resistor R 3 is connected between the zener diode ZD and the transistor Q base terminal to be connected to the cathode terminal of the legistor SCR, and the collector terminal of the transistor Q and the legistor SCR. Connect the gate terminals of each other.

한편, 다리스터(SCR)의 애노우드 단자에 그라운드선을 연결심과 동시에 콘덴서(C1)를 거쳐 직류전압선(VD)에 연결한다. 또한 트랜지스터(T)의 2차측 e단자에 그라운드선 및 콘덴서(C2)를 연결하여 직류 전압선에 접속시킨다. 아울러 트랜스포머(T)의 2차측 f단자에는 교류전압선(VA)을 인출하여 구성한다.On the other hand, the ground line is connected to the anode terminal of the Darster (SCR) and the DC line (VD) via the capacitor (C 1 ) at the same time. In addition, a ground line and a capacitor C 2 are connected to the secondary terminal e of the transistor T so as to be connected to a DC voltage line. In addition, the secondary voltage f terminal of the transformer T is formed by drawing out the AC voltage line VA.

이와 같은 구성에서, 다이오드(D1)와 다이오드(D2)의 캐소우드 단자 폭에서는 트랜스 포머(T)에 의해 각각 낮은 잠압의 교류가 발생되나 이 교류 전압은 상기 다이오드(D1), (D2)가 서로 역방향으로 구성되어 있으므로 각각의 애노우드 단자에는 교류전압이 인가되지 않아 그라운드선이 부동상태(FLOATING)로 된다.In such a configuration, in the cathode terminal widths of the diodes D 1 and D 2 , a low latent alternating current is generated by the transformer T, respectively, but the alternating voltages are the diodes D 1 , D (D). 2 ) are composed in the opposite direction to each other, the AC voltage is not applied to each anode terminal, and the ground line is floating.

따라서 부동상태의 그라운드선이 교류전압선(VD)의 그라운드 선으로도 사용이 된다.Therefore, the floating ground line is also used as the ground line of the AC voltage line VD.

한편, 다이오드(D3)의 캐소우드 단자에 유기되는 교류 전압은 다이오드(D5)를 통하여 직류전압선(VD)으로 정류된 전압이 인가되고, 다이오드(D4)의 캐소우드 단자에 유기되는 교류전압은 다이오드(D6)을 통하여 직류 전압선(VD)으로 정류된다.On the other hand, the AC voltage induced in the cathode terminal of the diode D 3 is applied to the rectified voltage to the DC voltage line VD through the diode D 5 , and the AC voltage induced in the cathode terminal of the diode D 4 . The voltage is rectified to the DC voltage line VD through the diode D 6 .

즉, 다이오드(D3), (D4)의 애노우드 단자에는 마이너스(-)전압이 유기되며, 다이오드(D5), (D6)의 캐소우드 단자에는 플러스(+)전압이 유기된다.That is, a negative voltage is induced at the anode terminals of the diodes D 3 and D 4 , and a positive voltage is induced at the cathode terminals of the diodes D 5 and D 6 .

따라서 다이오드(D5), (D6)의 캐소우드 단자에 유기된 플러스(+)전압은 약간의 리플(RIPPLE)전압을 가지고 있어서 트랜지스터(Q)에 의해서 구동되는 적은 전류에 의해 다리스터(SCR)가 많은 전류를 구동하게 하여 콘덴서(C1), (C2)에 충전되는 전압의 시정수가 빨라져서 리플전압을 약하게 한다.Therefore, the positive voltage induced at the cathode terminals of the diodes D 5 and D 6 has a slight RIPPLE voltage, so that a small current driven by the transistor Q causes the legistor SCR. ) Drives a lot of current, and the time constant of the voltage charged in the capacitors (C 1 ) and (C 2 ) becomes faster, thereby reducing the ripple voltage.

그리고 저항(R1)(R2), 가변저항(VR)은 트랜지스터(Q)의 베이스 전압을 결정하는데 사용되는 것으로 트랜스 포머(T)의 2차측 전압이 어느 일정수준에 도달하기 전에는 출력측에 전압을 공급할 수 없도록 한 것이며, 제너다이오드(ZD)는 트랜지스터(Q)의 안정한 전압을 공급한다.The resistors R 1 (R 2 ) and the variable resistors VR are used to determine the base voltage of the transistor Q. Before the secondary voltage of the transformer T reaches a certain level, the voltage is applied to the output side. The zener diode ZD supplies a stable voltage of the transistor Q.

상술한 바와 같이 본 고안에 의하면. 직류와 교류전압이 3선에 의해서 전달되며, 디지탈 회로 동작시 급격히 요구되는 전압과 전류를 신속히 공급할 수 있으며, 리플 전압이 약한 전압을 출력할 수 있는 이점이 있다.According to the present invention as described above. DC and AC voltages are transmitted by three wires, which can rapidly supply a rapidly required voltage and current in digital circuit operation, and can output a voltage having a weak ripple voltage.

Claims (1)

트랜스포머(T)의 2차측에 연결된 직류전압선(VD), 그라운드(GROUND) 교류전압선(VA)에 인가된 전압을 정류 하기 위하여 트랜스 포머(T)의 2차측 각단자 사이에 연결된 다이오드(D1-D6)와, 트랜스포머(T)의 2차측 전압이 어느 일정 수준에 도달하기 전에는 출력측에 전압을 공급할 수 없도록 하는 저항(R1-R4), 가변저항(VR), 제너다이오드(ZD) 트랜지스터(Q)와, 출력측에 인가된 전압의 리플을 제거하는 다리스터(SCR), 콘덴서(C1), (C2)등을 포함하여 이루어지는 디지탈용 파워 팩.DC voltage line (VD) connected to the secondary side of the transformer (T), a diode (D 1-) connected between each terminal of the secondary side of the transformer (T) to rectify the voltage applied to the AC voltage line (VA). D 6 ) and resistors (R 1- R 4 ), variable resistors (VR), zener diode (ZD) transistors, which prevent the supply of voltage to the output side until the secondary voltage of the transformer T reaches a certain level. A digital power pack comprising (Q) and a darster (SCR), a condenser (C 1 ), (C 2 ), etc. for removing ripple of a voltage applied to the output side.
KR2019850014474U 1985-11-01 1985-11-01 Digital Power Pack Expired KR900001910Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019850014474U KR900001910Y1 (en) 1985-11-01 1985-11-01 Digital Power Pack

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019850014474U KR900001910Y1 (en) 1985-11-01 1985-11-01 Digital Power Pack

Publications (2)

Publication Number Publication Date
KR870009043U KR870009043U (en) 1987-06-15
KR900001910Y1 true KR900001910Y1 (en) 1990-03-10

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Application Number Title Priority Date Filing Date
KR2019850014474U Expired KR900001910Y1 (en) 1985-11-01 1985-11-01 Digital Power Pack

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KR870009043U (en) 1987-06-15

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