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KR900008697A - 반도체 웨이퍼 제조방법 - Google Patents

반도체 웨이퍼 제조방법

Info

Publication number
KR900008697A
KR900008697A KR1019890016068A KR890016068A KR900008697A KR 900008697 A KR900008697 A KR 900008697A KR 1019890016068 A KR1019890016068 A KR 1019890016068A KR 890016068 A KR890016068 A KR 890016068A KR 900008697 A KR900008697 A KR 900008697A
Authority
KR
South Korea
Prior art keywords
semiconductor wafer
wafer manufacturing
manufacturing
semiconductor
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
KR1019890016068A
Other languages
English (en)
Other versions
KR0144461B1 (ko
Inventor
아쯔오 야기
다께시 마쯔시따
마꼬또 하시모또
Original Assignee
소니 가부시끼 가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP28459088A external-priority patent/JP2689536B2/ja
Priority claimed from JP830089A external-priority patent/JPH02188968A/ja
Application filed by 소니 가부시끼 가이샤 filed Critical 소니 가부시끼 가이샤
Publication of KR900008697A publication Critical patent/KR900008697A/ko
Application granted granted Critical
Publication of KR0144461B1 publication Critical patent/KR0144461B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H10P52/00
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/014Manufacture or treatment of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors
    • H10P54/00
    • H10P90/1914
    • H10P95/062
    • H10W10/181
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/40FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/43FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 1D charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/012Bonding, e.g. electrostatic for strain gauges
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/135Removal of substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/97Specified etch stop material
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/977Thinning or removal of substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1019890016068A 1988-11-09 1989-11-07 반도체 웨이퍼 제조방법 Expired - Fee Related KR0144461B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP284590 1988-11-09
JP28459088A JP2689536B2 (ja) 1988-11-09 1988-11-09 半導体ウエハの製造方法
JP830089A JPH02188968A (ja) 1989-01-17 1989-01-17 半導体装置及びその製造方法
JP8300 1989-01-17

Publications (2)

Publication Number Publication Date
KR900008697A true KR900008697A (ko) 1990-06-03
KR0144461B1 KR0144461B1 (ko) 1998-08-17

Family

ID=26342793

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890016068A Expired - Fee Related KR0144461B1 (ko) 1988-11-09 1989-11-07 반도체 웨이퍼 제조방법

Country Status (4)

Country Link
US (1) US5051378A (ko)
EP (1) EP0368584B1 (ko)
KR (1) KR0144461B1 (ko)
DE (1) DE68927871T2 (ko)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5071792A (en) * 1990-11-05 1991-12-10 Harris Corporation Process for forming extremely thin integrated circuit dice
JPH046875A (ja) * 1990-04-24 1992-01-10 Mitsubishi Materials Corp シリコンウェーハ
DE69127582T2 (de) * 1990-05-18 1998-03-26 Fujitsu Ltd Verfahren zur Herstellung eines Halbleitersubstrates und Verfahren zur Herstellung einer Halbleiteranordnung unter Verwendung dieses Substrates
US5238865A (en) * 1990-09-21 1993-08-24 Nippon Steel Corporation Process for producing laminated semiconductor substrate
US5234846A (en) * 1992-04-30 1993-08-10 International Business Machines Corporation Method of making bipolar transistor with reduced topography
US5334281A (en) * 1992-04-30 1994-08-02 International Business Machines Corporation Method of forming thin silicon mesas having uniform thickness
US5258318A (en) * 1992-05-15 1993-11-02 International Business Machines Corporation Method of forming a BiCMOS SOI wafer having thin and thick SOI regions of silicon
US5324687A (en) * 1992-10-16 1994-06-28 General Electric Company Method for thinning of integrated circuit chips for lightweight packaged electronic systems
US5264395A (en) * 1992-12-16 1993-11-23 International Business Machines Corporation Thin SOI layer for fully depleted field effect transistors
US5436173A (en) * 1993-01-04 1995-07-25 Texas Instruments Incorporated Method for forming a semiconductor on insulator device
US5733175A (en) 1994-04-25 1998-03-31 Leach; Michael A. Polishing a workpiece using equal velocity at all points overlapping a polisher
US5607341A (en) 1994-08-08 1997-03-04 Leach; Michael A. Method and structure for polishing a wafer during manufacture of integrated circuits
US5577309A (en) * 1995-03-01 1996-11-26 Texas Instruments Incorporated Method for forming electrical contact to the optical coating of an infrared detector
JP3552427B2 (ja) * 1996-11-18 2004-08-11 株式会社日立製作所 半導体装置の研磨方法
DE19840421C2 (de) * 1998-06-22 2000-05-31 Fraunhofer Ges Forschung Verfahren zur Fertigung von dünnen Substratschichten und eine dafür geeignete Substratanordnung
JP4316186B2 (ja) 2002-04-05 2009-08-19 シャープ株式会社 半導体装置及びその製造方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4139401A (en) * 1963-12-04 1979-02-13 Rockwell International Corporation Method of producing electrically isolated semiconductor devices on common crystalline substrate
US3407479A (en) * 1965-06-28 1968-10-29 Motorola Inc Isolation of semiconductor devices
US3844858A (en) * 1968-12-31 1974-10-29 Texas Instruments Inc Process for controlling the thickness of a thin layer of semiconductor material and semiconductor substrate
US3623218A (en) * 1969-01-16 1971-11-30 Signetics Corp Method for determining depth of lapping of dielectrically isolated integrated circuits
US3683491A (en) * 1970-11-12 1972-08-15 Carroll E Nelson Method for fabricating pinched resistor semiconductor structure
US3755012A (en) * 1971-03-19 1973-08-28 Motorola Inc Controlled anisotropic etching process for fabricating dielectrically isolated field effect transistor
US4501060A (en) * 1983-01-24 1985-02-26 At&T Bell Laboratories Dielectrically isolated semiconductor devices
JPS61154142A (ja) * 1984-12-27 1986-07-12 Mitsubishi Electric Corp 半導体装置の製造方法
JPS61159738A (ja) * 1985-01-08 1986-07-19 Oki Electric Ind Co Ltd 誘電体分離基板の研摩方法
JPS6248040A (ja) * 1985-08-28 1987-03-02 Nec Corp 絶縁分離基板及びその製造方法
US4944836A (en) * 1985-10-28 1990-07-31 International Business Machines Corporation Chem-mech polishing method for producing coplanar metal/insulator films on a substrate
JPS6356936A (ja) * 1986-08-27 1988-03-11 Nec Corp 半導体装置の製造方法
US4735679A (en) * 1987-03-30 1988-04-05 International Business Machines Corporation Method of improving silicon-on-insulator uniformity
JPS63250838A (ja) * 1987-04-08 1988-10-18 Oki Electric Ind Co Ltd 誘電体分離基板の製造方法
JPS63299359A (ja) * 1987-05-29 1988-12-06 Matsushita Electronics Corp 半導体装置
US4874463A (en) * 1988-12-23 1989-10-17 At&T Bell Laboratories Integrated circuits from wafers having improved flatness

Also Published As

Publication number Publication date
KR0144461B1 (ko) 1998-08-17
EP0368584A3 (en) 1993-02-03
DE68927871D1 (de) 1997-04-24
EP0368584B1 (en) 1997-03-19
US5051378A (en) 1991-09-24
DE68927871T2 (de) 1997-07-03
EP0368584A2 (en) 1990-05-16

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