KR20160020156A - Signal control chip and switching device comprising the same - Google Patents

Abstract

A signal control chip and a switching device including the same are provided. The switching device includes a switch including a first terminal and a second terminal, a first set signal generating part connected to the first terminal, the output of which is determined based on the voltage of the first terminal, a second set signal generating part connected to the second terminal, A second set signal generator for determining an output based on a direction of a current flowing through a sensing resistor connected to the terminal, and a signal determination unit for generating a gate signal for controlling the gate of the switch using the outputs of the first and second set signal generators .

Description

Technical Field [0001] The present invention relates to a signal control chip and a switch device including the signal control chip,

The present invention relates to a signal control chip and a switching device including the same.

The buck converter is a step-down DC-DC converter. The buck converter operates in a variety of ways such as Discontinuous Conduction Mode (DCM), Boundary Conduction Mode (BCM), and Continuous Conduction Mode (CCM), depending on the current flowing in the inductor. It can be divided into three.

U.S. Published Patent Application No. US2014-0009080 (published on Apr. 2014, 09)

A problem to be solved by the present invention is to perform ZCD (zero current detection) using a drain voltage of a transistor and a voltage of a current sensing resistor connected to a source of the transistor, A signal to turn on the switching device).

Another problem to be solved by the present invention is to provide a signal control chip that performs ZCD using a drain voltage of a transistor and a voltage of a current sensing resistor connected to a source of the transistor, and controls a set signal of the transistor through the ZCD.

The problems to be solved by the present invention are not limited to the above-mentioned problems, and other matters not mentioned can be clearly understood by those skilled in the art from the following description.

According to an aspect of the present invention, there is provided a switching device including a switch including a first terminal and a second terminal, a switch connected to the first terminal and configured to output a first set based on a voltage of the first terminal, And a second set signal generator and an output of the first and second set signal generator, the output of which is determined based on a direction of a current flowing through a sensing resistor connected to the second terminal, And a signal determination unit for generating a gate signal for controlling the gate of the switch.

The second set signal generator includes a sensing resistor, a current source connected to the sensing resistor and controlled by a current flowing in the sensing resistor, a diode connected between the current source and the cathode and having a ground and an anode connected to each other, . ≪ / RTI >

When the voltage of the diode becomes the forward voltage by the current source, the first comparator can output the first state.

When the voltage of the diode becomes the reverse voltage or zero by the current source, the first comparator can output the second state different from the first state.

The first set signal generator may include a second comparator connected to the first terminal.

When the voltage of the first terminal becomes zero, the second comparator can output the first state.

When the second comparator outputs the first state, a set signal for turning on the switch may be generated.

An inductive element connected to the first terminal and having a current controlled in accordance with the turn-on or turn-off of the switch, an output load connected to the inductive element, and an input power source connected to the output load, When the voltage is less than 1/2 times the input power source voltage, the second comparator outputs a second state different from the first state, and the input power source voltage may be the voltage of the input power source.

The first set signal generator includes a second comparator connected to the first terminal, and the signal determiner includes an OR gate connected to the first and second comparators, wherein one of the first and second comparators is in a first state When outputting, a set signal for turning on the switch can be generated.

The signal determination unit may further include an AND gate connected to the OR gate, and a signal selector connected to the AND gate and generating a gate signal controlling the gate of the switch.

Further comprising a reset signal generator coupled to the signal selector and providing a reset signal for turning off the switch, wherein the gate signal is selected such that the AND gate outputs a first state and the reset signal generator generates a second The first state can be obtained when the state signal is outputted and the second state when the reset signal generator outputs the first state.

According to another aspect of the present invention, there is provided a signal control chip for turning on / off a switch for controlling a current flowing through an inductive element, the signal control chip including a sensing resistor connected to a first terminal of the switch, ; A current source connected to the first terminal and controlled by a current flowing in the sensing resistor; A diode connected to the current source; A first comparator coupled to the diode; A second comparator connected to a second terminal different from the first terminal of the switch, and a signal selector connected to the first and second comparators and for turning on / off the switch.

The signal selector may generate a gate signal for turning on the switch when the first or second comparator outputs the first state.

The first comparator can output the first state when the direction of the current flowing through the sensing resistor is changed.

The second comparator may output the first state when the voltage of the first terminal is changed to zero.

Other specific details of the invention are included in the detailed description and drawings.

The switching device according to an embodiment of the present invention can perform ZCD (zero current detection) using the voltage of the current sensing resistor connected to the source terminal of the transistor and the voltage of the drain terminal of the transistor. Accordingly, the switching device can eliminate the reverse recovery loss (RRL) of the catch diode and minimize the switching loss of the transistor, that is, the turn-on loss, thereby improving the operation efficiency. That is, the switching device senses when the current flowing in the current sensing resistor changes direction or when the drain voltage becomes zero, and when the output load voltage is larger or smaller than 1/2 times the input power source voltage, The transistor can be turned on.

1 is a block diagram illustrating a switching device according to an embodiment of the present invention.
Figure 2 is an exemplary block diagram of part A of Figure 1;
3 is an exemplary conceptual diagram of the signal determination unit of FIG.
4 is an exemplary circuit diagram of part A of Fig.
5 is an example of a timing diagram corresponding to the circuit diagram of Fig.
6 is another example of a timing chart corresponding to the circuit diagram of Fig.
Figs. 7 to 9 each show examples of the application circuit portion of Fig.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and the manner of achieving them, will be apparent from and elucidated with reference to the embodiments described hereinafter in conjunction with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification.

One element is referred to as being "connected to " or " coupled to " another element, either directly connected to or coupled to another element, . On the other hand, when one element is referred to as "directly connected to" or "directly coupled to" another element, it does not intervene another element in the middle. Like reference numerals refer to like elements throughout the specification. "And / or" include each and every combination of one or more of the mentioned items.

Although the first, second, etc. are used to describe various elements, components and / or sections, it is needless to say that these elements, components and / or sections are not limited by these terms. These terms are only used to distinguish one element, element or section from another element, element or section. Therefore, it goes without saying that the first element, the first element or the first section mentioned below may be the second element, the second element or the second section within the technical spirit of the present invention.

The terminology used herein is for the purpose of illustrating embodiments and is not intended to be limiting of the present invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. It is noted that the terms "comprises" and / or "comprising" used in the specification are intended to be inclusive in a manner similar to the components, steps, operations, and / Or additions.

Unless defined otherwise, all terms (including technical and scientific terms) used herein may be used in a sense commonly understood by one of ordinary skill in the art to which this invention belongs. Also, commonly used predefined terms are not ideally or excessively interpreted unless explicitly defined otherwise.

Hereinafter, a switching device according to an embodiment of the present invention will be described with reference to FIGS. 1 to 6. FIG.

1 is a block diagram illustrating a switching device according to an embodiment of the present invention.

Referring to FIG. 1, a switching device 1 according to an embodiment of the present invention may include a switch 20, a signal control circuit 100, a catch diode 19, and the like. In the present invention, the switch 20 may comprise, for example, a transistor. However, for convenience of explanation, it is assumed that the switch 20 is a transistor.

The switching device (1) is electrically connected to the application circuit part (10). The switching device 1 can control the current flowing in the inductive element 15 located in the application circuit part 10. [ Here, the application circuit portion 10 can be any circuit capable of including the inductive element 15, for example, a buck converter, a light device, a power transformer, have. The application circuit portion 10 may include, for example, an output load 13 connected to the input power source 11, an inductive element 15 connected to the output load 13, and the like. The output load 13 may be, for example, a resistor or an LED. One terminal of the inductive element 15 may be connected to the output load 13 and the other terminal may be connected to the switch 20. [

One terminal of the catch diode 19 may be connected to the switch 20 and the other terminal may be connected between the input power source 11 and the output rod 13. The catch diode 19 is also referred to as a flyback diode, a freewheeling diode, a snubber diode, a suppressor diode, a clamp diode, and the like. That is, the catch diode 19 generates a continuous loop so that the current flowing in the inductor 15 can be extinguished even when the switch 20 is turned off. That is, after the switch 20 is turned off, the current is consumed while continuing to flow through the catch diode 19, the output load 13, and the inductive element 15.

The switch 20 can be connected to the inductive element 15.

Specifically, for example, the switch 20 may comprise a transistor. The switch 20 may be a transistor including a first terminal 21 and a second terminal 22 and the second terminal 22 may be a transistor including a catch diode 19 and an inductive element 15, And the first terminal 21 may be connected to the ground.

Also, the first terminal 21 and the second terminal 22 may be connected to the signal control circuit 100.

In addition, the first terminal 21 may be a source terminal and the second terminal 22 may be a drain terminal.

The signal control circuit 100 may be connected to both ends of the switch 20. [ Also, the signal control circuit 100 may be implemented with at least one signal control chip.

Specifically, the signal control circuit 100 can be connected to both ends of the switch 20, that is, to the drain terminal and the source terminal, and can receive the reset signal RST from the oscillator 40. [

The oscillator 40 periodically turns off the switch 20 by providing the signal control circuit 100 with a reset signal RST in the form of a periodic pulse of a predetermined frequency. Here, the oscillator 40 may be, for example, a reset signal generating unit.

When the direction of the current flowing in the second terminal 22 of the switch 20 or the direction of the current flowing in the sensing resistor 112 in FIG. 4 connected to the first terminal 21 is changed, (20) is turned on, and a detailed description thereof will be described later.

Figure 2 is an exemplary block diagram of part A of Figure 1;

Referring to FIG. 2, the signal control circuit 100 may include a first set signal generator 110, a second set signal generator 130, and a signal determiner 150.

The first set signal generator 110 may be connected to the first terminal 21 (e.g., a source terminal) of the switch 20 and may provide an output to the signal determiner 150. The output of the first set signal generator 110 to the signal determiner 150 may be, for example, a first comparison signal VDI_COMP. The first comparison signal VDI_COMP may also include a first state (e.g., 1 or a high level) or a second state (e.g., 0 or a low level).

The second set signal generator 130 may be connected to the second terminal 22 (e.g., a drain terminal) of the switch 20 and may provide an output to the signal determiner 150. The output of the second set signal generator 130 to the signal determiner 150 may be, for example, a second comparison signal VDS_COMP. The second comparison signal VDS_COMP may also include a first state (e.g., 1 or a high level) or a second state (e.g., 0 or a low level).

The signal determination unit 150 receives an output (e.g., a first comparison signal VDI_COMP and a second comparison signal VDS_COMP) from the first and second set signal generating units 110 and 130, (E.g., a reset signal RST) from the signal determination unit 150. The signal determination unit 150 may also generate the gate signal GATE based on the provided signals.

Here, the gate signal GATE may be a signal for controlling the gate of the switch 20 to turn on / off the switch 20. [ The gate signal GATE may also include a first state (e.g., 1 or a high level) or a second state (e.g., 0 or a low level).

3 is an exemplary conceptual diagram of the signal determination unit of FIG.

Referring to FIG. 3, the signal determination unit 150 may include an OR gate 152, an AND gate 154, an inverter 156, and a signal selector 158.

The OR gate 152 receives the first comparison signal VDI_COMP and the second comparison signal VDS_COMP from the first set signal generator 110 and the second set signal generator 130, May provide a first state (1 or high level) or a second state (0 or low level).

That is, the output of the OR gate 152 (i.e., the first state or the second state) may be determined based on the first comparison signal VDI_COMP and the second comparison signal VDS_COMP.

AND gate 154 may be provided with an input from OR gate 152 and inverter 156 and may provide a set signal S to signal selector 158. [

In other words, the output of the AND gate 154 (i.e., the set signal S) may be determined based on the outputs of the OR gate 152 and the inverter 156. More specifically, the inverter 156 converts the supplied input (i.e., the reset signal RST) from the first state to the second state (e.g., from a high level to a low level or from a low level to a high level) . Thus, the set signal S may be determined based on the output of the OR gate 152 (i.e., the first state or the second state) and the reset signal RST.

The inverter 156 receives the reset signal RST from the oscillator 40 and can convert the state of the provided reset signal RST and provide the converted signal to the AND gate 154. [

For example, the inverter 156 converts the level of the reset signal RST supplied from the oscillator 40 to a low level when the level of the reset signal RST is a high level. When the level of the reset signal RST is a low level, . ≪ / RTI > The inverter 156 converts the reset signal RST supplied from the oscillator 40 to 0 when the reset signal RST is 1. When the reset signal RST is 0,

The signal selector 158 receives the reset signal RST and the set signal S from the oscillator 40 and the AND gate 154 and generates the gate signal GATE based on the supplied input.

Specifically, the output of the signal selector 158 (i.e., the gate signal GATE) may be determined based on the reset signal RST and the set signal S. The signal selector 158 may also include, for example, an SR latch.

4 is an exemplary circuit diagram of part A of Fig. 5 is an example of a timing diagram corresponding to the circuit diagram of Fig. 6 is another example of a timing chart corresponding to the circuit diagram of Fig.

4, the first set signal generator 110 includes a sensing resistor 112 connected to the first terminal 21 (for example, a source terminal), a current source 114 connected to the sensing resistor 112 A diode 118 connected to the current source 114 and a first comparator 120 connected to the diode 118. [

The sensing resistor 112 may be connected to the first terminal 21 of the switch 20, that is, the source terminal of the transistor.

Specifically, the sensing resistor 112 may be connected to the first terminal 21 of the switch 20 and the ground. The sensing resistor 112 may also be coupled to the current source 114 and the current flowing through the sensing resistor 112 may be used to control the current source 114.

The current source 114 may be connected to the sensing resistor 112.

Specifically, the current source 114 can be controlled by the current flowing through the sensing resistor 112. [ The current source 114 may be connected to the sensing resistor 112 in parallel.

That is, when the direction of the current flowing through the sensing resistor 112 is the first direction, the direction of the current source 114 is also the first direction, and the direction of the current flowing through the sensing resistor 112 is the second direction, Direction, the direction of the current source 114 may also be the second direction.

Diode 118 may be coupled to current source 114 and first comparator 120.

Specifically, the diode 118 may be connected in parallel with the first resistor 115, and a voltage equal to the voltage across the first resistor 115 may be applied to the diode 118. The cathode of the diode 118 may be connected to the current source 114 and the anode of the diode 118 may be connected to ground.

In addition, the direction of the diode voltage VDI can be determined according to the direction of the current flowing through the diode 118, and the first comparison signal VDI_COMP can be determined based on the direction of the diode voltage VDI, The description will be given later. Here, the diode voltage VDI means a voltage across both ends of the diode 118.

The first comparator 120 may be coupled to the diode 118.

Specifically, the first comparator 120 generates the first comparison signal VDI_COMP, and the first comparison signal VDI_COMP is determined based on the direction of the diode voltage VDI. The first comparison signal VDI_COMP may also be provided to the OR gate 152.

That is, the first comparison signal VDI_COMP becomes the first state when the diode voltage VDI becomes the forward voltage and becomes the second state when the diode voltage VDI becomes the reverse voltage. Here, the first state may include a high level or 1 and the second state may include a low level or zero. That is, the first state may include a low level or 0, and the second state may include a high level or 1.

Next, the second set signal generator 130 may include a second comparator 134 connected to the second terminal 22 (e.g., a drain terminal).

The second comparator 134 may be connected to the second terminal 22.

Specifically, the voltage (hereinafter, referred to as drain voltage VDS) of the second terminal 22 (for example, the drain terminal) is divided into second and third resistors 131 and 132, (134) may be determined based on the voltage across the third resistor (132). Here, the magnitude of the voltage applied to the third resistor 132 is determined based on the voltage of the second terminal 22 (for example, the drain terminal) (hereinafter, referred to as the drain voltage VDS) The voltage VDS will be mainly described.

The second comparator 134 may generate the second comparison signal VDS_COMP and the second comparison signal VDS_COMP may be determined based on the drain voltage VDS.

That is, the second comparator 134 can output the first state when the drain voltage VDS is changed from positive to zero. The second comparator 134 may also output the second state, except when the drain voltage VDS is changed from a positive voltage to zero. The first state and the second state are the same as those described above, and are omitted.

The second comparator 134 may also provide the second comparison signal VDS_COMP to the OR gate 152.

As a result, the signal determination unit 150 generates a gate signal GATE for turning on / off the switch 20 based on the first and second comparison signals VDI_COMP and VDS_COMP generated through the process described above can do.

In summary, the switching device 1 according to an embodiment of the present invention includes a diode voltage VDI connected to the source terminal of the switch 20 (i.e., transistor) and a drain voltage VDS of the drain terminal of the switch 20, Can be used to perform ZCD (zero current detection). Also, a gate signal (GATE) for turning on / off the switch 20 through ZCD (zero current detection) may be generated. That is, for example, the first comparator 120 senses when the diode voltage VDI changes from the reverse voltage to the forward voltage to perform the ZCD, and the second comparator 134 senses when the drain voltage VDS is positive The gate signal GATE can be controlled by detecting when the voltage is changed from 0 V to performing ZCD.

The operation of the switching device 1 based on the circuit diagram shown in Fig. 4 will be described below with reference to Figs. 5 and 6. Fig.

5 is a timing chart showing the operation of the switching device 1 when the output load voltage VOL is larger than 1/2 times the input power source voltage VIPS. Here, the output load voltage VOL means a voltage across both ends of the output load 13, and the input power source voltage VIPS means a voltage of the input power source 11.

Referring to Figs. 4 and 5, at time t1, as the gate signal GATE changes to a low level, the switch 20 is turned off. Therefore, the inductive current IIN begins to decrease. The drain voltage VDS may be the sum of the output load voltage VOL and the inductive voltage VIN. Here, the inductive voltage VIN means a voltage across both ends of the inductive element 15.

However, at time t2, the inductive current IIN becomes zero and freewheeling starts. That is, the inductive current IIN can alternately be a positive current or a negative current, centered at zero. In other words, the direction of the inductive current IIN can be changed alternately.

On the other hand, the drain voltage VDS decreases to 0 after time t2. Thereafter, while the inductive current IIN prewalls, the drain voltage VDS may alternately be zero or a positive voltage. Although not specifically shown, for example, the inductive current IIN and the drain voltage VDS may have a phase difference of 90 degrees. Therefore, after the inductive current IIN flows in the first direction and flows in the second direction different from the first direction (i.e., after a 90-degree phase difference), the drain voltage VDS can be zero. Further, after the inductive current IIN flows again in the first direction, the drain voltage VDS can be a positive voltage.

The second comparison signal VDS_COMP can be at a high level at a moment when the drain voltage VDS becomes 0 at time t3. 5, the second comparison signal VDS_COMP is shown to be at a high level once, but the second comparison signal VDS_COMP may be at a high level many times during the prewalling operation.

Then, in response to the second comparison signal VDS_COMP, at time t4 the set signal S may be enabled, for example, to a high level.

At time t5, in response to the set signal S, the gate signal GATE is enabled to the high level. Depending on the gate signal GATE, the switch 20 may be turned on

In addition, at the time t2, when the inductive current IIN is prewalking, the diode voltage VDI gradually increases as a reverse voltage, and gradually decreases from around the time t5. Then, at time t6, the diode voltage VDI is changed to the forward voltage, and the first comparison signal VDI_COMP can be brought into the high level state. The voltage that is converged while the diode voltage VDI is converted to the forward voltage may be the clamp voltage Vclamp, and the clamp voltage may be, for example, a negative voltage.

However, when the second comparison signal VDS_COMP becomes high level at time t3 and the first comparison signal VDI_COMP becomes high level at time t6, the switch 20 is already turned on.

When the gate signal GATE becomes low level by the reset signal RST of the oscillator 40 at time t7, the switch 20 can be turned off. Also, the diode voltage VDI may be zero, and the first comparison signal VDI_COMP may be low level.

That is, when the output load voltage VOL is larger than 1/2 times the input power source voltage VIPS, both the second terminal 22 and the diode 118 can sense a zero current. Therefore, when either the first comparison signal VDI_COMP or the second comparison signal VDS_COMP becomes a high level, a set signal S for turning on the switch 20 can be generated.

6 is a timing chart showing the operation of the switching device 1 when the output load voltage VOL is smaller than 1/2 times the input power source voltage VIPS. The difference from FIG. 5 will be mainly described.

Referring to Figs. 4 and 6, as the gate signal GATE changes to a low level at time t1, the switch 20 can be turned off. However, unlike FIG. 5, the inductive voltage VIN can be larger than in FIG. 5, since the output load voltage VOL is smaller than 1/2 times the input power source voltage VIPS. As a result, the drain voltage VDS does not become a negative voltage between times t2 and t6. Therefore, the second comparison signal VDS_COMP also maintains the low level.

In addition, at time t2, the inductive current IIN becomes zero, and at the time of prewalking, the voltage VDI of the diode gradually increases as the reverse voltage gradually decreases from near the time t3. Thereafter, at time t4, the voltage VDI of the diode is changed to the forward voltage, and the first comparison signal VDI_COMP becomes the high level.

5, when the second comparison signal VDS_COMP continues to be at the low level, the set signal S changes to the forward voltage after the diode voltage VDI is changed (= the first comparison signal VDI_COMP is at the high level state Becomes a high level at time t5.

Subsequently, at time t6, the gate signal GATE becomes a high level and the switch 20 can be turned on.

When the gate signal GATE becomes low level by the reset signal RST of the oscillator 40 at time t7, the switch 20 can be turned off. In addition, the diode voltage VDI may be zero, and the first comparison signal VDI_COMP may be low level.

That is, when the voltage VOL of the output load is smaller than 1/2 times the input power source voltage VIPS, a zero current can be sensed in the diode 118. [ Therefore, a set signal S for turning on the switch 20 can be generated when the first comparison signal VDI_COMP becomes a high level.

Referring to Table 1 below, the output of the OR gate 152 according to the first comparison signal VDI_COMP and the second comparison signal VDS_COMP is shown. Here, it is assumed that the first state is 1 and the second state is 0, for example.

<Table 1>

First, when the first comparison signal VDI_COMP is 1 and the second comparison signal VDS_COMP is 1, the OR gate 152 can output 1. Further, when the first comparison signal VDI_COMP is 1 and the second comparison signal VDS_COMP is 0, the OR gate 152 can output 1. When the first comparison signal VDI_COMP is 0 and the second comparison signal VDS_COMP is 1, the OR gate 152 can output 1. Further, the OR gate 152 can output 0 when the first comparison signal VDI_COMP is 0 and the second comparison signal VDS_COMP is 0.

The output of the OR gate 152 and the state of the reset signal RST according to the state of the reset signal RST and the state of the reset signal RST according to the state of the reset signal RST, The state of the gate signal GATE is shown. And the state of the switch 20 according to the state of the gate signal GATE is shown. Here, it is assumed that the first state is 1 and the second state is 0, for example.

As described above, since the inverter 156 is provided between the AND gate 154 and the oscillator 40, the reset signal RST can be converted and provided to the AND gate 154. That is, when the reset signal RST is 1, 0 is provided to the AND gate, and when the reset signal RST is 0, 1 can be provided to the AND gate.

<Table 2>

First, when the OR gate 152 outputs 1 and the reset signal RST is 1, the set signal S can be zero. Further, when the OR gate 152 outputs 1 and the reset signal RST is 0, the set signal S can be 1. Further, when the OR gate 152 outputs 0 and the reset signal RST is 1, the set signal S can be zero. When the OR gate 152 outputs 0 and the reset signal RST is 0, the set signal S can be 0 (zero).

In addition, when the set signal S is 0 and the reset signal RST is 1, the gate signal GATE can be zero. Further, when the set signal S is 1 and the reset signal RST is 0, the gate signal GATE can be 1. Further, when the set signal S is 0 and the reset signal RST is 1, the gate signal GATE can be zero. Further, when the set signal S is 0 and the reset signal RST is 0, the gate signal GATE can be zero.

Finally, when the gate signal GATE becomes 0, the switch 20 can be turned off. When the gate signal GATE becomes 1, the switch 20 can be turned on.

The switching device 1 according to the embodiment of the present invention is connected to a diode voltage VDI connected to the first terminal of the switch 20 (for example, the source terminal of the transistor) ZCD (zero current detection) can be performed using the drain voltage VDS of the drain terminal of the transistor (for example, the drain terminal of the transistor). Accordingly, the switching device 1 can improve the operation efficiency by eliminating the reverse recovery loss (RRL) of the catch diode 19 and minimizing the switching loss of the switch 20, that is, the loss upon turn-on. That is, the switching device 1 senses when the current flowing through the sensing resistor 112 changes direction or when the drain voltage VDS becomes 0, so that the output load voltage VOL becomes 1/2 times the input power It is possible to turn on the switch 20 appropriately both when it is greater than or smaller than the source voltage VIPS.

7 to 9 each show an example of the application circuit portion of Fig. Figure 7 is a buck converter, Figure 8 is a light device, and Figure 9 is a power transformer. 7 to 9 are merely illustrative.

7, the buck converter includes, for example, an output load 213 in the form of a resistor, and a capacitor 220 connected to both terminals of the output load 213. In addition, an inductive element 215 may be connected to one terminal of the output rod 213, and a diode 204 may be connected to the other terminal.

Referring to FIG. 8, the light device includes an output rod 213a including, for example, a plurality of LEDs. An inductive element 215 may be connected to one terminal of the output rod 213a, and a diode 204 may be connected to the other terminal of the output rod 213a.

Referring to FIG. 9, the power transformer 250 includes a primary winding 251 and a secondary winding 252. The input power source 211 is connected to the primary winding 251. The control diode 253 is connected to the secondary winding 252. The inductive element 215 may be connected to the control diode 253 and the output load 213b in the form of a resistor. An output filter capacitor 260 may be connected across the output load 213b. One terminal of the catch diode 204 is connected to a node between the inductive element 15 and the control diode 253 and the other terminal is connected to the node between the output load 213b and the secondary winding 252 Lt; / RTI &gt;

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, You will understand. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive.

10: Application circuit part 11: Input power source
13: output load 15: inductive element
20: switch 100: signal control circuit

Claims (15)

A switch including a first terminal and a second terminal;
A first set signal generator connected to the first terminal and having an output determined based on a voltage of the first terminal;
A second set signal generator connected to the second terminal and determining an output based on a direction of a current flowing through a sensing resistor connected to the second terminal; And
And a signal determination unit for generating a gate signal for controlling the gate of the switch by using the outputs of the first and second set signal generation units. The method according to claim 1,
Wherein the second set signal generator comprises:
The sensing resistor,
A current source connected to the sensing resistor and controlled by a current flowing in the sensing resistor,
A diode connected between the current source and the cathode and connected to the ground and the anode,
And a first comparator coupled to the diode. 3. The method of claim 2,
And the first comparator outputs a first state when the voltage of the diode becomes a forward voltage by the current source. The method of claim 3,
And the first comparator outputs a second state different from the first state when the voltage of the diode becomes a reverse voltage or zero by the current source. 3. The method of claim 2,
Wherein the first set signal generator comprises:
And a second comparator coupled to the first terminal. 6. The method of claim 5,
And the second comparator outputs a first state when the voltage of the first terminal becomes zero. The method according to claim 6,
And when the second comparator outputs the first state, a set signal for turning on the switch is generated. 6. The method of claim 5,
An inductive element connected to the first terminal, the current flowing in accordance with the turn-on or turn-off of the switch being controlled;
An output load coupled to the inductive element,
And an input power source coupled to the output load,
The second comparator outputs a second state different from the first state when the voltage of the output load is smaller than 1/2 the input power source voltage and the input power source voltage is a voltage of the input power source Switching device. 3. The method of claim 2,
Wherein the first set signal generator includes a second comparator connected to the first terminal,
Wherein the signal determining unit includes an OR gate connected to the first and second comparators,
And a set signal for turning on the switch is generated when either the first or second comparator outputs the first state. 10. The method of claim 9,
The signal determination unit may determine,
An AND gate connected to the OR gate,
Further comprising a signal selector coupled to the AND gate and generating a gate signal to control a gate of the switch. 11. The method of claim 10,
Further comprising a reset signal generator coupled to the signal selector and providing a reset signal to turn off the switch,
Wherein the gate signal comprises:
When the AND gate outputs the first state and the reset signal generator outputs a second state different from the first state,
And the second state when the reset signal generator outputs the first state. A signal control chip for turning on / off a switch for controlling a current flowing in an inductive element,
A sensing resistor coupled to a first terminal of the switch;
A current source connected to the first terminal and controlled by a current flowing in the sensing resistor;
A diode connected to the current source;
A first comparator coupled to the diode;
A second comparator coupled to a second terminal different from the first terminal of the switch; And
And a signal selector coupled to the first and second comparators, the signal selector turning on / off the switch. 13. The method of claim 12,
Wherein the signal selector generates a gate signal for turning on the switch when the first or second comparator outputs a first state. 13. The method of claim 12,
Wherein the first comparator outputs the first state when a direction of a current flowing through the sensing resistor is changed. 13. The method of claim 12,
And the second comparator outputs the first state when the voltage of the first terminal is changed to zero.

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