KR20080005741A - Stacked semiconductor package and semiconductor module having same - Google Patents

Abstract

Disclosed are a stack type semiconductor package having a passive element mounted on a printed circuit board, which is a reinforcing member for protecting a semiconductor package, and a semiconductor module having the same. Each stacked semiconductor package includes a plurality of unit chip packages in which semiconductor chips are mounted and stacked. A reinforcing member for protecting each semiconductor chip mounted in each unit chip package is arranged corresponding to the semiconductor chip of the unit chip package. Passive elements are mounted to the reinforcing member. The unit chip package disposed at the lowest of the plurality of unit chip packages and the printed circuit board are connected through a first connection terminal. The plurality of unit chip packages are stacked through a plurality of second connection terminals. The unit chip package and the reinforcement member disposed at the top of the plurality of unit chip packages are connected through a third connection terminal.

Description

Stacked semiconductor package and semiconductor module having the same {Stack semiconductor package and semiconductor module with the same}

1A is a plan view of a conventional semiconductor module.

1B is a cross-sectional view of a semiconductor module showing that a semiconductor package and a passive device are arranged on a conventional printed circuit board.

2 is a plan view of a semiconductor module according to an embodiment of the present invention.

3A illustrates a cross-sectional view of a semiconductor module in which a stacked semiconductor package is mounted on a printed circuit board according to an embodiment of the present invention.

FIG. 3B is a plan view illustrating capacitors arranged on the reinforcing member of the stacked semiconductor package of FIG. 3A.

4 is a cross-sectional view of a semiconductor module in which a stacked semiconductor package is mounted on a printed circuit board according to another exemplary embodiment of the present disclosure.

Explanation of symbols on the main parts of the drawings

20: printed circuit board 140, 240: lead layer

Unit chip package: 111, 113, 211, 213, 215, 217

150, 250: capacitors 121, 123: solder ball

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package and a semiconductor module having the same, and more particularly, to a stack type semiconductor package in which a passive element such as a capacitor is mounted on a printed circuit board, which is a reinforcing member Lid for protecting the semiconductor package. It relates to a semiconductor module.

Nowadays, electronic products such as portable PCs and portable telephones are tending to be thin and short, and accordingly, semiconductor products applied to the portable electronic products are becoming smaller and more versatile. In order to increase the capacity of a semiconductor product, the degree of integration of a unit semiconductor device should be increased. In order to increase the degree of integration of such a unit semiconductor device, a reduction in design rules, that is, fine pattern technology is required.

Recently, a multi-stack package (MSP) technology has been proposed, in which a plurality of unit semiconductor devices are stacked to form a single semiconductor package, thereby achieving high capacity of a semiconductor product. If a conventional semiconductor package is a technique for increasing the degree of integration in a two-dimensional plane, a multi-stack package is a technique for increasing the three-dimensional density is formed by stacking semiconductor elements perpendicular to the printed circuit board.

The multi-stack package can be implemented in various forms. For example, unit chip packages are stacked and then implemented as one multi-stack package through multi-stage wire bonding, or as another example, the unit chip packages are stacked using conductive solder balls. It can also be implemented as a ball grid array (BGA) multi-stack package.

Such a BGA type multi-stack package has an advantage of implementing a multi-stack package without complicated multi-stage wire bonding. Recently, a wBGA (wire bonding BGA) type multi-stack package in which a semiconductor chip is exposed among BGA type multi-stack packages has been in the spotlight.

1A illustrates a plan view of a semiconductor module having a conventional BGA type multi-stack package. FIG. 1B is a cross-sectional view illustrating a passive device and a semiconductor package mounted on a printed circuit board in the semiconductor module of FIG. 1A.

1A and 1B, a conventional semiconductor module includes a printed circuit board (PCB) 10. The printed circuit board 10 includes a first region 12 in which a semiconductor package is mounted, a second region 11 in which a capacitive passive element, for example, a capacitor is mounted, and a resistive passive element, for example, in which a resistor is mounted. The third area 13 is provided. In addition, the printed circuit board 10 includes a terminal portion 14 in which a plurality of pins are arranged for electrical connection with an electronic product.

The printed circuit board 10 has the terminal portion 14 inserted into and mounted on an electronic product, and has a first length L1 and a first height H1. The printed circuit board 10 has a second region 11 disposed above the first region 12, and the third region 13 is disposed above the first region 12. It is arranged under the 12. The semiconductor package 16 is mounted on the printed circuit board 10 through the solder ball 19 in the first region 12, and the capacitor 15 is respectively disposed in the second region 11 and the third region 13. And a resistor 17 is mounted.

In a conventional semiconductor module, a semiconductor package 16 is mounted at the center of the printed circuit board 10, and capacitors 15 and resistors 17 are arranged above and below the semiconductor package 16, respectively. Therefore, the height H1 of the printed circuit board is increased. Therefore, the height of the semiconductor module is increased while the semiconductor module having a smaller size is required, and there is a limit in reducing the size of the semiconductor module. In addition, since the capacitor 15 mounted on the semiconductor module is exposed, there is a problem in that it is damaged by the handling of the operator, resulting in product defects.

Accordingly, a technical object of the present invention is to provide a stack-type semiconductor package in which a passive element such as a capacitor is mounted on a printed circuit board which is a reinforcing member.

Another technical problem of the present invention is to provide a semiconductor module capable of reducing size and reducing defects by providing a stack-type semiconductor package mounted on a printed circuit board in which passive elements such as capacitors and the like are reinforced.

In order to achieve the above technical problem, the stacked semiconductor package of the present invention includes a plurality of unit chip packages in which semiconductor chips are mounted and stacked. A reinforcing member for protecting each semiconductor chip mounted in each unit chip package is arranged corresponding to the semiconductor chip of the unit chip package. Passive elements are mounted to the reinforcing member. The unit chip package disposed at the lowest of the plurality of unit chip packages and the printed circuit board are connected through a first connection terminal. The plurality of unit chip packages are stacked through a plurality of second connection terminals. The unit chip package and the reinforcement member disposed at the top of the plurality of unit chip packages are connected through a third connection terminal.

The reinforcing member includes a substrate made of iron, and the third connection terminal includes a plurality of solder balls.

One or more resistive elements or capacitive elements are arranged in the outer portion of the reinforcing member as the passive elements. The first connection terminal includes a plurality of solder balls. The plurality of second connection terminals each include a plurality of solder balls.

The semiconductor module of the present invention is a printed circuit board; A semiconductor package and a passive device are provided. The semiconductor package includes a plurality of unit chip packages stacked on the printed circuit board, each of which semiconductor chips are mounted, and a reinforcing member for protecting the semiconductor chips mounted on the unit chip packages. The reinforcing member includes a substrate with a forks. The semiconductor package may include a first connection terminal for connecting the unit chip package disposed at the lowest of the plurality of unit chip packages and the printed circuit board, and a plurality of second units for stacking the plurality of unit chip packages. A connecting terminal, and a third connecting terminal for connecting the unit chip package disposed on the uppermost of the plurality of unit chip packages and the reinforcing member. A passive element is mounted on the reinforcing member of the semiconductor package.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below. Embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and the like of the elements in the drawings are exaggerated to emphasize a more clear description, and the elements denoted by the same reference numerals in the drawings means the same elements.

2 is a plan view of a semiconductor module according to an embodiment of the present invention. Referring to FIG. 2, a semiconductor module of the present invention includes a printed circuit board 20. The printed circuit board 20 includes a first region 22 in which a semiconductor package is mounted and a second region 23 in which a resistive passive element, for example, a resistor is mounted. In addition, the printed circuit board 20 includes a terminal portion 24 in which a plurality of pins are arranged for electrical connection with an electronic product.

The printed circuit board 20 has the terminal portion 24 inserted into and mounted in an electronic product, and has a second length L2 and a second height H2. Since only the second area 23 is disposed below the first area 22 of the printed circuit board 20, the height H2 may be reduced. Compared with the conventional printed circuit board 10 of FIG. 1A, in the conventional printed circuit board 10, the first region 12, the second region 11, and the third region 13 are disposed, but FIG. The printed circuit board 20 has only the first region 22 and the second region 23.

Therefore, the printed circuit board 20 of FIG. 2 can reduce its height H2 by the second region 11 on which the capacitor 15 is mounted, compared to the printed circuit board 10 of FIG. 1A. Therefore, the height of the semiconductor module can be reduced by the height at which the capacitor 15 of FIG. 1A is mounted.

In the second region 23 of the printed circuit board 20, a resistor 17, which is a resistive passive element, is mounted, as shown in FIG. 1B, and the first region 22 is stacked semiconductor package 100 as shown in FIG. 3A. Is fitted. The capacitor 150, which is a capacitive passive element, is mounted to the semiconductor package 100 as shown in FIGS. 3A and 3B.

3A illustrates a cross-sectional view of a semiconductor module in which a stacked semiconductor package is mounted on the printed circuit board of FIG. 2. FIG. 3B illustrates a plan view of the reinforcing member of the stacked semiconductor package showing that the capacitor of FIG. 3A is mounted. The stacked semiconductor package illustrates a dual stack package (DSP) in which two unit chip packages are stacked.

2, 3A, and 3B, the semiconductor module includes a printed circuit board 20, a stack-type semiconductor package 100 mounted in a first region 22 of the printed circuit board 20, and passive devices. It is provided. The passive element may include a capacitive passive element mounted on the semiconductor package 100, for example, a capacitor 150 and a resistive load element mounted on the second region 23 of the printed circuit board 20. For example, it has a resistance.

The stacked semiconductor package 100 includes two unit chip packages 111 and 113, a reinforcing member 140, and a plurality of connection terminals 121, 123, and 125. The semiconductor chips 131 and 133 are mounted on the unit chip packages 111 and 113, respectively. The reinforcement member 140 has a capacitor 150 mounted on an outer portion of a portion 141 corresponding to the semiconductor chip 133 mounted on the unit chip package 113, and a third connection terminal ( 125) is arranged.

The reinforcing member 140 serves to protect the semiconductor chips 131 and 133 mounted on the unit chip packages 111 and 113 from the outside, and provides a printed circuit board (PCB) so that the passive elements can be mounted. It is preferable to provide. The capacitor 150 includes a decoupling capacitor to reduce power noise. An example in which the capacitor 150 is mounted on the reinforcing member 140 is not limited to FIGS. 3A and 3B, but may be variously arranged.

The first unit chip package 111 of the semiconductor package 100 is connected to the printed circuit board 20 through the first connection terminal 121, and the second unit chip package 111 is disposed on the first unit chip package 111. The second unit chip package 113 is mounted through a connection terminal 123. The second unit chip package 113 is connected to the reinforcing member 140 through the third connection terminal 125. The first to third connection means 121, 123, and 125 each have a plurality of solder balls.

4 illustrates a cross-sectional view of a semiconductor module in which a stacked semiconductor package is mounted on the printed circuit board of FIG. 2. The stacked semiconductor package illustrates a quadruple stack package (QSP) in which four unit chip packages are stacked.

2 and 4, the semiconductor module includes a printed circuit board 20, a stack-type semiconductor package 200 mounted in the first region 22 of the printed circuit board 20, and a passive element. . The passive element may be a capacitive passive element mounted on the semiconductor package 200, for example, a capacitor 250 and a resistive passive element mounted on the second region 23 of the printed circuit board 20. For example, it has a resistance.

The stacked semiconductor package 200 includes four unit chip packages 211, 213, 215, and 217, a reinforcing member 240, and a plurality of connection terminals 221, 223, 225, 227, and 229. Semiconductor chips 231, 233, 235, and 237 are mounted on the unit chip packages 211, 213, 215, and 217, respectively. The reinforcement member 240 has a capacitor 250 mounted to an outer portion of a portion corresponding to the semiconductor chip 237 mounted on the unit chip package 217 (corresponding to 141 of FIG. 3B), and the other outer portion of the reinforcement member 240. The fifth connecting terminal 229 is arranged.

The reinforcing member 240 serves to protect the semiconductor chips 231, 233, 235, and 237 mounted on the unit chip package 211, 213, 215, and 217 from the outside, and the passive element may be mounted. It is desirable to have a printed circuit board (PCB). The first unit chip package 211 of the semiconductor package 200 is connected to the printed circuit board 20 through the first connection terminal 221, and the second unit chip package 211 is disposed on the first unit chip package 211. The second to fourth unit chip packages 213, 215, and 217 are mounted through the fourth to fourth connection terminals 223, 225, and 227. The fourth unit chip package 217 is connected to the reinforcing member 240 through the fifth connection terminal 219. The first to fifth connection means 211, 213, 215, 217, and 219 are each provided with a plurality of solder balls.

The semiconductor package mounted on the semiconductor module of the present invention is not limited to the cross-sectional structures of FIGS. 3A and 4, but is applicable to all semiconductor packages having reinforcing members having printed circuit boards disposed thereon. In addition, it is possible to mount not only the capacitor but also other passive elements including a resistor to the reinforcing member of the semiconductor package.

As described in detail above, according to the semiconductor package and the semiconductor module having the same, the passive element is mounted on the reinforcement printed circuit board for protecting the semiconductor chip mounted on the semiconductor package, thereby increasing the height of the printed circuit board. As a result, the size of the semiconductor module can be reduced. The passive element may be mounted on the reinforcement printed circuit board to prevent the capacitor from falling off the printed circuit board due to the handling of the oppressor.

Although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above embodiments, and various modifications may be made by those skilled in the art within the scope of the technical idea of the present invention. .

Claims (12)

A plurality of unit chip packages each having semiconductor chips mounted thereon and stacked; Reinforcing members for protecting the semiconductor chips mounted in the unit chip packages; A passive element mounted to the reinforcing member; A first connection terminal for connecting the unit chip package disposed at the lowest of the plurality of unit chip packages with the printed circuit board; A plurality of second connection terminals for stacking the plurality of unit chip packages; And And a third connection terminal for connecting the unit chip package disposed at the top of the plurality of unit chip packages and the reinforcing member. The stack-type semiconductor package according to claim 1, wherein the reinforcing member comprises an iron substrate. The stack-type semiconductor package of claim 2, wherein the third connection terminal comprises a plurality of solder balls. The stack-type semiconductor package as claimed in claim 1, wherein at least one resistive element or capacitive element is arranged at an outer portion of the reinforcing member as the passive element. The stack type semiconductor package of claim 1, wherein the first connection terminal comprises a plurality of solder balls. The stack type semiconductor package of claim 1, wherein each of the plurality of second connection terminals comprises a plurality of solder balls. Printed circuit board; A plurality of unit chip packages stacked on the printed circuit board, each having a semiconductor chip mounted thereon, a reinforcing member for protecting each of the semiconductor chips mounted on the unit chip package, and disposed at a lowermost of the plurality of unit chip packages; A first connection terminal for connecting the unit chip package and the printed circuit board, a plurality of second connection terminals for stacking the plurality of unit chip packages, and a unit chip disposed on a top of the plurality of unit chip packages A semiconductor package having a third connection terminal for connecting the package and the reinforcing member; And And a passive element mounted to the reinforcing member of the semiconductor package. 8. The semiconductor module of claim 7, wherein the reinforcing member comprises a substrate with an iron wire. The semiconductor module of claim 8, wherein the third connection terminal comprises a plurality of solder balls. 8. The semiconductor module according to claim 7, wherein at least one resistive element or a capacitive element is arranged at an outer portion of the reinforcing member as the passive element. The semiconductor module of claim 7, wherein the first connection terminal comprises a plurality of solder balls. The semiconductor module of claim 7, wherein each of the plurality of second connection terminals comprises a plurality of solder balls.

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