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KR20040041333A - Apparatus for manufacturing semiconductor device - Google Patents

Apparatus for manufacturing semiconductor device Download PDF

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Publication number
KR20040041333A
KR20040041333A KR1020020069546A KR20020069546A KR20040041333A KR 20040041333 A KR20040041333 A KR 20040041333A KR 1020020069546 A KR1020020069546 A KR 1020020069546A KR 20020069546 A KR20020069546 A KR 20020069546A KR 20040041333 A KR20040041333 A KR 20040041333A
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South Korea
Prior art keywords
chamber
chuck
covering
particles
focus ring
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KR1020020069546A
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Korean (ko)
Inventor
이태원
박재영
연순호
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삼성전자주식회사
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Priority to KR1020020069546A priority Critical patent/KR20040041333A/en
Publication of KR20040041333A publication Critical patent/KR20040041333A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32623Mechanical discharge control means
    • H01J37/32642Focus rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32623Mechanical discharge control means
    • H01J37/32651Shields, e.g. dark space shields, Faraday shields
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

PURPOSE: An apparatus for manufacturing a semiconductor device is provided to be capable of smoothly exhausting particles in a chamber and minimizing the chipping of a cover ring. CONSTITUTION: An apparatus for manufacturing a semiconductor device is provided with a chamber(100) for carrying out a predetermined process, a chuck(150) located at the predetermined portion in the chamber for stably supporting a wafer(W), and a cover ring(130) for enclosing around the chuck. At this time, the upper portion of the cover ring is inclined toward the edge. The apparatus further includes an inflow pipe(110), a through pipe(112), and a focus ring(132).

Description

반도체 소자 제조장치{APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE}Semiconductor device manufacturing device {APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE}

본 발명은 반도체 제조공정에 사용되는 장치에 관한 것으로, 더 상세하게는 공정이 진행되는 챔버, 상기 챔버내 위치하며 웨이퍼를 지지하는 척, 상기 척을 감싸는 포커스링, 상기 포커스링을 보호하기 위해 포커스링의 외주면을 둘러싼 커버링에 관한 것이다.The present invention relates to an apparatus used in a semiconductor manufacturing process, and more particularly, to a chamber in which a process is performed, a chuck positioned in the chamber to support a wafer, a focus ring surrounding the chuck, and a focus ring to protect the focus ring. It relates to a covering surrounding the outer circumferential surface of the ring.

반도체 제조공정 중에는 웨이퍼 위에 형성된 각종 막들을 식각하는 공정이 계속적으로 이용되고 있다. 이러한 식각공정은 액체상태의 화학약품을 이용하는 습식식각과 기체상태의 가스를 이용하는 건식식각이 있다. 건식식각의 방식에는 플라즈마를 이용하는 플라즈마 식각이 근래에 들어 많이 이용되고 있다. 플라즈마 식각은 반도체 제조공정에서 고밀도 플라즈마 소스를 이용하여 절연막, 실리콘막, 금속막의 식각이 가능하다.During the semiconductor manufacturing process, a process of etching various films formed on a wafer is continuously used. Such etching processes include wet etching using liquid chemicals and dry etching using gaseous gases. In the dry etching method, plasma etching using plasma has been widely used in recent years. Plasma etching may be performed by etching an insulating film, a silicon film, and a metal film using a high density plasma source in a semiconductor manufacturing process.

일반적으로 사용되고 있는 반도체 제조장치는 웨이퍼를 지지하는 척과 상기 척의 외측면을 보호하는 포커스링 및 포커스링을 둘러싼 석영재질의 커버링으로 구성된다. 에칭공정이 진행되는 동안 발생하는 폴리머는 배기관을 통하여 배기되며, 배기되지 않은 폴리머는 챔버 내부에 남게 된다. 챔버내 잔여 폴리머는 공정중 상대적으로 온도가 낮은 커버링의 상부에 국부적으로 계속 쌓이게 된다. 이렇게 쌓인 폴리머는 공정 중에 충격이 가해져 폴리머(POLYMER)가 벗겨져 파티클(PARTICLE)을 발생시킨다. 반도체 제조 공정에 있어서 챔버내 파티클은 배기공정시 최대한 배출하여 웨이퍼에 미치는 영향을 최소화될 것이 요구된다. 그러나 일반적으로 사용되고 있는 반도체 제조 장비에 있어서는 원활한 배기가 이루어지지 않는다. 그것은 포커스링(FOCUS RING)과 커버링(COVER RING)의 상부면이 수평으로 이루어져 있고, 커버링의 엣지(EDGE) 부분이 직각으로 이루어져 있기 때문이다. 커버링의 엣지 부분은 직각적인 구조와 내부와 외부의 온도차이, 그리고 배기시 계속되는 입자의 충돌로 인하여 빈번한 박리(CHIPPING)현상이 일어난다. 이러한 요인들은 빈번한 설비교체로 인한 설비효율저하, 원가상승, 공정수율의 하락요인으로 작용한다.BACKGROUND OF THE INVENTION [0002] A semiconductor manufacturing apparatus generally used includes a chuck supporting a wafer, a focus ring protecting an outer surface of the chuck, and a quartz covering covering the focus ring. The polymer generated during the etching process is exhausted through the exhaust pipe, and the non-vented polymer remains inside the chamber. Residual polymer in the chamber will continue to build up locally on top of the relatively low temperature coverings in the process. The stacked polymer is impacted during the process and the polymer is peeled off to generate particles. In the semiconductor manufacturing process, particles in the chamber are required to be discharged as much as possible during the exhaust process to minimize the effect on the wafer. However, in the semiconductor manufacturing equipment which is generally used, smooth exhaust is not achieved. This is because the upper surface of the focus ring and the covering ring is horizontal, and the edge portion of the covering is formed at right angles. The edge part of the covering is frequently subjected to chipping due to the orthogonal structure, the temperature difference between the inside and the outside, and the continuous collision of particles during exhaust. These factors contribute to lower facility efficiency, higher costs, and lower process yields.

본 발명은 상술한 문제점을 해결하기 위한 장치로, 챔버내 파티클의 원활한 배기와 커버링의 박리현상을 최소화할 수 있는 반도체 제조장치를 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor manufacturing apparatus capable of minimizing the smoothing of particles in a chamber and the peeling of the covering.

도 1은 일반적인 척의 단면도:1 is a cross-sectional view of a typical chuck:

도 2는 척에 적층되는 파티클을 보여주는 개략적인 도면:2 is a schematic drawing showing particles laminated to a chuck:

도 3은 척의 원활하지 못한 배기의 흐름을 보여주는 도면이다.3 is a view showing a poor exhaust flow of the chuck.

도 4는 본 발명의 바람직한 실시예에 따른 반도체 제조장치를 개략적으로 보여주는 도면:4 is a schematic view of a semiconductor manufacturing apparatus according to a preferred embodiment of the present invention:

도 5는 챔버내 파티클의 원활한 배기흐름을 보여주는 도면이다.5 is a view showing a smooth exhaust flow of particles in the chamber.

*도면의 주요부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *

100 :챔버 110 :도입관100: chamber 110: introduction pipe

112 :관통관 120 :반응가스 공급관112: through tube 120: reaction gas supply pipe

130 :커버링 132 :포커스링130: covering 132: focusing

150 :척150: Chuck

상술한 목적을 달성하기 위하여, 본 발명인 반도체 제조장치는 공정이 진행되는 챔버, 상기 챔버내 위치하고 웨이퍼를 지지하는 척, 상기 척의 외주면 둘레에 설치되어 상기 척을 보호하는 포커스링, 상기 포커스링을 감싸는 커버링을 포함하여 구성된다. 그리고 상기 커버링의 상부는 엣지 쪽의 하방으로 비스듬하게 경사진 구조를 갖는 것을 특징으로 하는 장치이다.In order to achieve the above object, a semiconductor manufacturing apparatus of the present invention is a chamber in which a process is performed, a chuck positioned in the chamber to support a wafer, a focus ring installed around an outer circumferential surface of the chuck to protect the chuck, and surrounding the focus ring. It comprises a covering. And the upper portion of the covering is a device characterized in that it has a structure obliquely obliquely downward to the edge side.

상술한 구조를 가진 본 발명에 의하면, 커버링의 엣지 부근에서 박리(CHIPPING)현상이 발생하지 않고 공정챔버내 파티클은 원활한 배기가 이루어져 공정의 효율을 배가시킨다.According to the present invention having the above-described structure, the chipping phenomenon does not occur near the edge of the covering, and the particles in the process chamber are smoothly exhausted to double the efficiency of the process.

이하 본 발명의 바람직한 일 실시예를 첨부된 도면 도 4와 도 5를 참조하면서 상세히 설명한다.Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to FIGS. 4 and 5.

본 실시예는 당업계에서 평균적인 지식을 가진 자 에게 본 발명을 보다 완전하게 설명하기 위해서 제공되어 지는 것이다. 따라서, 도면에서의 요소의 형상 등은 보다 명확한 설명을 강조하기 위해서 과장되어진 것이다.This embodiment is provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape of the elements in the drawings and the like are exaggerated to emphasize a clearer description.

도 4는 본 발명에 있어서 정전척이 설치된 챔버의 구조를 개략적으로 보여주는 도면이다.4 is a view schematically showing a structure of a chamber in which an electrostatic chuck is installed in the present invention.

도 4를 참조하면, 반도체 제조공정에 사용되는 장치는 외부로 부터 반응가스가 공급되는 반응가스 공급관(120), 공정이 진행되는 챔버(100), 반응가스 공급관(120)을 통하여 도입된 가스를 고르게 분배하는 샤워헤드(113), 웨이퍼(W)를 지지하는 척(150), 척(150)의 외주면 둘레에 설치되어 척(150)을 보호하는 포커스링(132), 포커스링(132)을 감싸고 척(150)과 주변부를 격리시키며 석영재질로 이루어진 커버링(130), 챔버(100) 내부를 고진공 상태로 유지시키고 잔류가스나 파티클들을 펌핑시키는 배기구로 이루어진다. 그리고 커버링(132)의 상부는 엣지 쪽으로 비스듬하게 경사진 구조가 된다.Referring to FIG. 4, a device used in a semiconductor manufacturing process includes a gas introduced through a reaction gas supply pipe 120 through which a reaction gas is supplied from the outside, a chamber 100 in which a process is performed, and a reaction gas supply pipe 120. The focus ring 132 and the focus ring 132 installed around the outer circumferential surface of the shower head 113, the chuck 150 supporting the wafer W, and the chuck 150 are evenly distributed. Wrapping is made of a covering 130 made of a quartz material to keep the chuck 150 and the periphery, the chamber 100 to maintain a high vacuum state and pumped residual gas or particles. And the upper portion of the covering 132 has a structure inclined obliquely toward the edge.

공정이 진행되면 반응가스는 챔버(100) 외부의 반응가스 공급원으로 부터 챔버 상부에 설치된 반응가스 공급관(120)을 통하여 챔버(100) 내부의 도입관(110)으로 유입된다. 도입관(110)으로 유입된 반응가스는 챔버(100) 상부에 설치된 샤워헤드(113)의 관통공(112)을 통하여 고르게 분배되어 웨이퍼(W) 위에 분사된다. 반응가스는 챔버(100)내에서 상부전극과 하부전극에 고주파 파워를 인가함으로써 플라즈마 상태가 된다. 반응가스로 부터 형성된 플라즈마는 전자충격(electron bombardment)과 화학침식에 의해서 웨이퍼의 노출된 표면을 선택적으로 에칭한다.When the process proceeds, the reaction gas is introduced into the introduction pipe 110 inside the chamber 100 through the reaction gas supply pipe 120 installed in the upper part from the reaction gas supply source outside the chamber 100. The reaction gas introduced into the introduction pipe 110 is evenly distributed through the through hole 112 of the shower head 113 installed above the chamber 100 and sprayed onto the wafer (W). The reaction gas is in a plasma state by applying high frequency power to the upper electrode and the lower electrode in the chamber 100. Plasma formed from the reaction gas selectively etches the exposed surface of the wafer by electron bombardment and chemical erosion.

포커스링(132)은 척(150)의 외주면을 에워싸 척(150)을 보호하는 역활을 한다. 또한 포커스링(132)은 제조되는 반도체 디바이스의 특성이 웨이퍼의 면내에서 유지되도록 하기 위해 웨이퍼상에 공급되는 플라즈마를 균일하게 한다.포커스링(132)의 재질은 불순물을 줄이기 위해 실리콘 웨이퍼와 동일한 재질의 단결정 실리콘이 사용된다. 이러한 포커스링(132)은 하부전극을 통해 고주파 전원에 접속되어 하부전극의 면적을 넓혀주는 효과가 있다.The focus ring 132 serves to protect the chuck 150 by surrounding the outer circumferential surface of the chuck 150. The focus ring 132 also makes the plasma supplied on the wafer uniform so that the characteristics of the semiconductor device being manufactured are maintained in-plane of the wafer. The material of the focus ring 132 is the same material as that of the silicon wafer to reduce impurities. Monocrystalline silicon is used. The focus ring 132 is connected to the high frequency power supply through the lower electrode, thereby increasing the area of the lower electrode.

커버링(130)은 포커스링(132)과 포커스링(132)에 감싸여진 척(150)을 외부와 격리시켜 포커스링(132)과 척(150)을 보호하기 위해 포커스링(132)의 외주면을 감싸는 링 형태로 형성된다. 또한, 탈 부착이 자유로운 구조로서 석영재질로 이루어진다. 커버링(130)의 상부는 엣지 쪽으로 갈수록 비스듬하게 하방 경사진 구조를 가진다. 이러한 커버링(130)의 구조는 본 발명의 중요한 특징이다. 공정이 진행되는 동안 챔버(100)내에는 다수의 파티클이 발생한다. 공정진행중 발생하는 파티클은 상대적으로 온도가 낮은 커버링(130)의 상부로 모이게 된다. 공정중 발생되는 파티클은 커버링(130)의 상기 구조로 인하여 공정중 파티클이 커버링(130)의 표면에 떨어지면 자연스럽게 배기구 쪽으로 미끄러지게 되어 자연스럽게 제거된다. 또한 커버링(130)의 상기 구조로 인하여 공정중에 발생하는 파티클은 커버링(130)의 표면에 적층되는 현상도 없앨 수 있다. 종래 커버링의 엣지 부근이 직각적 구조로 인하여 발생되던 박리현상도 상기와 같은 구조로 변경함으로써 최소화된다.The covering ring 130 isolates the focus ring 132 and the chuck 150 wrapped around the focus ring 132 from the outside to protect the focus ring 132 and the chuck 150 from the outer circumferential surface of the focus ring 132. It is formed in the form of a wrapping ring. In addition, the detachable structure is made of a quartz material. The upper portion of the covering 130 has a structure inclined downward obliquely toward the edge. The structure of this covering 130 is an important feature of the present invention. During the process, a large number of particles are generated in the chamber 100. Particles generated during the process are collected at the upper portion of the relatively low temperature covering (130). Particles generated during the process are naturally removed due to the structure of the covering 130, when the particles fall on the surface of the covering 130, the particles naturally slide toward the exhaust port. In addition, due to the structure of the covering 130, the particles generated during the process can also eliminate the phenomenon of the stacking on the surface of the covering 130. The peeling phenomenon that is generated due to the rectangular structure near the edge of the conventional covering is also minimized by changing to the above structure.

도 5는 챔버(100)의 내부에서 발생하는 파티클의 원활한 배기의 흐름을 보여주고 있다.5 shows a smooth exhaust flow of particles generated inside the chamber 100.

도 5를 참조하면, 공정이 진행되는 동안 챔버(100) 내부에서는 파티클이 다수 발생한다. 이러한 파티클은 챔버(100)내에 잔류량을 남기지 않고 배기시키는 것이 무엇보다도 중요하다. 이에 본 발명은 커버링(130) 상부를 엣지쪽으로 갈수록높이가 낮아지도록 하방경사 지게하여 배기공정시 원활하게 파티클 흐름이 이루어지도록 한다.Referring to FIG. 5, a large number of particles are generated in the chamber 100 during the process. It is important to exhaust these particles without leaving a residual amount in the chamber 100. Thus, the present invention is to be inclined downward so that the height is lowered toward the edge of the covering 130, so that the particle flow smoothly during the exhaust process.

이상에서는 바람직한 실시예들을 예시하고 그것을 통해서 본 발명을 설명하였지만 본 발명이 거기에 한정되는 것은 아니며, 본 발명의 사상과 기술적 범위를 벗어나지 않는 선에서 다양한 실시예들 및 변형예들이 있을 수 있다.The present invention has been described above by way of example and the present invention has been described, but the present invention is not limited thereto, and various embodiments and modifications may be made without departing from the spirit and technical scope of the present invention.

본 발명인 반도체 제조장치는 커버링의 상부를 엣지 쪽으로 갈수록 높이가 더욱 낮아지도록 하방경사지게 하여 챔버내 파티클의 원활한 배기와 엣지 부근의 박리현상을 최소화하여 파티클 발생을 방지할 수 있다.The semiconductor manufacturing apparatus of the present invention can be prevented from generating particles by minimizing the smooth exhaust of particles in the chamber and the peeling phenomenon near the edges by lowering the upper portion of the covering toward the edge to further lower the height.

Claims (1)

반도체 제조공정에 사용되는 장치에 있어서,In the device used in the semiconductor manufacturing process, 공정이 진행되는 챔버와;A chamber in which the process proceeds; 상기 챔버내 위치하며 웨이퍼를 지지하는 척과;A chuck positioned in the chamber and supporting the wafer; 상기 척의 둘레를 감싸는 커버링을 포함하되,Including a covering surrounding the circumference of the chuck, 상기 커버링의 상부는 엣지쪽으로 하방 경사지는 구조를 갖는 것을 특징으로 하는 반도체 제조장치.The upper portion of the covering is a semiconductor manufacturing apparatus characterized in that it has a structure inclined downward toward the edge.
KR1020020069546A 2002-11-11 2002-11-11 Apparatus for manufacturing semiconductor device Withdrawn KR20040041333A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160016588A (en) * 2014-08-01 2016-02-15 다이요 유덴 가부시키가이샤 Multilayer ceramic capacitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160016588A (en) * 2014-08-01 2016-02-15 다이요 유덴 가부시키가이샤 Multilayer ceramic capacitor

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