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KR20020030337A - Manufacturing method for shallow trench isolation in semiconductor device - Google Patents

Manufacturing method for shallow trench isolation in semiconductor device Download PDF

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Publication number
KR20020030337A
KR20020030337A KR1020000060927A KR20000060927A KR20020030337A KR 20020030337 A KR20020030337 A KR 20020030337A KR 1020000060927 A KR1020000060927 A KR 1020000060927A KR 20000060927 A KR20000060927 A KR 20000060927A KR 20020030337 A KR20020030337 A KR 20020030337A
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substrate
nitride film
semiconductor device
trench
pad oxide
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Korean (ko)
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류혁현
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박종섭
주식회사 하이닉스반도체
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    • H10W10/014
    • H10P50/695
    • H10W10/17

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Abstract

PURPOSE: A method for fabricating a shallow trench isolation structure of a semiconductor device is provided to prevent a cusped part of a substrate from being exposed even if the upper portion of an isolation structure is etched in an etch or cleaning process, by covering the cusped part of the substrate and by more thickly forming a region protruding to the upper portion of the substrate as compared with a conventional technology. CONSTITUTION: A pad oxide layer is deposited on the substrate(1), and a nitride layer of 1400 angstrom is deposited on the pad oxide layer. A part of the nitride layer is incline-etched by a photolithography process so that the etched surface of the lower portion of the nitride layer is broader. The center of the exposed substrate is etched to form a trench by an etch process using the nitride layer as an etch mask. An oxide layer is deposited on the resultant structure, and is planarized to form the isolation structure(4) covering the cusped part of the substrate which is an upper side surface of the trench. The nitride layer and the pad oxide layer are eliminated.

Description

반도체 장치의 얕은 트랜치형 분리구조 제조방법{MANUFACTURING METHOD FOR SHALLOW TRENCH ISOLATION IN SEMICONDUCTOR DEVICE}Manufacturing method of shallow trench isolation structure of semiconductor device {MANUFACTURING METHOD FOR SHALLOW TRENCH ISOLATION IN SEMICONDUCTOR DEVICE}

본 발명은 반도체 장치의 얕은 트랜치형 분리구조 제조방법에 관한 것으로, 특히 트랜치 형성의 하드마스크로 사용되는 질화막의 높이 및 식각방법을 변환하여 분리구조가 기판의 상부로 돌출됨과 아울러 그 측면 기판의 첨점부가 돌출되는 것을 방지하는데 적당하도록 한 반도체 장치의 얕은 트랜치형 분리구조 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a shallow trench type isolation structure of a semiconductor device, and in particular, by converting the height and etching method of a nitride film used as a hard mask for trench formation, the separation structure protrudes to the top of the substrate and at the same time the edge of the substrate A method of manufacturing a shallow trench isolation structure of a semiconductor device is adapted to prevent the protrusion from being protruded.

도1a 내지 도1d는 종래 반도체 장치의 얕은 트랜치형 분리구조 제조공정 수순단면도로서, 이에 도시한 바와 같이 기판(1)의 상부에 패드산화막(2)과 질화막(3)을 순차적으로 증착하고, 사진식각공정을 통해 상기 질화막(3)과 패드산화막(2)을 패터닝하여 기판(1)의 일부를 노출시키는 단계(도1a)와; 상기 노출된 기판(1)을 건식식각하여 트랜치를 형성하고, 그 구조의 상부전면에 산화막을 증착한 후 평탄화하여 상부면이 상기 질화막(3)의 상부면과 동일 평면상에 위치하는 분리구조(4)를 형성하는 단계(도1b)와; 상기 질화막(3)과 패드산화막(2)을 제거하는 단계(도1c)로 구성된다.1A to 1D are cross-sectional views of a process of manufacturing a shallow trench type isolation structure of a conventional semiconductor device. As shown therein, a pad oxide film 2 and a nitride film 3 are sequentially deposited on an upper portion of a substrate 1, and a photograph is shown. Patterning the nitride film 3 and the pad oxide film 2 through an etching process to expose a portion of the substrate 1 (FIG. 1A); Dry etching the exposed substrate 1 to form a trench, depositing an oxide film on the top surface of the structure, and then planarizing it to form a separation structure in which the top surface is coplanar with the top surface of the nitride film 3 ( 4) forming (FIG. 1B); The nitride film 3 and the pad oxide film 2 are removed (FIG. 1C).

이하, 상기와 같이 구성된 종래 반도체 장치의 얕은 트랜치형 분리구조 제조방법을 좀 더 상세히 설명한다.Hereinafter, a method of manufacturing a shallow trench isolation structure of a conventional semiconductor device configured as described above will be described in more detail.

먼저, 도1a에 도시한 바와 같이 기판(1)의 상부전면에 패드산화막(2)과 질화막(3)을 증착한다. 이때 질화막(3)의 두께는 1000Å이다.First, as shown in FIG. 1A, a pad oxide film 2 and a nitride film 3 are deposited on the upper surface of the substrate 1. At this time, the thickness of the nitride film 3 is 1000 kPa.

그 다음, 상기 질화막(3)의 상부전면에 포토레지스트(도면미도시)를 도포하고 노광 및 현상하여 상기 질화막(3)의 일부를 노출시키는 패턴을 형성한다.Next, a photoresist (not shown) is applied to the upper surface of the nitride film 3 to expose and develop a pattern to expose a portion of the nitride film 3.

그 다음, 상기 노출된 질화막(3)과 그 하부의 패드산화막(2)을 식각하여 상기 기판(1)의 일부를 노출시킨다.Next, the exposed nitride film 3 and the pad oxide film 2 below it are etched to expose a portion of the substrate 1.

그 다음, 도1b에 도시한 바와 같이 상기 포토레지스트 패턴을 제거하거나 제거하지 않은 상태로 건식식각공정을 이용하여 상기 노출된 기판(1)을 식각하여 트랜치를 형성한다.Next, as shown in FIG. 1B, the exposed substrate 1 is etched using a dry etching process with or without the photoresist pattern to form a trench.

그 다음, 상기 구조의 상부전면에 산화막을 상기 트랜치와 질화막(3)의 식각영역이 모두 채워지도록 두껍게 증착한다.Then, an oxide film is thickly deposited on the upper surface of the structure so that both the trench and the etch region of the nitride film 3 are filled.

그 다음, 화학적 기계적 연마법을 이용하여 상기 증착된 산화막을 상기 질화막(3)이 노출될 때 까지 평탄화하여 상기 트랜치내부와 상기 트랜치의 상부측으로 소정의 두께를 갖는 분리구조(4)를 형성한다.The deposited oxide film is then planarized by chemical mechanical polishing until the nitride film 3 is exposed to form a separation structure 4 having a predetermined thickness inside the trench and on the upper side of the trench.

그 다음, 도1c에 도시한 바와 같이 상기 노출된 질화막(3)과 패드산화막(2)을 순차적으로 제거하여 반도체 장치의 얕은 트랜치 분리구조의 제조를 완료한다.Next, as shown in FIG. 1C, the exposed nitride film 3 and the pad oxide film 2 are sequentially removed to complete the manufacture of the shallow trench isolation structure of the semiconductor device.

이때, 상기 분리구조(4)는 그 상부면이 질화막(3)과 패드산화막(2)의 식각공정과, 이후의 공정에서 세정 및 식각공정으로 인해 그 상부면이 식각되어 트랜치의 상부측면에 위치하는 기판(1)의 첨점부가 노출될 수 있으며, 이와 같이 노출된 기판(1)의 첨점부는 모스 트랜지스터의 소스 및 드레인이 형성되는 위치이고, 전계의 집중에 의해 누설전류가 발생하는 등 많은 문제점을 나타낸다.At this time, the separation structure (4) is located on the upper side of the trench by the upper surface is etched by the etching process of the nitride film (3) and the pad oxide film (2) and the cleaning and etching process in the subsequent process The peaks of the substrate 1 may be exposed. The peaks of the exposed substrate 1 may be formed at positions where the source and drain of the MOS transistor are formed, and leakage current may be generated due to concentration of an electric field. Indicates.

상기한 바와 같이 종래 반도체 장치의 얕은 트랜치형 분리구조 제조방법은 분리구조의 상부측면부인 기판의 첨점부가 노출되어 전계의 집중에 의해 누설전류가 발생하여 반도체 장치의 특성을 열화시키는 문제점이 있었다.As described above, the method of manufacturing a shallow trench isolation structure of a conventional semiconductor device has a problem of deteriorating characteristics of the semiconductor device due to leakage current generated by concentration of an electric field by exposing a peak portion of a substrate, which is an upper side portion of the isolation structure.

이와 같은 문제점을 감안한 본 발명은 기판의 첨점부의 노출을 방지할 수 있는 반도체 장치의 얕은 트랜치형 분리구조 제조방법을 제공함에 그 목적이 있다.It is an object of the present invention to provide a method for manufacturing a shallow trench isolation structure of a semiconductor device capable of preventing exposure of the peaks of a substrate.

도1a 내지 도1c는 종래 반도체 장치의 얕은 트랜치형 분리구조 제조공정 수순단면도.1A to 1C are cross-sectional views of a process for manufacturing a shallow trench isolation structure of a conventional semiconductor device.

도2a 내지 도2d는 본 발명 반도체 장치의 얕은 트랜치형 분리구조 제조공정 수순단면도.2A to 2D are cross-sectional views of a shallow trench isolation structure fabrication process of the present invention semiconductor device.

*도면의 주요 부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *

1:기판2:패드산화막1: Substrate 2: Pad oxide film

3:질화막4:분리구조3: nitride film 4: separation structure

상기와 같은 목적은 기판의 상부에 패드산화막을 증착하고, 그 상부에 1400Å의 두께가 되도록 질화막을 증착하는 단계와; 사진식각공정을 통해 상기 질화막의 일부를 하부측의 식각면이 넓도록 경사지게 식각하고, 그 질화막을 식각마스크로 사용하는 식각공정으로 노출되는 기판의 중앙부를 식각하여 트랜치를 형성하는 단계와; 상기 구조의 상부전면에 산화막을 증착하고, 평탄화하여 상기 트랜치의 상부측면인 기판의 첨점부를 덮는 분리구조를 형성하는 단계와; 상기 질화막과 패드산화막을 제거하는 단계로 구성함으로써 달성되는 것으로, 이와 같은 본 발명을 첨부한 도면을 참조하여 상세히 설명하면 다음과 같다.The above object is a step of depositing a pad oxide film on top of the substrate, and depositing a nitride film to a thickness of 1400Å on the top; Forming a trench by etching a portion of the nitride film in such a manner that the etching surface of the lower side is widened through a photolithography process, and etching a central portion of the substrate exposed by an etching process using the nitride film as an etching mask; Depositing an oxide film on the top surface of the structure and planarizing to form a separation structure covering the peaks of the substrate, the top side of the trench; It is achieved by the step of removing the nitride film and the pad oxide film, described in detail with reference to the accompanying drawings, the present invention as follows.

도2a 내지 도2d는 본 발명 반도체 장치의 얕은 트랜치형 분리구조 제조공정 수순단면도로서, 이에 도시한 바와 같이 기판(1)의 상부에 패드산화막(2)을 증착하고, 그 상부에 1400Å의 두께가 되도록 질화막(3)을 증착하는 단계(도2a)와; 사진식각공정을 통해 상기 질화막(3)의 일부를 하부측의 식각면이 넓도록 경사지게 식각하고, 그 질화막(3)을 식각마스크로 사용하는 식각공정으로 노출되는 기판(1)의 중앙부를 식각하여 트랜치를 형성하는 단계(도2b)와; 상기 구조의 상부전면에 산화막을 증착하고, 평탄화하여 상기 트랜치의 상부측면인 기판(1)의 첨점부를 덮는 분리구조(4)를 형성하는 단계(도2c)와; 상기 질화막(3)과 패드산화막(2)을 제거하는 단계(도2d)로 구성된다.2A to 2D are cross-sectional views of a process for manufacturing a shallow trench isolation structure of a semiconductor device according to the present invention. As shown therein, a pad oxide film 2 is deposited on an upper portion of a substrate 1, and a thickness of 1400 μs is formed thereon. Depositing a nitride film 3 as much as possible (Fig. 2A); A portion of the nitride film 3 is etched obliquely so that an etching surface on the lower side is widened through the photolithography process, and the center portion of the substrate 1 exposed by the etching process using the nitride film 3 as an etching mask is etched. Forming a trench (FIG. 2B); Depositing an oxide film on the upper surface of the structure and flattening to form a separation structure (4) covering the peaks of the substrate (1), which is the upper side of the trench (FIG. 2C); The nitride film 3 and the pad oxide film 2 are removed (FIG. 2D).

이하, 상기와 같이 구성된 본 발명 반도체 장치의 얕은 트랜치형 분리구조 제조방법을 좀 더 상세히 설명한다.Hereinafter, a method of manufacturing a shallow trench isolation structure of the semiconductor device of the present invention configured as described above will be described in more detail.

먼저, 도2a에 도시한 바와 같이 기판(1)의 상부전면에 패드산화막(2)을 증착한다.First, as shown in FIG. 2A, a pad oxide film 2 is deposited on the upper surface of the substrate 1.

그 다음, 상기 패드산화막(2)의 상부전면에 종래보다 두꺼운 1400Å의 두께를 갖는 질화막(3)을 증착한다.Then, a nitride film 3 having a thickness of 1400 mm thick is deposited on the upper surface of the pad oxide film 2.

그 다음, 도2b에 도시한 바와 같이 상기 질화막(3)의 상부전면에 포토레지스트를 도포하고, 노광 및 현상하여 상기 질화막(3)의 일부를 노출시키는 패턴을 형성한다.Then, as shown in FIG. 2B, a photoresist is applied to the upper front surface of the nitride film 3, and exposed and developed to form a pattern for exposing a part of the nitride film 3.

그 다음, 상기 노출된 질화막(3)을 습식식각하여 식각면의 상부면보다 하부면이 면적이 넓도록 식각하고, 그 하부의 패드산화막(2)을 식각한다.Next, the exposed nitride film 3 is wet etched to etch the lower surface of the nitride film 3 to have a larger area than the upper surface of the etched surface, and to etch the pad oxide film 2 below.

상기 식각공정으로 트랜치의 형성위치보다 넓은 면적의 기판(1)이 노출된다.The etching process exposes the substrate 1 having a larger area than the trench formation position.

그 다음, 상기 질화막(3) 패턴을 식각마스크로 하는 식각공정으로 상기 노출된 기판(1)에 트랜치를 형성한다.Next, a trench is formed in the exposed substrate 1 by an etching process using the nitride film 3 as an etching mask.

이때, 상기 노출된 기판(1)의 면적보다 질화막(1)의 상부측에서 개방된 면적이 작으므로, 상기 트랜치는 노출된 기판(1) 영역의 중앙부에 형성되며, 트랜치의 상부측면이 기판(1)의 첨점부가 노출된다.At this time, since the area opened on the upper side of the nitride film 1 is smaller than the area of the exposed substrate 1, the trench is formed in the center of the exposed substrate 1 region, and the upper side of the trench is formed of the substrate ( The peak part of 1) is exposed.

그 다음, 도2c에 도시한 바와 같이 상기 구조의 상부전면에 산화막을 상기 트랜치와 질화막(3)의 식각영역이 모두 채워지도록 두껍게 증착한다.Then, as shown in FIG. 2C, an oxide film is thickly deposited on the upper surface of the structure so that both the trench and the etching region of the nitride film 3 are filled.

그 다음, 상기 증착된 산화막을 평탄화하여 상부면이 상기 질화막(3)의 상부면과 동일 수준에 있는 분리구조(4)를 형성한다.Then, the deposited oxide film is planarized to form a separation structure 4 having an upper surface at the same level as the upper surface of the nitride film 3.

이때, 분리구조(4)는 상기 트랜치의 주변부 기판(1)의 상부측에도 형성되어 상기 기판(1)의 첨점부를 덮게 되며, 상기 질화막(3)의 두께를 종래보다 크게 하여 이후의 공정에서 식각 또는 세정공정에 의해 손상되어도 약 300Å 정도 기판(1)의 상부측으로 돌출될 수 있도록 하였다.At this time, the isolation structure 4 is also formed on the upper side of the periphery substrate 1 of the trench to cover the peaks of the substrate 1, the thickness of the nitride film 3 is larger than the conventional etching or Even if damaged by the cleaning process, it was possible to project about 300 kPa toward the upper side of the substrate 1.

그 다음, 도2d에 도시한 바와 같이 상기 질화막(3)과 패드산화막(2)을 제거한다.Next, as shown in FIG. 2D, the nitride film 3 and the pad oxide film 2 are removed.

상기한 바와 같이 본 발명 반도체 장치의 얕은 트랜치형 분리구조 제조방법은 기판의 첨점부를 덮도록 형성하고, 종래에 비해 기판의 상부측으로 돌출되는 영역을 더 두껍게 형성함으로써, 이후의 공정에서 식각 또는 세정에 의해 분리구조의 상부가 식각되는 경우에도 기판의 첨점부가 노출되는 것을 방지하여 반도체 장치의 특성 열화를 방지하는 효과가 있다.As described above, the method for manufacturing a shallow trench isolation structure of the semiconductor device of the present invention is formed to cover the peaks of the substrate, and to form a thicker area protruding to the upper side of the substrate than in the prior art, so that the etching or cleaning may be performed in a subsequent process. As a result, even when the upper portion of the separation structure is etched, it is possible to prevent the dew point of the substrate from being exposed, thereby preventing deterioration of characteristics of the semiconductor device.

Claims (1)

기판의 상부에 패드산화막을 증착하고, 그 상부에 1400Å의 두께가 되도록 질화막을 증착하는 단계와; 사진식각공정을 통해 상기 질화막의 일부를 하부측의 식각면이 넓도록 경사지게 식각하고, 그 질화막을 식각마스크로 사용하는 식각공정으로 노출되는 기판의 중앙부를 식각하여 트랜치를 형성하는 단계와; 상기 구조의 상부전면에 산화막을 증착하고, 평탄화하여 상기 트랜치의 상부측면인 기판의 첨점부를 덮는 분리구조를 형성하는 단계와; 상기 질화막과 패드산화막을 제거하는 단계로 구성하여 된 것을 특징으로 하는 반도체 장치의 얕은 트랜치형 분리구조.Depositing a pad oxide film on the substrate, and depositing a nitride film on the substrate so as to have a thickness of 1400 kPa; Forming a trench by etching a portion of the nitride film in such a manner that the etching surface of the lower side is widened through a photolithography process, and etching a central portion of the substrate exposed by an etching process using the nitride film as an etching mask; Depositing an oxide film on the top surface of the structure and planarizing to form a separation structure covering the peaks of the substrate, the top side of the trench; And a step of removing the nitride film and the pad oxide film.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020081901A (en) * 2001-04-20 2002-10-30 아남반도체 주식회사 Method for forming a isolation layer of trench type

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020081901A (en) * 2001-04-20 2002-10-30 아남반도체 주식회사 Method for forming a isolation layer of trench type

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