KR20010016659A - Method for manufacturing the Perfect Fully Depletion bonded wafer - Google Patents

Abstract

The present invention provides a method for fabricating a perfect pulley deflation bonded wafer without uniform thickness retention, crystal originated particles (COP), and large dislocations on the surface of the silicon, the device forming region on the substrate.

The present invention provides a process for growing an oxide film to a thickness of 0.1 to 0.2 μm on a first substrate on which a defect-free single crystal silicon wafer manufactured without vacancy and interstitial agglomeration is introduced into a substrate. Laminating the same second substrate and performing a wafer bonding process by heat treatment at 400 to 600 ° C. in an N ₂ atmosphere, and performing a grinding process such that the surface silicon layer of the bonded wafer has a thickness of about 10 μm. Polishing the wafer so that the thickness of the silicon layer is 1 μm or less; thermally oxidizing the wafer having been polished at 1000 ° C. or above by a wet or dry oxidation method to form a surface oxide film on the surface silicon layer. Process. Instead of the defect-free single crystal silicon wafer, a single crystal silicon wafer annealed in an Ar or H ₂ atmosphere may be used. The thickness of the surface silicon layer is preferably about 2 to 2.5 times the thickness of the surface oxide film.

Description

Method for manufacturing the Perfect Fully Depletion bonded wafer}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a perfect fully depletion bonded wafer (hereinafter referred to as PFD bonded wafer) in which an oxide film is embedded in a wafer. The present invention relates to a method for manufacturing a perfect pulley deflation bonded wafer without uniform thickness retention, crystal originated particles (COP), and large dislocations.

Recently, as semiconductor devices have become highly integrated, 1GHz-class alpha CPUs and 1Gbyte DRAMs have been developed, and the rapid development of the computer industry and the information and communication industry is anticipated. Therefore, the semiconductor industry is stepping up efforts to make further progress. to be.

These ultra-high density semiconductor devices start from a wafer made of a single crystal semiconductor material, and in using such wafers, it is difficult to eliminate parasitic transistors and parasitic capacitances generated in the wafer due to the ultra-high density of semiconductor devices, and thus the operation reliability of each cell element is increased. It has a problem of deterioration.

Therefore, in the related art, the above-described problem is solved by embedding an oxide film in a single crystal wafer, and then forming element circuits on the wafer through various steps of a process for manufacturing a semiconductor device. Among silicon on insulation (SOI) wafers, PFD SIMO (separation by implantation oxide) wafers and PFD bonded wafers are well known.

The manufacturing method of the conventional PFD bonded wafer is as follows.

Using a single crystal wafer sliced from an ingot grown by the Czochralski method as a substrate, an oxide film (box oxide) was grown to a predetermined thickness on the upper surface, and then another substrate using the same single crystal wafer was attached to the upper surface, and N After bonding by heat treatment at a temperature of 400 to 600 ℃ in ₂ atmosphere, to prepare a PFD bonded wafer by grinding the upper surface of the upper substrate.

Bonding of the oxide film and the substrate is performed as the silicon molecules constituting the substrate become SiO ₂ by a chemical reaction with oxygen molecules of the oxide film.

The conventional method for manufacturing a PFD bonded wafer has the following problems.

During wafer bonding, vacancy is concentrated rather than finely dispersed to form agglomerates, thereby generating COP and large dislocations on the upper surface of the wafer. COP induced in the silicon substrate is a cause of defects upon removal of the oxide film by hydrofluoric acid after the annealing process following the ion implantation process.

In addition, since the growth of SiO ₂ is not made at the time of wafer bonding, the surface thickness of the wafer, that is, the thickness of the Si layer (surface silicon layer) on the oxide film is not constant, causing process defects and operating reliability of the circuit device. Becomes bad.

The present invention devised to solve such a conventional problem is to produce a PFD bonded wafer which can control the thickness of the surface silicon layer while also minimizing the COP and large potential acting as a wafer defect by dispersing the bacony The purpose is to provide a method.

1A to 1F are manufacturing process diagrams of the PFD bonded wafer of the present invention.

Explanation of symbols on the main parts of the drawings

10: PFD bonded wafer 12: first substrate

14: oxide film 16: second substrate

16a: surface silicon layer 18: surface oxide film

According to the present invention for achieving the above object, a step of growing an oxide film to a thickness of 0.1 ~ 0.2㎛ on the first substrate introduced into the substrate a defect-free single crystal silicon wafer prepared without bake and interstitial agglomeration, the Laminating a second substrate similar to the first substrate on the oxide film, and performing heat treatment at 400 to 600 ° C. in an N ₂ atmosphere to perform wafer bonding. The thickness of the surface silicon layer of the bonded wafer is about 10 μm. Grinding the surface silicon layer so that the thickness of the surface silicon layer is 1 μm or less, thermally oxidizing the wafer having been polished at 1000 ° C. or above by a wet or dry oxidation method, thereby performing surface oxidation. A method of manufacturing a perfect pulley deflation bonded wafer, comprising the step of forming a surface oxide film on top of a layer. Ball.

Instead of the defect-free single crystal silicon wafer, a single crystal silicon wafer annealed in an Ar or H ₂ atmosphere may be used.

The thickness of the surface silicon layer is preferably about 2 to 2.5 times the thickness of the surface oxide film.

Hereinafter, exemplary embodiments of the present invention will be described in more detail with reference to the accompanying drawings. 1A to 1F are manufacturing process diagrams of the PFD bonded wafer of the present invention.

A pure single crystal silicon wafer is introduced as a substrate for manufacturing the PFD bonded wafer of the present invention. Such a defect-free single crystal silicon wafer is disclosed in the Republic of Korea Patent Publication No. 1998-071243 filed by the present applicant the method and structure thereof.

Instead of the defect-free single crystal silicon wafer, a single crystal silicon wafer annealed in an Ar or H ₂ atmosphere may be used.

Referring to FIG. 1A, the defect-free single crystal silicon wafer is used as the first substrate 12, and an oxide film 14 having a thickness of about 0.1 to 0.2 mu m is grown on the entire upper surface thereof by a thermal oxidation method as shown in FIG. 1B. Next, as shown in FIG. 1C, the second substrate 16, which is the same as the first substrate 12, is laminated on the oxide film 14, and then 400 to 600 ° C. in an N ₂ atmosphere as illustrated in FIG. 1D. The wafer bonding process is performed at a temperature of. At this time, the oxide film 14 is the oxide film 14 and the first substrate 12 by a chemical reaction of the oxygen molecules of the oxide film 14 and the silicon molecules of the substrate 12, 16 during the bonding process by the heat treatment is performed. As the SiO ₂ is grown at the interface between the oxide film 14 and the second substrate 16, the oxide film 14 and the substrates 12 and 16 are bonded.

Subsequently, as shown in FIG. 1E, the surface of the second substrate 16 is ground so that the thickness of the surface silicon layer 16a is about 10 μm, and the thickness of the surface silicon layer 16a is 1 μm or less. Polishing is performed.

Referring to FIG. 1F, the result of the polishing process is a PFD bonded wafer 10 which the present invention intends to provide by growing a surface oxide film 18 on the surface silicon layer 16a by performing a high temperature thermal oxidation process. Is manufactured). The high temperature thermal oxidation process is carried out by a dry or wet oxidation method of at least 1000 ℃.

The surface oxide film 18 thus grown is preferably about 1 / 2.27 as compared to the thickness of the surface silicon layer 16a.

The surface oxide film 18 is formed in advance in the wafer fabrication process by forming a gate oxide film first formed on the wafer substrate in the semiconductor device fabrication process.

According to the present invention performed by such a process, the distribution of vacancy in the surface silicon layer 16a can be reduced during the high temperature thermal oxidation process for forming the surface oxide film 18, thereby reducing the COP and dislocation on the surface of the substrate and at the same time in the bonding surface. The SiO ₂ molecules are rearranged and evenly planarized into even area distributions (A, A ′) to equalize the thickness of the surface silicon layer 16a.

As described above, the present invention provides a PFD pattern which can control the thickness of the surface silicon layer at a constant time while minimizing COP and large potential generated on the upper surface of the wafer by performing a high temperature heat treatment while forming a surface oxide film during the wafer manufacturing process. Since a wafer can be manufactured, there is an effect that the degree of integration and operational reliability can be improved when forming a device using the wafer.

On the other hand, the present invention is not limited to the specific preferred embodiment, it is a matter of course that a variety of applications are possible by ordinary knowledge in the art within the technical rights described in the claims.

Claims (3)

Growing an oxide film to a thickness of 0.1 to 0.2 탆 on a first substrate on which a defect-free single crystal silicon wafer manufactured without vacancy and interstitial agglomeration is introduced into a substrate, and having a second same thickness as that of the first substrate on the oxide film. Laminating the substrate, heat-treating the wafer at 400 to 600 ° C. in an N ₂ atmosphere, and performing wafer bonding; grinding the surface silicon layer so that the thickness of the bonded silicon wafer is about 10 μm; Performing a polishing to have a thickness of 1 μm or less, and performing a thermal oxidation of the polished wafer at 1000 ° C. or more by a wet or dry oxidation method to form a surface oxide film on the surface silicon layer. The method of manufacturing a perfect pulley deflation bonded wafer, characterized in that. The method of manufacturing a perfect pulley deflation bonded wafer according to claim 1, wherein a single crystal silicon wafer annealed in an Ar or H ₂ atmosphere is used in place of the defect free single crystal silicon wafer. The method of claim 1, wherein the thickness of the surface silicon layer is about 2 to about 2.5 times the thickness of the surface oxide film.