KR19990000701A - Printed circuit boards for chip-on-board (COB) packages and chip-on-board packages using the same - Google Patents

Abstract

The present invention relates to a printed circuit board for a chip on board (COB) package and a chip on board (COB) package using the same, since the printed circuit board strips put into the manufacturing process of the chip on board package are treated in a stacked form. When the uppermost printed circuit board is moved for the progress of the manufacturing process while the upper surface of the printed circuit board is in contact with the lower surface of the neighboring printed circuit board, the upper and lower printed circuit boards are scratched. In particular, in order to overcome the problem that the plated layer of the substrate bonding pad formed integrally with the circuit pattern is scratched or peeled off and thus the wire adhesion with the bonding wire is inferior, the substrate bonding pad is pressed downward against the upper surface of the circuit pattern. Disclosed are a printed circuit board for a chip-on-board (COB) package and a chip-on-board (COB) package using the same.

Description

Printed circuit boards for chip-on-board (COB) packages and chip-on-board packages using the same

The present invention relates to a printed circuit board for a chip-on-board (COB) package and a chip-on-board (COB) package using the same, and more particularly, to a circuit pattern of a printed circuit board for preventing defects associated with the wire bonding process. The present invention relates to a printed circuit board for a chip on board (COB) package in which a substrate bonding pad is formed downward, and a chip on board (COB) package using the same.

According to the trend of technology development of semiconductor chip package, a new method of directly mounting a semiconductor chip onto a printed circuit board by omitting the process of mounting the package using a lead frame and mounting the printed circuit board according to the trend of high density and miniaturization. Packaging methods are attracting attention. The package in which the semiconductor chip is directly mounted on the printed circuit board is called a chip on board package (COB).

In particular, chip-on-board, such as SmartMedia Card or SSFDC (Solid Media Floppy Disc Card), which are used as storage devices for digital signals, such as digital still cameras, digital game consoles, and portable information terminals. A semiconductor chip card (IC Card) using a (COB) package is smaller in size than a conventional memory card, has the same pin count among generations, and thus has high scalability and easy portability. In addition, since the capacity is larger than the ID card or the diskette using a magnetic tape (Magnetic Tape), and the storage and storage is easy, it is expected to be widely used.

Hereinafter, a type of a printed circuit board for a chip on board (COB) package and a chip on board (COB) package using the same will be described with reference to the accompanying drawings.

1 is a perspective view illustrating a printed circuit board for a chip on board (COB) package according to the prior art.

2 is a bottom perspective view illustrating a printed circuit board for a chip on board (COB) package according to the prior art.

3 is a partial cutaway perspective view illustrating a conventional chip on board (COB) package using the printed circuit board shown in FIG.

4 is a perspective view illustrating a wire bonded state of the semiconductor chip and the substrate bonding pad of FIG. 3.

5 is a cross-sectional view taken along line 5-5 of FIG. 3.

Referring to FIGS. 1 and 2, a printed circuit board used in a chip-on-board package (COB Package) will be described. The printed circuit board 10 may include an epoxy resin containing glass fibers ( A thin board body 11 is formed of glass-epoxy resin or BT resin, and a thin copper foil is adhered to an upper surface thereof to form a circuit pattern 12 as an electrical signal transmission path. ; Form a circuit pattern). In addition, a circuit pattern that functions as an external connection terminal 17 is formed on the lower surface thereof, and the circuit pattern 12 of the upper surface is formed through the via hole 14 penetrating through the substrate body 11. And the external connection terminal 17 of the lower surface are electrically connected. In addition, at one end of the circuit pattern 12, a substrate bonding pad 12a, which is a portion electrically connected to the semiconductor chip, is integrally formed with the circuit pattern 12, and the circuit pattern 12 and the substrate bonding pad 12a are formed. ) Height is the same. The circuit pattern 12, the substrate bonding pads 12a, and the external connection terminals 17 have a structure in which a copper pattern layer 15 and a plating layer 13 are formed to prevent oxidation of the copper pattern layer 15. In general, plating is performed using a conductive material such as gold (Au) or nickel (Ni), and plating is performed on the inside of the via hole 14 as well. In addition, the plating layer 13 formed on the copper pattern layer 15 of the substrate bonding pad is formed to prevent oxidation of the copper pattern layer 15 and to improve bonding adhesiveness with the bonding wire 40. Since the copper pattern layer 15 of the circuit pattern is surrounded by the plating layer 13, the copper pattern layer 15 is not exposed to the outside. Thus, a portion of the circuit pattern 12 is cut away in FIG. 1 to show the copper pattern layer 15 and the plating layer 13.

In addition, a chip adhesive part 16 for attaching the semiconductor chip is formed on the substrate body 11. In order to lower the height of the package, the chip bonding part 16 is usually subjected to cavity processing.

The printed circuit board 10 is manufactured in the form of a strip like a lead frame strip of a conventional plastic package, and each printed circuit board 10 is a tie bar 19; It is connected to the guide rail (18) by the ().

Next, a conventional chip on board (COB) package 100 using the above-described printed circuit board 10 will be described with reference to FIGS. 3 to 5.

The conventional chip on board (COB) package 100 includes a semiconductor chip 20, a printed circuit board 10, a bonding wire 40, and an encapsulation unit 50. The semiconductor chip 20 is bonded to the chip bonding portion 16 formed on the upper surface of the printed circuit board 10 by the adhesive 30, and between the chip electrode pad 24 and the substrate bonding pad 12a of the semiconductor chip. The electrical connection is made with a bonding wire 40 such as gold (Au) or aluminum (Al). An external connection terminal 17 is formed on a lower surface of the printed circuit board 10, and the external connection terminal 17 is formed on the inner wall by a via hole 14 plated with a conductive material. ). That is, the circuit pattern 12 electrically connected to the semiconductor chip 20 by the bonding wire 40 is electrically connected to the external connection terminal 17 through the via hole 14. An encapsulation part 50 is formed on an upper surface of the printed circuit board 10 with an encapsulation resin such as an epoxy resin to protect the semiconductor chip 20 and the bonding wire 40.

The chip on board (COB) package 100 having such a structure is used by being assembled to a chip card (not shown) as described above. At this time, the chip-on-board (COB) package 100, as is well known, the upper surface of the printed circuit board 10 is enclosed by the encapsulation 50 so that the semiconductor chip 20 is directed into the chip card. The external connection terminal 17 on the lower surface of the printed circuit board 10 is assembled in an inverted state so as to be exposed to the outside of the chip card. Therefore, the chip card is connected to an external electronic device such as a terminal through an external connection terminal 17 formed on the bottom surface of the printed circuit board 10.

However, the printed circuit board 10 for the chip on board (COB) package is treated as a strip in the assembly process of the chip on board (COB) package, and the circuit pattern 12 formed on the upper surface of the printed circuit board 10 is It protrudes with respect to the upper surface of the substrate body 11. Therefore, since the printed circuit board 10 is handled in a stacked form when it is stored before being put into the process or transported to be put into the process, the circuit pattern is formed by contacting the front and rear surfaces of the stacked printed circuit board 10. Problems that the plating layer 13 of 12 is scratched or peeled off may occur. In addition, when the plating layer 13 of the substrate bonding pad 12a is scratched or peeled off among the circuit patterns 12, the bonding adhesive force of the bonding wire 40 and the substrate bonding pad 12a is lowered in the wire bonding process. As a result, the operating characteristics of the chip on board (COB) package 100 may also be affected.

Accordingly, an object of the present invention is to provide a chip-on-board (COB) package that can overcome the problem that the plating layer formed on the substrate bonding pad is peeled off or scratched by processing the substrate bonding pad of the printed circuit board downwardly with respect to the circuit pattern. To provide a printed circuit board and a chip-on-board (COB) package using the same.

1 is a perspective view showing a printed circuit board for a chip on board (COB) package according to the prior art.

Figure 2 is a bottom perspective view showing a printed circuit board for a chip on board (COB) package according to the prior art.

3 is a partially cutaway perspective view illustrating a conventional chip on board (COB) package using the printed circuit board shown in FIG.

4 is a perspective view illustrating a wire bonded state of the semiconductor chip and the substrate bonding pad of FIG. 3.

5 is a cross-sectional view taken along line 5-5 of FIG. 3.

6 is a perspective view illustrating a circuit pattern having a stepped substrate bonding pad as a printed circuit board for a chip on board (COB) package according to the present invention.

FIG. 7 is a partially cutaway perspective view illustrating a chip on board (COB) package using the printed circuit board of FIG. 6.

8 is a perspective view illustrating a state in which the semiconductor chip and the substrate bonding pad of FIG. 7 are wire bonded.

FIG. 9 is a sectional view taken along line 9-9 of FIG. 7. FIG.

※ Description of the main parts of the drawings ※

110: printed circuit board 111: substrate body

112: circuit pattern 112a: substrate bonding pad

113: copper pattern layer 114: via hole

115: plating layer 116: chip bonding portion

118: gate 120: semiconductor chip

124: chip electrode pad 130: adhesive

140: bonding wire

In order to achieve the above object, a substrate body having an upper surface and a lower surface; A chip adhesive part bonded to the semiconductor chip and formed on the upper surface; A circuit pattern formed on the upper surface except for the chip bonding portion; A substrate bonding pad formed integrally with the circuit pattern and formed to be stepped downward with respect to the circuit pattern for electrical connection with the semiconductor chip bonded to the chip bonding part; An external connection terminal formed on the lower surface for electrical connection with an external device; And a via hole formed through the substrate body in order to connect the circuit pattern to the external connection terminal. The printed circuit board for a chip on board (COB) package is provided.

In order to achieve the above another object, a semiconductor chip formed with a plurality of chip electrode pad; (a) a substrate body having an upper surface and a lower surface, (b) a chip bonding portion formed on the upper surface for bonding the semiconductor chip, and (c) a circuit pattern formed on the upper surface except for the chip bonding portion. And (d) a substrate bonding pad formed integrally with the circuit pattern, the substrate bonding pads being stepped downward with respect to the circuit pattern for electrical connection with the semiconductor chip bonded to the chip bonding portion, and (e) with an external device. A printed circuit board including an external connection terminal formed on the lower surface for electrical connection, and (f) a via hole formed through the substrate body to connect the circuit pattern and the external connection terminal; A bonding wire electrically connecting the chip electrode pad and the substrate bonding pad; And an encapsulation portion formed by encapsulating a portion of a circuit pattern including the semiconductor chip, the bonding wire, and the substrate bonding pad.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

6 is a perspective view illustrating a circuit pattern having a stepped substrate bonding pad as a printed circuit board for a chip on board (COB) package according to the present invention.

FIG. 7 is a partially cutaway perspective view illustrating a chip on board (COB) package using the printed circuit board of FIG. 6.

FIG. 8 is a perspective view illustrating a state in which the semiconductor chip and the substrate bonding pad of FIG. 7 are wire bonded.

FIG. 9 is a sectional view taken along line 9-9 of FIG. 7.

Referring to FIG. 6, a printed circuit board 110 for a chip on board (COB) according to the present invention will be described. The printed circuit board 110 is formed in a strip shape, but each printed circuit board has the same structure. Therefore, only one printed circuit board is shown for convenience.

The printed circuit board 110 for a chip on board (COB) package according to the present invention has various components formed on a conventional substrate body 111 having an upper surface and a lower surface. That is, a circuit pattern 112 formed integrally with the chip bonding part 116 and the substrate bonding pad 112a is formed on the upper surface, and an external connection terminal 117 of FIG. 9 is formed on the lower surface. The via hole 114 is formed along the edge of the substrate body 111.

The chip attaching portion 116 is an area for attaching the semiconductor chip, and usually cavity processing is performed to lower the height of the entire package. The cavity refers to a type of pit recessed by a predetermined depth in the upper surface of the substrate body 111. The circuit pattern 112 is electrically connected to the semiconductor chip and serves as a path for transmitting an electrical signal. The circuit pattern 112 is bonded to the upper surface of the substrate body 111 and then a conventional photo etching process is performed. The pattern is formed in the same way. In addition, the substrate bonding pad 112a at one end of the circuit pattern 112 is electrically connected to the semiconductor chip.

An external connection terminal (117 in FIG. 9) formed on the lower surface of the substrate body 111 of the printed circuit board is a final path through which the semiconductor chip and the external electronic device, for example, the external terminal are electrically connected. The shape of the lower surface of the printed circuit board 110 is the same as that of FIG. 2. The circuit pattern 112 of the upper surface of the substrate body 111 and the external connection terminals of the lower surface of the substrate body 111 are electrically connected to each other through a via hole 114 formed along an edge of the substrate body 111. That is, a path for transferring an electrical signal from the semiconductor chip to the external terminal or from the external terminal to the semiconductor chip is formed through the substrate bonding pad 112a, the circuit pattern 112, the via hole 114, and the external connection terminal.

The circuit pattern 112, the substrate bonding pad 112a, and the external connection terminal have a structure in which a copper pattern layer 115 and a plating layer 113 for preventing oxidation of the copper pattern layer 115 are formed, and the plating layer 113 is formed. In general, the plating is made of a conductive material such as gold or nickel, and the plating of the via hole 114 is similarly performed. In addition, the plating layer 113 formed on the copper pattern layer 115 of the substrate bonding pad is formed to prevent oxidation of the copper pattern layer 115 and to improve bonding adhesion with the bonding wire. Since the copper pattern layer 115 of the circuit pattern is surrounded by the plating layer 113, the copper pattern layer 115 is not exposed to the outside. In FIG. 6, a portion of the circuit pattern 112 is cut to show the copper pattern layer 115 and the plating layer 112.

The printed circuit board 110 is formed in a strip form to achieve automation of the package assembly process. This is similar to a lead frame of a conventional plastic package, in which a plurality of printed circuit boards are connected to the guide rails 118 by tie bars 119, respectively. Typically, a plurality of, for example, six printed circuit boards 110 are connected to one strip having two guide rails 118, and the guide rails 118 are formed with through holes for position recognition and transfer, respectively. .

Here, the substrate bonding pads 112a of the printed circuit board will be described in more detail. The substrate bonding pads 112a according to the present invention are integrally formed with the circuit pattern 112 and with respect to the upper surface of the circuit pattern 112. It is processed downward stepped, it is formed to protrude with respect to the upper surface of the substrate body (111). Here, the reason for processing the substrate bonding pads 112a downwardly with respect to the upper surface of the circuit pattern 112 will be described. The printed circuit board 110 strips which are put into the manufacturing process of the chip on board (COB) package are described. Are handled in a stacked form, so that the upper and lower printed circuit boards of the upper and lower printed circuit boards are moved when the upper and lower The surface is scratched, and in particular, the circuit pattern 112 protruding with respect to the upper surface of the substrate body 111 and the plating layer 113 of the substrate bonding pad are scratched or peeled off. Therefore, in order to prevent a problem that the plating layer 113 of the substrate bonding pad is scratched or peeled off, the substrate bonding pad 112a is processed to be stepped downward with respect to the circuit pattern 112. Here, the substrate bonding pads 112a are processed stepped downward with respect to the top surface of the circuit pattern 112 by coining.

7 to 9, the chip on board (COB) package 200 according to the present invention will be described. The chip on board (COB) package 200 includes a semiconductor chip 120 and a printed circuit board 110. And a bonding wire 140 and an encapsulation part 150. The semiconductor chip 120 is adhered to the chip bonding portion 116 formed on the upper surface of the printed circuit board 110 by the adhesive 130, and between the chip electrode pad 124 and the substrate bonding pad 112a of the semiconductor chip, gold or the like. Electrical connection is made to a bonding wire 140 such as aluminum. An external connection terminal 117 is formed on the lower surface of the printed circuit board 110, and the external connection terminal 117 is formed on the inner wall by a via hole 114 in which a conductive material is plated. ). That is, the circuit pattern 112 electrically connected to the semiconductor chip 120 by the bonding wire 140 is electrically connected to the external connection terminal 117 through the via hole 114. The upper surface of the printed circuit board 110 may be encapsulated with a thermosetting encapsulating resin such as an epoxy resin to protect the semiconductor chip 120, the bonding wire 140, the substrate bonding pad 112a, and the circuit pattern 112. 150 is formed.

Such components are formed through a series of processes in the state of the printed circuit board 110 strip. That is, as in the manufacturing process of a conventional plastic package, the semiconductor chip bonding (Chip Attach), wire bonding (Wire Bonding), proceeds in the order (Molding) in order. After the encapsulation process of forming the encapsulation part 150, that is, the molding process, is completed, the connection portion of the tie bar (119 of FIG. 6) of the substrate body 111 is cut to remove each printed circuit board 110 from the strip. Isolate. Through this process, one chip on board (COB) package 200 is completed.

Therefore, according to the structure of the present invention, since the substrate bonding pads are formed to be stepped downward with respect to the circuit pattern, the problem that the plating layer formed on the substrate bonding pads is scratched or peeled off can be overcome, and thus bonding bonding with the bonding wires is performed. There is an advantage that sex is secured.

Claims (4)

A substrate body having an upper surface and a lower surface; A chip adhesive part bonded to the semiconductor chip and formed on the upper surface; A circuit pattern formed on the upper surface except for the chip bonding portion; A substrate bonding pad formed integrally with the circuit pattern and formed to be stepped downward with respect to the circuit pattern for electrical connection with the semiconductor chip bonded to the chip bonding part; An external connection terminal formed on the lower surface for electrical connection with an external device; And And a via hole formed through the substrate body to connect the circuit pattern and the external connection terminal. 2. The printed circuit board of claim 1, wherein the substrate bonding pads are processed stepped downward with respect to the circuit pattern by a stamping process. A semiconductor chip in which a plurality of chip electrode pads are formed; (a) a substrate body having an upper surface and a lower surface, (b) a chip bonding portion formed on the upper surface for bonding the semiconductor chip, and (c) a circuit pattern formed on the upper surface except for the chip bonding portion. And (d) a substrate bonding pad formed integrally with the circuit pattern, the substrate bonding pads being stepped downward with respect to the circuit pattern for electrical connection with the semiconductor chip bonded to the chip bonding portion, and (e) with an external device. A printed circuit board including an external connection terminal formed on the lower surface for electrical connection, and (f) a via hole formed through the substrate body to connect the circuit pattern and the external connection terminal; A bonding wire electrically connecting the chip electrode pad and the substrate bonding pad; And And an encapsulation portion formed by encapsulating a portion of a circuit pattern including the semiconductor chip, the bonding wire, and the substrate bonding pad. 4. The chip on board (COB) package according to claim 3, wherein the substrate bonding pads are processed stepped downward with respect to the circuit pattern by a stamping process.