KR19980034717A - Parity Method Using Parity Method - Google Patents

Abstract

According to the present invention, in a data exchange system in which a plurality of communication terminals are connected to each other to perform a data exchange function, a frame is added without adding a separate data bit to distinguish a frame boundary in a data path between an input port and an output port. The present invention relates to a method of distinguishing frames that can be transmitted. In a data exchange system that connects a plurality of communication terminals and performs a data exchange function between them, parallel data is used as a switch means to distinguish frames in an internal path. By defining and using additional bits for frame discrimination, non-commercial memory must be used in the implementation of the buffer memory, and the cost of the path resource due to the addition of additional bits increases, which can solve the problem. Frame Another method is to distinguish the frames by checking the parity error at the destination port of the path using the error parity using the parity bits used for the data integrity of the internal path during frame forwarding. This reduces the design cost due to memory with unnecessary bits and reduces the bits in additional switch paths.

Description

Parity Method Using Parity Method

The present invention relates to a method for distinguishing a frame boundary in transmitting frame data between a transmitting side and a receiving side. The present invention relates to an input port of a data exchange system that connects a plurality of communication terminals and performs a data exchange function therebetween. A method of distinguishing between the beginning and the end of a frame for frame data transfer between the and output ports.

Therefore, in order to transfer large amounts of information such as multiple computer systems, multimedia systems, and computer clustering, data must be exchanged at high speed between these computer and processor systems.

A data exchange system that performs the above functions generally includes an input / output port for connecting a plurality of unit computers or processor systems, a switch path for providing a data path between these input / output ports, and a switch switch controller for controlling the switch path.

Therefore, the frame received from the terminal is stored in the input port before being transmitted to the output port and the stored frame is transmitted to the output port through the switch path set in units of frames.

At this time, the frame discrimination method when received from the terminal cannot be maintained in the internal switch path.

The frame discrimination method generally uses a specially defined comma character that can be distinguished when receiving a stream in the case of a serial stream.

Therefore, a method for distinguishing frames internally of the data exchange system should be provided.

To this end, a conventional method has been used by defining additional bits for distinguishing frames in parallel data when parallel data is used as a switch means.

In addition, in the case of a switch means using parallel data, the following problems occur by additionally using bits such as parity bits for data integrity in the switch path.

When the frame is received from the terminal at the input port, the frame is stored in the input buffer. As described above, when the parity bit for distinguishing a frame is added to the parity bit, additional bits of at least two bits are required for 1-byte data. It requires more than a bit of memory and additional bits in the switch path.

In this case, since the memory of 10 bits or more is not a commercial memory unit, unless a special order is made, a memory of more than a bit width necessary for implementation, that is, 4 or 8 bits of memory should be used.

In order to solve the above problem, the present invention stores a frame in an input buffer when a frame is received from the terminal at the input port. As described above, when a parity bit for distinguishing a frame is added to the parity bit, 2 to 1 byte unit data. More bits or more are required, so more than 10 bits of memory are needed and additional bits are required in the switch path.

In this case, since the memory of 10 bits or more is not a commercial memory unit, a memory having a bit width or more that is necessary for implementation, that is, 4 or 8 bits of memory, is required unless specially manufactured.

1 is a block diagram of a data exchange system using the present invention;

2 is a block diagram of a data exchange system having frame boundary discriminating means using parity of the present invention;

3 is an operation flowchart of a transmission control unit in an input port according to the present invention;

4 is an operation flowchart of a transmission control unit in an input port according to the present invention;

5 is a flowchart illustrating a frame transfer process at an output port according to the present invention.

* Description of the symbols for the main parts of the drawings *

10: data exchange system 20: communication terminal

30: outgoing link 31: incoming outgoing link

32: Outgoing transmission link 100: I / O port section

100a: input port part 100b: output port part

110: frame receiving unit 112: parity generator active / inactive control means

113: Receive data bit 114: Frame arrival notification signal

120: parity generation unit 130: input buffer unit

140: transmission control unit 145: path control request signal

150: path control request unit 154: path control response signal

160: output buffer unit 168: transmission data bits

170: parity check unit 178: parity error signal

180: frame transmission unit 200: switch path unit

300: switch path control unit 400: switch path input and output signal

410: switch path input signal 420: switch path output signal

500: path control signal

In order to achieve the above object, the frame discrimination method of the present invention uses parity bits used for data integrity of an internal path during frame forwarding to transmit data at the boundary of a frame using error parity. The frame may be distinguished by checking an error.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a data exchange system using the present invention.

An input / output port 100 for connecting the communication terminal 20 to which the data exchange system is connected through the transmission link 30, a switch path section 200 for providing a data path between the input / output ports, and a path from the input / output port. Path control unit 300 for controlling the switch path in accordance with the control request.

2 is a block diagram of a data exchange system having frame boundary discrimination means using parity of the present invention.

In the illustrated configuration, the frame receiving unit 110 receiving a frame through the receiving transmission link 31, the input buffer 130 storing the received frame, the parity generating unit 120 generating parity bits of the data, and It consists of a transmission controller 140 for transmitting the received frame to the output port and a switch path 200 between the input port and the output port.

In addition, the switch path controller 300 for requesting the setting of the switch path, the output buffer 160 for storing the frames transmitted through the switch path, and the frame transmitter for transmitting the frames of the stored output buffers through the transmission transmission link 32. 18 and an output port arbitration unit 300 for controlling a switch path through an arbitration process for a parity check unit performing parity bit check when a frame of the output buffer is read and a path control request from a path controller of a plurality of input ports. It consists of).

According to the above configuration, a frame received through the serial transmission link 30 through the input port 100a generally has a means of indicating a frame boundary. The received frame is stored in the memory of the input buffer 130 in the data width in units of bytes (8 bits) or words (16 bits) or long words (32 bits).

In this case, when the transmission control unit 140 reads the data of the input buffer 130 and transmits the data through the switch path 200, a means for distinguishing the boundary of the frame is required, and the output port 100b is provided through the switch path 200. A means for distinguishing a frame boundary is also required when the frame transmitter 180 transmits the data through the transmission transmission link 32.

Parity bits are used for data integrity of the internal switch path in configurations such as the data exchange system.

The present invention provides a frame discrimination means by using a parity bit for internal data integrity without additionally using a separate data bit for frame discrimination.

Therefore, in the present invention, a buffer memory including parity bits is used as the input buffer 130 and the output buffer 160.

Therefore, in FIG. 2, an 18-bit memory including parity is used as a case of storing data in units of 16-bit words.

The memory using the 18-bit or 9-bit unit in parallel can be easily purchased in the general market.

The parity generator 120 of the input port 100a has a means 112 that can be controlled by the frame receiving unit 110 to be active or inactive.

The parity generator 120 may use a parity generator provided as a commercial chip.

The input buffer 130 may be configured to use an 18-bit first-in, first-out (FIFO) memory or a 9-bit first-in, first-out memory in parallel.

In addition, the output port 100b may be configured to use the 18-bit first-in first-out memory in the output port 100b to check parity when the frame transmitter 180 reads the output buffer data. The parity checker 170 is used to make this possible.

The frame transmitter 180 uses the parity error 178 when reading the output buffer 160.

The frame transmitter 180 may detect the parity error 178 when reading the output buffer 160.

3 is a flowchart illustrating an operation of a frame receiver in an input port according to the present invention.

When the frame receiving unit receives a frame through the reception link (1), the type of data word is determined (2) In the case of the first word of the frame, the operation of the parity generator is deactivated before the first word data of the frame is stored (3) Parity error When the frame start code, for example, odd parity, is used in the input buffer so that 0101H data is written in the input buffer, and the parity bit (P0,1) is set to 1 when the parity generator is disabled, 4).

After storing, the parity generator is normally activated (5). If the data word is a normal data word, normal frame data is stored together with the data word stored in the input buffer (6).

Next, when the end of frame after the data word is determined, the last word is stored in the input buffer (7) and the parity generator is in an inoperative mode (8) when the last code of the frame is used in the input buffer, for example, odd parity. 1010H data and a parity bit which are different from the frame start code are set to 1 (9), and the parity generator is activated (10).

The frame receiving unit stores the frame in the input buffer unit and sends a frame arrival notification signal to the transmission control unit (11).

In FIG. 4, the switch path is set by the interaction of the output port mediator through the path controller using the destination point address of the frame header, and then the corresponding frame is transmitted to the output port through the switch path.

4 is an operation flowchart of a transmission control unit at an input port according to the present invention.

In FIG. 4, the switch path is set by the output port arbiter through the path controller using the destination address of the frame header, and then the corresponding frame is transmitted to the output port through the switch path.

The transmission control unit checks a parity error by using a parity check function to transmit data stored in an input buffer through a switch path, and distinguishes and processes a frame boundary.

The arrival notification signal indicating whether the frame has arrived is determined (11). If it arrives, the data of the input buffer is read (12) to determine whether the frame is the first code (13). If it is the first time, the frame header is read and the header is stored (15).

After the storage, a path setting request is made to the path control request unit (16) and the path control response is received (17). If it is not received, the path control response is determined again. If the response is received, the stored header is transmitted through the switch path. (18).

After transmission, the input buffer data is read and transferred to the output buffer of the output buffer through the switch path (19). The end of the frame is determined (20). If it is not the end, the data of the input buffer is read again. After 21, the process returns to the determination of the frame arrival notification signal.

5 is a flowchart illustrating a frame transfer process at an output port according to the present invention.

First, it is determined that the output buffer is empty (22). If it is not empty, the output buffer is read and parity checked, and it is determined whether the data word is a general data code of the beginning of the frame or the end of the frame (23).

After the determination, if the frame is the first code, the first frame of the transmission link is transmitted (24), if it is a general data code, the frame data is transmitted through the transmission link (25). The code is sent (26) to return the transmitted values to the empty state determination of the output buffer.

In the frame discrimination method using the parity of the present invention described above, since the bits using data integrity are generally used, the memory including unnecessary bits is used by using a commercially available memory without using additional bits. This reduces the design cost and reduces the bits in the additional switch path.

SUMMARY OF THE INVENTION An object of the present invention is to provide a data exchange system in which a plurality of communication terminals are connected to each other to perform a data exchange function. In the data exchange system, a separate data bit is not added to distinguish a frame boundary in a data path between an input port and an output port. It is to provide a frame discrimination method that can deliver a frame without.

Claims (4)

A frame receiving unit for receiving a frame through a receiving transmission link, an input buffer for storing the received frame, a parity generating unit for generating parity bits of data, a transmission control unit for transmitting the received frame to an output port, and input / output A switch path between ports, a switch path controller for requesting the setting of the path, a frame transmitter for storing frames transmitted through the switch path, a parity check unit for parity bit check of the output buffer frame, and a path controller of a plurality of input ports. In the method for distinguishing a frame comprising an output port arbitration unit for controlling the switch path through the arbitration process for the path control request, Receiving a frame having a boundary to an input port through a serial transmission link; When the frame received through the input port is to be transmitted through the switch path, the boundary of the frame is distinguished according to parity error check and the switch path is set by the mediator interaction using the header destination address of the frame. Transmitting a frame to an output port through the switch path to the end of the frame; And a third process of reading an output buffer to distinguish frame boundaries and transmitting the frames through a transmission link. The method of claim 1, wherein the first process is When the frame receiving unit receives a frame through the receiving link, it determines the type of data word and, in the case of the first word of the frame, deactivates the operation of the parity generator before storing the first word data of the frame, and starts the frame start code in the input buffer to generate a parity error. A first step of storing; A second step of activating the parity generator normally after the storage and storing normal frame data together with the data word stored in the input buffer when the data word is a normal data word; A third step of storing a last word in an input buffer, making a parity generator in an inoperative mode, and storing a frame last code in the input buffer after the data word is determined; And a fourth step of activating the parity generator normally after the operation. The method of claim 1, wherein the second process is Upon arrival, the arrival notification signal indicating whether a frame arrives through the transmission control unit is determined, and when the arrival is performed, the data of the input buffer is read to determine whether the frame is the first one. A first step of storing; A second step of determining a path control response by receiving a path setting request from the path control request unit after the storing and determining a path control response again, and transmitting a stored header through the switch path if the response is received; After the transmission, the input buffer data is read and transferred to the output buffer of the output port through the switch path. If the end of the frame is not determined, the data of the input buffer is read again if the end of the frame is requested, and if the end of the frame is requested, the frame is released again. And a third step of returning to the determination of the arrival notification signal. The method of claim 1, wherein the third process is A first step of determining whether the output buffer is empty, if not, reading the output buffer, parity checking, and determining whether the data word is a frame first code, a general data code, or an end frame code; After the determination, if the first frame code is transmitted, the first frame of the transmission link is transmitted. If the normal data code is transmitted, the frame data is transmitted through the transmission link. And a second step of returning back to the determination of the empty state of the output buffer.