KR102772882B1 - earthquake detector for elevator using 3D accelerator sensor - Google Patents

Abstract

An earthquake detector for an elevator is characterized by including a three-axis acceleration sensor that detects acceleration along the X, Y, and Z axes, a gyro sensor that detects angular velocity, a communication unit that receives elevator operation information from a control unit of the elevator, and an earthquake detection unit that determines whether an earthquake has occurred based on detection information of the three-axis acceleration sensor, detection information of the gyro sensor, and the elevator operation information.

Description

Earthquake detector for elevator using 3D accelerator sensor {earthquake detector for elevator using 3D accelerator sensor}

The present invention relates to an earthquake detector, and more specifically, to an earthquake detector for an elevator using a three-dimensional acceleration sensor.

When an earthquake occurs, elevators become extremely dangerous facilities. As the entire building shakes, the elevator ropes and driving cables in the hoistway also shake, causing damage to parts and hindering the operation of the elevator. This is especially dangerous when operating at high speeds. Therefore, all elevators are prohibited from boarding when an earthquake occurs, and in the case of high-rise buildings, a function to evacuate passengers through earthquake control operation must be added.

The magnitude 5.8 earthquake in Gyeongju and the magnitude 5.4 earthquake in Pohang caused great damage to the region. The earthquakes that hit the Korean Peninsula one after another have clearly revealed the true face of our previously defenseless earthquake disaster response. In particular, the simultaneous elevator entrapment that occurred during the Pohang earthquake served as an opportunity to recognize the need for earthquake-controlled operation. This is because many cases of elevator guide shoes detaching and counterweights severely damaging ceilings and walls were reported during emergency inspections of elevators after the earthquake.

Japan has made it mandatory to install earthquake detection devices in elevators since 2008, and in North America and Europe, there is no institutional obligation, but there are installation recommendations, so building owners install them voluntarily. However, domestic earthquake detection devices are currently installed only in limited areas such as dams, power plants, high-speed railways, and high-rise buildings over 30 stories.

KR 10-1653002 B

The present invention has been proposed to solve the above technical problems, and provides an earthquake detector for an elevator that applies a three-dimensional acceleration sensor with enhanced compatibility, which can be installed on an existing elevator control panel.

According to one embodiment of the present invention for solving the above problem, an earthquake detector for an elevator is provided, including a three-axis acceleration sensor for detecting acceleration of the X, Y, and Z axes, a gyro sensor for detecting angular velocity, a communication unit for receiving elevator operation information from a control unit of the elevator, and an earthquake detection unit for determining whether an earthquake has occurred based on the detection information of the three-axis acceleration sensor, the detection information of the gyro sensor, and the elevator operation information.

In addition, the elevator operation information included in the present invention is characterized by including elevator movement information, movement speed, and door opening information.

In addition, the earthquake detection unit included in the present invention is characterized by distinguishing between natural earthquakes by considering artificial earthquake data generated by elevator movement information, movement speed, and door opening information.

In addition, the earthquake detection unit included in the present invention is characterized in that it determines whether an earthquake has occurred by additionally considering data from at least one building sensing unit installed inside and outside the building in which the elevator is installed.

An elevator earthquake detector using a three-dimensional acceleration sensor according to an embodiment of the present invention can be installed on an existing elevator control panel, thereby enhancing compatibility.

In addition, the accuracy of earthquake detectors for elevators has been improved by identifying artificial and natural earthquakes based on elevator operation information.

Figure 1 is a schematic diagram of a seismic detector (1) for an elevator.
Figure 2 is an example of the installation of a seismic detector (1) for an elevator.
Figure 3 is a configuration diagram of an earthquake detector (1) for an elevator according to an embodiment of the present invention.
Figure 4 is an example of the signal flow of an earthquake detector (1) for an elevator.
Figure 5 is a drawing showing the difference between natural earthquakes and artificial earthquakes.
Figure 6 is an example of a design block considering the shock wave noise of an elevator earthquake detector (1).
Figure 7 is a circuit diagram of a power noise processing unit (420) equipped in an elevator earthquake detector (1).
Fig. 8 is a first embodiment of the attenuation unit (421) of the power noise processing unit (420).
Fig. 9 is a second embodiment of the attenuation unit (421) of the power noise processing unit (420).
Figure 10 is a configuration diagram of the internal protection unit (410).
Figure 11 is a configuration diagram of the internal circuit protection unit (16).
Figure 12 is a circuit diagram of the internal circuit protection unit (16).

Hereinafter, in order to explain in detail an embodiment of the present invention to a degree that a person having ordinary skill in the art to which the present invention pertains can easily practice the technical idea of the present invention, examples of the present invention will be described with reference to the attached drawings.

Fig. 1 is a schematic diagram of an earthquake detector (1) for an elevator, Fig. 2 is an installation example diagram of an earthquake detector (1) for an elevator, Fig. 3 is a configuration diagram of an earthquake detector (1) for an elevator according to an embodiment of the present invention, and Fig. 4 is an example diagram of a signal flow of an earthquake detector (1) for an elevator.

The earthquake detector (1) for an elevator according to this embodiment includes only a brief configuration to clearly explain the technical idea to be proposed.

Referring to FIGS. 1 to 4 simultaneously, an earthquake detector (1) for an elevator is configured to include a three-axis acceleration sensor (110), a gyro sensor (120), a communication unit (130), an earthquake detection unit (200), an internal protection unit (410), a power noise processing unit (420), and a building sensing unit (500).

The earthquake detector (1) for an elevator can be installed inside the elevator control panel on the roof of a building, thereby enhancing compatibility. That is, the existing elevator control unit and the communication unit (130) are configured to be connected by wire (DIO, RS232C, 422, 485) so that data can be shared between them. If the elevator control unit supports wireless communication, it can also be configured to exchange data through a wireless communication module built into the communication unit (130).

The proposed elevator earthquake detector (1) is a device that detects the size of the shaking of the P and S waves of seismic waves through a sensor and outputs an earthquake detection signal (control contact) when shaking exceeding a preset acceleration is detected.

The 3-axis acceleration sensor (110) detects acceleration of the X, Y, and Z axes. The 3-axis acceleration sensor (110) is a sensor that measures how much force an object is receiving based on the Earth's gravitational acceleration. That is, when stationary, the gravitational acceleration acting on the sensor is divided into three vectors along the X, Y, and Z axes to measure the size, and is robust to errors even over time. Since the values of the 3-axis acceleration sensor (110) have specific values even when stationary, they are often used to determine the degree of inclination or to detect vibration.

The acceleration due to gravity can be expressed as a vector sum of the X, Y, and Z values measured by the acceleration sensor, and the acceleration sensor measures these divided vector values. To summarize, the acceleration due to gravity is decomposed into X, Y, and Z axes and the size of each axis is displayed. However, there is a disadvantage in that the angle (azimuth) of rotation with respect to the plane perpendicular to the ground surface cannot be measured.

The gyro sensor (120) detects angular velocity. The gyro sensor (120) is a sensor that detects angular velocity (how many times it moves per second). It is a sensor that applies the principle of detecting angular velocity by utilizing the physical phenomenon that when an object that is moving, that is, has a certain speed, rotates, the Coriolis force works perpendicular to the direction of the velocity.

The Coriolis force (Coriolis force) is an inertial force that appears when an object moves in a rotating reference frame. It is a force with a size proportional to the mass and speed in a direction perpendicular to the direction of motion. The intensity of the force that appears on a rotating object is proportional to the speed of the object, and the direction of the force is perpendicular to the direction in which the object is moving.

The communication unit (130) receives elevator operation information from the elevator control unit, and the communication unit (130) is equipped with both wired and wireless communication modules. Here, the elevator operation information includes elevator movement information, movement speed, and door opening/closing information.

The earthquake detection unit (200) performs an operation to determine whether an earthquake has occurred based on detection information from a three-axis acceleration sensor (110), detection information from a gyro sensor (120), and elevator operation information.

In particular, the earthquake detection unit (200) can distinguish between natural earthquakes by considering artificial earthquake data generated by elevator movement information, movement speed, and door opening information.

That is, since vibration information according to elevator movement information for each floor of the building, vibration information according to movement speed, and vibration information according to door opening and closing are stored in a database, the earthquake detection unit (200) can identify whether it is an artificial earthquake caused by an internal shock or an actual natural earthquake based on this database.

The earthquake detector for elevators (1) is equipped with a frequency detection function using a 3-axis acceleration sensor, a measured seismic wave analysis display function (Hz or gal), a seismic wave level measurement function (displayed based on the intensity), a communication port standard (DIO, RS232C, 422, 485), a log storage function (built-in memory, SD-Card), an error detection sensor, a waterproof and dustproof function (final IP67), and wired and wireless communication functions with the elevator.

Figure 5 is a drawing showing the difference between a natural earthquake and an artificial earthquake, and Figure 6 is an example of a design block considering shock wave noise of an elevator earthquake detector (1).

Referring to FIGS. 5 and 6, since the elevator (EV) is a moving body, regular shock waves are generated by mechanical movement, and errors occur due to interference with the earthquake detector signal.

In the normal operation of an elevator (EV), the door is open and there is a lot of movement of passengers (cargo), etc., and shock waves are generated. Therefore, the elevator door opening/closing information can be received and the vibration in that state can be reflected.

Meanwhile, the earthquake detection unit (200) can additionally consider data from at least one building sensing unit (500) installed inside and outside the building where the elevator is installed to determine whether an earthquake has occurred.

The plurality of building sensing units (500) each include a sensor having the same sensitivity as the three-axis acceleration sensor (110) and the gyro sensor (120). The building sensing unit (500) detects inclination, acceleration, angular velocity, and vibration in the same manner as the three-axis acceleration sensor (110) and the gyro sensor (120) and outputs them as sensing data. The sensing data includes a unique ID of each building sensing unit (500).

The earthquake detection unit (200) receives multiple sensing data and independently determines the elevator's behavior status by interpreting the data context according to time changes.

The earthquake detection unit (200) identifies the locations of multiple building sensing units (500) based on the unique ID of the sensing data and sorts the change points of the multiple sensing data in time and space order to determine living vibrations, abnormality detection, excessive change detection, and progress detection occurring in the building itself.

For example, if vibration is detected by multiple building sensing units (500) installed around the elevator while vibration is not detected by the three-axis acceleration sensor (110) and gyro sensor (120) installed in the elevator machine room and the vibration is transmitted in the vertical direction (in the direction of elevator movement), the earthquake detection unit (200) determines that the vibration is a daily vibration caused by the elevator. In the case of such daily vibration, the earthquake detection unit (200) excludes it from the risk-causing group and then calculates the detection result.

Figure 7 is a circuit diagram of a power noise processing unit (420) equipped in an elevator earthquake detector (1).

Referring to FIG. 7, the power noise processing unit (420) includes a power voltage supply pad (VDD Pad) and a ground voltage supply pad (VSS Pad) that are electrically connected to the internal circuit (control unit, memory, each communication module) to supply power voltage to the circuit unit through a power (VDD) line and a ground (VSS) line, and a decoupling capacitor (Cde-cap) and a variable resistor unit (R) that are connected in parallel with the internal circuit and are connected to the power (VDD) line that connects the internal circuit (control unit, memory, each communication module) and the power voltage supply pad (VDD Pad).

For reference, the internal circuits in this embodiment are explained assuming that they are control units, memory, and communication modules that are greatly affected by power noise.

Since the voltage value at the location where the internal circuit is located can be expressed as the product of the impedance value at the same location and the operating current consumed by the circuit, if the current consumed by the circuit is fixed, the voltage fluctuation range is ultimately proportional to the size of the impedance value, and the larger the parasitic resistance (Rde-cap) value of the decoupling capacitor (Cde-cap), the smaller the impedance value at resonance.

This result is a phenomenon that occurs because the loss at resonance increases as the parasitic resistance (Rde-cap) value increases. A similar result can be obtained even when the metal resistance (Rdie) value is large, but a large metal resistance (Rdie) value is not desirable because the voltage drop due to the DC current increases.

Therefore, in the present invention, by connecting a series variable resistor (R) to a decoupling capacitor (Cde-cap), the impedance value at resonance is reduced in the same way as when the parasitic resistance (Rde-cap) value of the decoupling capacitor (Cde-cap) increases, thereby limiting the voltage drop due to resonance.

The variable resistor section (R) connects the decoupling capacitor (Cde-cap) and the ground (VSS) line, and is configured to vary the resistance value so that the level difference between the power supplied to the power voltage supply pad (VDD Pad) and the power supplied to the internal circuit is minimized.

Fig. 8 shows a first embodiment of an attenuation unit (421) of a power noise processing unit (420), and Fig. 9 shows a second embodiment of an attenuation unit (421) of a power noise processing unit (420).

Referring to FIGS. 8 and 9, first, FIG. 8 is implemented with a plurality of resistance elements (R1 to R4) each having a fixed resistance value and connected to a decoupling capacitor (Cde-cap), and the resistance value of the variable resistance section (R) can be varied by switching on/off. At this time, it is preferable to use resistance elements (R1 to R4) having different resistance values so that a resistance element capable of minimizing voltage drop can be selected.

Next, Fig. 9 is a structure in which a plurality of NMOS transistors (T1 to T4) are connected to a decoupling capacitor (Cde-cap), and an on/off control signal (a1, a2, a3) output from an external variable resistance control logic (10) is input to the gates of the plurality of NMOS transistors (T1 to T3) so that each transistor is turned on/off according to the level of the on/off control signal (a1, a2, a3).

At this time, when the levels of the on/off control signals (a1, a2, a3) are all low, the connection between the decoupling capacitor (Cde-cap) and the ground line is released, so that the power voltage is applied to the gate of the last NMOS transistor (T4).

Meanwhile, the resistance control unit (10) is a logic that outputs an on/off control signal (a1, a2, a3) to turn on or off each of the transistors (T1, T2, T3) connected to the decoupling capacitor (Cde-cap), and is enabled by an external command signal (COMMAND) during the training process to output a combination of logical levels that each of the control signals (a1, a2, a3) can have, thereby selecting a combination with the smallest noise, and inputs the control signal (a1, a2, a3) of the selected combination to the gate of each of the transistors (T1, T2, T3).

Accordingly, when the metal resistance value is reduced through the power noise processing device (420), power noise caused by resonance can be reduced when a problem due to resonance becomes an issue, and thus the driving power of the system can be stably processed.

In addition, as another embodiment of the variable resistance unit, a switching variable resistance means having a switching operation and a function as a variable resistance element may be used. That is, the switching variable resistance means may be composed of an output pulse generation unit that generates a variable amplitude output pulse according to a control signal, and a variable resistor that receives a variable amplitude output pulse and performs a switching operation and has a changing resistance value.

In addition, as another embodiment of the variable resistor, when a plurality of resistance segments are included inside the variable resistor and a plurality of resistance value candidates that the variable resistor may have are arranged in order of size, the plurality of resistance value candidates may be configured to form the same geometric sequence. That is, the variable resistor is composed of a plurality of resistance segments and a plurality of switches connected to the plurality of resistance segments, and the plurality of switches control the connection states of the plurality of resistance segments by each bit or combination of each bit of an N-bit control signal, and the resistance value of the variable resistor can be determined by an exponential function based on the N-bit control signal. Therefore, it is easy for a user to intuitively understand a result due to a change in the resistance value through a control code.

In addition, the earthquake detector (1) for an elevator includes an internal protection unit (410), which can protect the internal circuit (control unit, memory, each communication module) by discharging static electricity or unintended high voltage/current components to the outside through the internal protection unit (410).

Figure 10 is a configuration diagram of an internal protection unit (410).

Referring to FIG. 10, an internal protection unit (410) according to one embodiment of the present invention includes a high voltage generation unit (12), a power-up signal control unit (14), a power-down mode signal control unit (18), and an internal circuit protection unit (16).

The high voltage generation unit (12) pumps the drive voltage (VDD) applied from the outside to generate a high voltage (HVDD) and provides the generated high voltage to the internal circuit protection unit (16). At this time, the high voltage generation unit (12) can prevent malfunction of the internal circuit by generating the highest high voltage that can be generated in the internal circuit.

The power-up signal control unit (14) detects that the potential of the power supply voltage exceeds a certain potential in response to the externally applied driving voltage (VDD) and generates a power-up signal (Powerup).

In addition, the power-up signal control unit (14) delays the high level section of the generated power-up signal (Powerup) for a certain period of time to generate a power-up delay signal (PWRUP_DLY) and provides the generated power-up delay signal (PWRUP_DLY) to the internal circuit protection unit (16).

The power down (deep power down: PWRDN hereinafter) mode signal control unit (18) generates a deep power down signal (PWRDN, power down mode signal hereinafter) in response to a command generated by a combination of command signals such as CAS (Column Access Strobe) and RAS (Row Access Strobe) applied from the outside in order to deactivate unnecessary circuits inside the system so as to reduce power consumption in a standby state where the system is not operating.

And the power down mode signal control unit (18) delays the high level section of the generated power down mode signal (PWRDN) for a certain period of time to generate a power down mode delay signal (PWRDN_Delay).

In this way, the present invention can delay the high level section of the power-up signal and the power-down mode signal (PWRDN) for a certain period of time. This is because, when the system is initialized, the external driving voltage and the high voltage gradually increase from the 0 level to the preset level. However, since the power-up signal and the deep power signal are activated before the high voltage reaches the preset level, leakage current of the transistors occurs, which causes a malfunction of the system. Therefore, the present invention can prevent leakage current of the transistors by delaying the activation time of each signal until the high voltage reaches the preset level.

Meanwhile, the internal circuit protection unit (16) receives a power-up delay signal (PWRUP_DLY) applied from the power-up signal control unit (14) based on the high voltage input from the high voltage generation unit (12), and a power-down mode signal (PWRDN) and a power-down mode delay signal (PWRDN_Delay) applied from the power-down mode signal control unit (18) to prevent overcurrent from flowing into the internal circuit.

Figure 11 is a configuration diagram of an internal circuit protection unit (16), and Figure 12 is a circuit diagram of an internal circuit protection unit (16).

Referring to FIGS. 11 and 12, the internal circuit protection unit (16) includes a level shifting unit (16_2) and an electrostatic discharge prevention unit (16_4).

The level shifting unit (16_2) shifts the level of the power down mode signal (PWRDN) applied from the power down mode signal control unit (18) to the level of the high voltage in response to the high voltage applied from the high voltage generation unit (12).

At this time, the level shifting unit (16_2) shifts the level of the power-down mode signal (PWRDN) to a high voltage level, which allows the highest current that can flow in the internal circuit to flow, thereby preventing leakage current in the first PMOS transistor (T5) of the static electricity prevention unit (16_4), and lowering the level of the driving voltage (VDD) can prevent malfunction of the internal circuit.

The electrostatic protection unit (16_4) responds to a combination of a power-up delay signal (PWRUP_DLY) and a power-down mode delay signal (PWRDN_Delay) to prevent overcurrent from flowing into the internal circuit.

In this way, the internal protection unit (410) according to the present invention generates the highest voltage that can be generated internally to shift the level of the power-down mode signal (PWRDN) to a high voltage level, and compares the shifted high voltage level with the level of the power supply voltage to discharge overcurrent to the outside, thereby preventing malfunction of the internal circuit.

The level shifting unit (16_2) includes an inversion level of a power-down mode signal (PWRDN), first and second input transistors (T3, T4) that input the power-down mode signal (PWRDN), and a mirror transistor (T1, T2) that supplies a high voltage.

At this time, the level shifting unit (16_2) further includes a first inverter unit (IV1) that inverts the level of the power-down mode signal (PWRDN) and applies it to the first input transistor (T3), and a second inverter unit (IV2) that applies the power-down mode signal (PWRDN) to the second input transistor (T4).

The anti-static unit (16_4) prevents destruction of the internal circuit by controlling the amount of current applied to the internal circuit.

This anti-static unit (16_4) includes a combination unit (NOR1) that generates a combination signal by combining a power-up delay signal (PWRUP_DLY) and a power-down mode delay signal (PWRDN_Delay), a first PMOS transistor (T5) that is connected between a power voltage terminal (VDD) and a ground voltage terminal (VSS) and has as input an output signal of a level shifting unit (16_2), a second PMOS transistor (T6) that has as input an inversion level of a combination signal output from the combination unit (NOR1), and a first NMOS transistor (T7) that has as input a combination signal.

Below, the operation of the internal circuit protection unit (16) according to this embodiment will be examined.

First, as an example, we will explain a case where the internal circuit protection unit (16) performs an initialization operation.

The level shifting unit (16_2) receives a power down mode signal (PWRDN) and a high voltage (H_VDD) from each of the power down mode signal control unit (18) and the high voltage generation unit (12).

At this time, the high voltage (H_VDD) and driving voltage (VDD) have not reached the preset level, so overcurrent does not flow in and the internal circuit protection unit (16) does not operate.

Therefore, the output signal of the level shifting unit (16_2) continues to float, and the second PMOS transistor (T6) and the first NMOS transistor (T7) of the static electricity prevention unit (16_4) do not operate.

Meanwhile, when the system is initialized, the external driving voltage and high voltage applied to the level shifting unit (16_2) are gradually increased from level 0 to a preset level. In the past, since the power-up signal and the deep power signal were activated before the high voltage reached the preset level, leakage current of the transistors occurred, which caused a malfunction of the system. Therefore, the invention delays the activation time of the power-up signal and the power-down mode signal (PWRDN) until the high voltage reaches the preset level and applies the delay to the static electricity prevention unit (16_4), thereby preventing leakage current of the transistors.

Next, as another example, a case in which the internal circuit protection unit (16) performs normal operation after an initialization operation will be described.

The level shifting unit (16_2) receives a power down mode signal (PWRDN) and a high voltage (H_VDD) from each of the power down mode signal control unit (18) and the high voltage generation unit (12).

When operating normally, the level shifting unit (16_2) receives a low-level power down mode signal (PWRDN) from the power down mode signal control unit (18), and the input low-level power down mode signal (PWRDN) is output as a high-level power down mode signal (PWRDN) by the first inverter unit (IV1).

A high-level power-down mode signal (PWRDN) is input to the first input transistor (T3) through the first node (N1), and the high-level power-down mode signal (PWRDN) is inverted to a low level again through the second inverter unit (IV2) and input to the second input transistor (T4).

In the level shifting unit (16_2), when the high-level power-down mode signal (PWRDN) increases above the threshold voltage of the first input transistor (T3), the first input transistor (T3) is turned on. Then, the level of the second node (N2) is input to the gate of the second mirror transistor (T2), and accordingly, the second mirror transistor (T2) is turned on.

However, since the second input transistor (T4) receives a low-level power-down mode signal (PWRDN), a high-level output signal is output to the fourth node (N4).

Then, since the static electricity prevention unit (16_4) receives a power-down mode signal higher than the threshold voltage of the first PMOS transistor (T5) from the level shifting unit (16_2), the first PMOS transistor (T5) does not operate.

At this time, the combination unit (NOR1) of the static electricity prevention unit (16_4) outputs a combination signal by combining the power-up delay signal (PWRUP_DLY) and the power-down mode delay signal (PWRDN_Delay) that have a low level in the normal mode. In the static electricity prevention unit (16_4), the second PMOS transistor (T6) and the first NMOS transistor (T7) are turned on by the combination signal output from the combination unit (NOR1), but the first PMOS transistor (T5) does not operate, so no current is discharged.

Finally, as another example, we will explain a case where the internal circuit protection unit (16) of the system operates when the power supply voltage rises excessively.

The level shifting unit (16_2) receives a power down mode signal (PWRDN) and a high voltage (H_VDD) from each of the power down mode signal control unit (18) and the high voltage generation unit (12).

At this time, when the internal voltage rises excessively, the level shifting unit (16_2) receives a high-level power down mode signal (PWRDN) from the power down mode signal control unit (18), and the input high-level power down mode signal (PWRDN) is output as a low-level power down mode signal (PWRDN) by the first inverter unit (IV1).

The low-level power-down mode signal (PWRDN) output in this manner is input to the first input transistor (T3) through the first node (N1), and at the same time, it is inverted to a high-level power-down mode signal (PWRDN) through the second inverter unit (IV2) and input to the second input transistor (T4).

When the low-level power-down mode signal (PWRDN) of the level shifting unit (16_2) decreases below the threshold voltage of the first input transistor (T3), the first input transistor (T3) does not operate. Then, the second node (N2) level is output to the second mirror transistor (T2), and accordingly, the second mirror transistor (T2) also does not operate.

However, since a high-level power-down mode signal (PWRDN) is input to the second input transistor (T4) of the level shifting unit (16_2), the second input transistor (T4) is turned on, thereby causing the level of the fourth node (N4) to become low, and thereby causing a low-level output signal to be output.

Then, when a low level output signal below the threshold voltage of the first PMOS transistor (T5) is input from the level shifting unit (16_2), the static electricity prevention unit (16_4) turns on the first PMOS transistor (T5).

At this time, the combination unit (NOR1) of the electrostatic prevention unit (16_4) receives a power-up delay signal (PWRUP_DLY) and a power-down mode delay signal (PWRDN_Delay) that have a low level even when VDD rises excessively and outputs a combination signal. Since the electrostatic prevention unit (16_4) turns on the second PMOS transistor (T6) and the first NMOS transistor (T7) by the combination signal output from the combination unit (NOR1), it can discharge current so that the level of the power supply voltage is lowered.

In this way, the internal protection unit (410) according to the present invention generates the highest voltage that can be generated internally to shift the level of the power-down mode signal, and compares the shifted voltage level with the level of the power supply voltage to discharge overcurrent to the outside, thereby preventing malfunction of the internal circuit.

An elevator earthquake detector using a three-dimensional acceleration sensor according to an embodiment of the present invention can be installed on an existing elevator control panel, thereby enhancing compatibility.

In addition, the accuracy of earthquake detectors for elevators has been improved by identifying artificial and natural earthquakes based on elevator operation information.

As such, those skilled in the art will understand that the present invention can be implemented in other specific forms without changing the technical idea or essential characteristics thereof. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive. The scope of the present invention is indicated by the claims described below rather than the detailed description above, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be interpreted as being included in the scope of the present invention.

110: 3-axis acceleration sensor
120 : Gyro sensor
130 : Communication Department
200 : Earthquake detection unit
410: Internal protection
420: Power noise processing unit
500 : Building sensing unit

Claims (4)

3-axis acceleration sensor that detects acceleration along the X, Y, and Z axes;
A gyroscope sensor that detects each speed;
A communication unit that receives elevator operation information from the elevator control unit;
An earthquake detection unit that determines whether an earthquake has occurred based on the detection information of the above three-axis acceleration sensor, the detection information of the above gyro sensor, and the above elevator operation information; and
An internal circuit protection unit is included that generates an output signal by shifting the level of a power-down mode signal applied from the outside to a level higher than the driving voltage, and prevents overcurrent from flowing into the internal circuit in response to a combined signal by a combination of a power-up delay signal and a power-down mode delay signal.
The internal circuit protection unit includes a level shifting unit that shifts the level of the power-down mode signal to a level higher than the driving voltage in response to a level higher than the driving voltage and outputs an output signal; and a static electricity prevention unit that discharges the overcurrent to the outside in response to a combination signal of the power-up delay signal and the power-down mode delay signal.
The level shifting unit includes: first and second input transistors that receive the inversion level of the power-down mode signal as input; first and second mirror transistors that supply a level higher than the driving voltage; a first inverter unit that inverts the level of the power-down mode signal and inputs it to the first input transistor; and a second inverter unit that inputs the power-down mode signal to the second input transistor.
The above-described static electricity prevention unit includes a combination unit that generates a combination signal by combining the power-up delay signal and the power-down mode delay signal; a first PMOS transistor that is connected between a power voltage terminal and a ground voltage terminal and has as input an output signal of the level shifting unit; a second PMOS transistor that has as input an inversion level of the combination signal output from the combination unit; and a first NMOS transistor that has as input the combination signal.
The above earthquake detection unit additionally considers data from at least one building sensing unit installed inside and outside the building where the elevator is installed to determine whether an earthquake has occurred.
The plurality of building sensing units each include a sensor having the same sensitivity as the three-axis acceleration sensor and the gyro sensor, and each building sensing unit detects inclination, acceleration, angular velocity and vibration in the same manner as the three-axis acceleration sensor and the gyro sensor and outputs the sensing data - including a unique ID of each building sensing unit.
The above earthquake detection unit receives multiple sensing data and independently determines the elevator's behavior status by interpreting the data context according to time changes, and identifies the locations of multiple building sensing units based on the unique ID of the sensing data, and sorts the change points of the multiple sensing data in time and space order to determine living vibration, abnormality detection, excessive change detection, and progressive detection occurring in the building itself.
An earthquake detector for an elevator, characterized in that the above earthquake detection unit determines that the vibration is a living vibration caused by the elevator when vibration is detected by a plurality of building sensing units installed around the elevator while no vibration is detected by the three-axis acceleration sensor and gyro sensor installed in the elevator machine room, and the vibration is transmitted in a vertical direction (in the direction of elevator movement).
In the first paragraph,
The above elevator operation information is:
An earthquake detector for an elevator, characterized by including elevator movement information, movement speed, and door opening information.
In the first paragraph,
The above earthquake detection unit,
An earthquake detector for an elevator characterized by distinguishing between natural earthquakes and artificial earthquake data generated by elevator movement information, movement speed, and door opening information.
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