KR102347402B1 - 측벽 이미지 전사 방법 - Google Patents
측벽 이미지 전사 방법 Download PDFInfo
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- KR102347402B1 KR102347402B1 KR1020187038105A KR20187038105A KR102347402B1 KR 102347402 B1 KR102347402 B1 KR 102347402B1 KR 1020187038105 A KR1020187038105 A KR 1020187038105A KR 20187038105 A KR20187038105 A KR 20187038105A KR 102347402 B1 KR102347402 B1 KR 102347402B1
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- 238000000034 method Methods 0.000 title claims abstract description 159
- 238000012546 transfer Methods 0.000 title description 10
- 239000007789 gas Substances 0.000 claims abstract description 127
- 230000008569 process Effects 0.000 claims abstract description 111
- 239000000758 substrate Substances 0.000 claims abstract description 96
- 125000006850 spacer group Chemical group 0.000 claims abstract description 55
- 238000012545 processing Methods 0.000 claims abstract description 48
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 34
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 31
- 239000010703 silicon Substances 0.000 claims abstract description 31
- 239000011261 inert gas Substances 0.000 claims abstract description 11
- 238000000151 deposition Methods 0.000 claims abstract description 8
- 238000005530 etching Methods 0.000 claims description 14
- 238000003672 processing method Methods 0.000 claims description 14
- 229910052786 argon Inorganic materials 0.000 claims description 12
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 6
- 230000004907 flux Effects 0.000 claims description 5
- 150000005837 radical ions Chemical class 0.000 claims description 3
- 229920001296 polysiloxane Polymers 0.000 claims 1
- 230000005284 excitation Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 41
- 238000000231 atomic layer deposition Methods 0.000 description 17
- 229910004298 SiO 2 Inorganic materials 0.000 description 16
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 9
- 238000002347 injection Methods 0.000 description 9
- 239000007924 injection Substances 0.000 description 9
- 239000000463 material Substances 0.000 description 9
- 238000005086 pumping Methods 0.000 description 9
- 238000001020 plasma etching Methods 0.000 description 7
- 238000010926 purge Methods 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
- 229910052757 nitrogen Inorganic materials 0.000 description 6
- 239000002243 precursor Substances 0.000 description 5
- 239000002356 single layer Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 4
- 239000000376 reactant Substances 0.000 description 4
- 238000011282 treatment Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 3
- 229910052736 halogen Inorganic materials 0.000 description 3
- 150000002367 halogens Chemical class 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000001105 regulatory effect Effects 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 239000006227 byproduct Substances 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000003085 diluting agent Substances 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000010849 ion bombardment Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001208 nuclear magnetic resonance pulse sequence Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000009931 pascalization Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 230000000379 polymerizing effect Effects 0.000 description 1
- 239000012713 reactive precursor Substances 0.000 description 1
- 230000003134 recirculating effect Effects 0.000 description 1
- 239000003507 refrigerant Substances 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000004626 scanning electron microscopy Methods 0.000 description 1
- 238000013515 script Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
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- G03F7/70—Microphotolithographic exposure; Apparatus therefor
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- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
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- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
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Abstract
Description
도 1a~1c는 기판 처리 방법을 개략적으로 예시한 단면도이고;
도 2a~2c는 본 발명의 일 실시예에 따른 기판 처리 방법을 개략적으로 예시한 단면도이고;
도 3a~3c는 기판 처리 방법을 개략적으로 예시한 단면도이고;
도 4a~4c는 본 발명의 일 실시예에 따른 기판 처리 방법을 개략적으로 예시한 단면도이고;
도 5a 및 도 5b는 본 발명의 일 실시예에 따른 스페이서 에칭에 대한 실험적 결과를 예시하고;
도 6은 본 발명의 일 실시예에 따른 원자층 증착(ALD) 시스템을 개략적으로 예시하며;
도 7은 본 발명의 일 실시예에 따른 용량성 결합 플라즈마(CCP) 시스템을 개략적으로 예시한다.
Claims (20)
- 기판 처리 방법으로서:
실리콘(Si) 돌출 형상부(raised feature)를 포함하는 기판을 제공하는 단계;
상기 실리콘 돌출 형상부 상에 컨포멀 필름(conformal film)을 증착하는 단계;
상기 실리콘 돌출 형상부 상에 측벽 스페이서를 형성하도록 상기 컨포멀 필름의 수직부를 실질적으로 남기면서 상기 컨포멀 필름의 수평부를 제거하는 스페이서 에칭 처리를 수행하는 단계로서:
a) 상기 기판을 H2 가스와 선택적으로 불활성 가스로 구성된 플라즈마 여기된 제1 공정 가스에 노출시키는 단계; 및
b) 상기 기판을, i) NF3, O2, H2 및 Ar, ii) NF3, O2 및 H2, iii) NF3 및 O2, iv) NF3, O2 및 Ar, v) NF3 및 H2, 또는 vi) NF3, H2 및 Ar을 함유하는 플라즈마 여기된 제2 공정 가스에 노출시키는 단계
를 포함하는, 에칭 처리 수행 단계; 및
상기 기판 상의 상기 측벽 스페이서를 유지하면서 상기 실리콘 돌출 형상부를 제거하는 단계로서:
c) 상기 기판을 H2 가스와 선택적으로 불활성 가스로 구성된 플라즈마 여기된 제3 공정 가스에 노출시키는 단계; 및
d) 상기 기판을, i) NF3, O2, H2 및 Ar, ii) NF3, O2 및 H2, iii) NF3 및 O2, iv) NF3, O2 및 Ar, v) NF3 및 H2, 또는 vi) NF3, H2 및 Ar을 함유하는 플라즈마 여기된 제4 공정 가스에 노출시키는 단계
를 포함하는 제거 단계
를 포함하는 것을 특징으로 하는 기판 처리 방법. - 제1항에 있어서, 상기 제1 및 제3 공정 가스는 H2 및 Ar으로 구성된 것을 특징으로 하는 기판 처리 방법.
- 제1항에 있어서, 상기 제2 및 제4 공정 가스는 NF3, O2, H2 및 Ar으로 구성된 것을 특징으로 하는 기판 처리 방법.
- 제1항에 있어서, 상기 Si 돌출 형상부는 Si 원소로 구성된 것을 특징으로 하는 기판 처리 방법.
- 제4항에 있어서, 상기 Si 원소는 다결정 Si(poly-Si) 또는 비정질 Si(a-Si)을 포함하는 것을 특징으로 하는 기판 처리 방법.
- 제1항에 있어서, 상기 컨포멀 필름은 SiN을 포함하는 것을 특징으로 하는 기판 처리 방법.
- 제1항에 있어서, 상기 플라즈마 여기된 제1 공정 가스, 상기 플라즈마 여기된 제2 공정 가스, 상기 플라즈마 여기된 제3 공정 가스, 및 상기 플라즈마 여기된 제4 공정 가스는 상부 플레이트 전극과 상기 기판을 지지하는 하부 플레이트 전극을 포함하는 용량성 결합 플라즈마 소스를 사용하여 형성되는 것을 특징으로 하는 기판 처리 방법.
- 제1항에 있어서, 상기 플라즈마 여기된 제1 공정 가스, 상기 플라즈마 여기된 제2 공정 가스, 상기 플라즈마 여기된 제3 공정 가스, 및 상기 플라즈마 여기된 제4 공정 가스는 높은 라디칼-이온 플럭스 비율을 생성하는 원격 플라즈마 소스를 사용하여 형성되는 것을 특징으로 하는 기판 처리 방법.
- 제1항에 있어서, 상기 a)와 b) 단계 및 상기 c)와 d) 단계를 적어도 적어도 1회 반복하는 단계를 더 포함하는 것을 특징으로 하는 기판 처리 방법.
- 기판 처리 방법으로서:
실리콘 돌출 형상부를 포함하는 기판을 제공하는 단계;
상기 실리콘 돌출 형상부 상에 컨포멀 필름을 증착하는 단계;
상기 컨포멀 필름의 수직부를 실질적으로 변형되지 않게 남기면서 상기 컨포멀 필름의 수평부를 변형시키는 플라즈마 공정을 수행하는 단계로서,
a) 상기 기판을 H2 가스와 선택적으로 불활성 가스로 구성된 플라즈마 여기된 제1 공정 가스에 노출시키는 단계; 및
b) 상기 기판을, i) NF3, O2, H2 및 Ar, ii) NF3, O2 및 H2, iii) NF3 및 O2, iv) NF3, O2 및 Ar, v) NF3 및 H2, 또는 vi) NF3, H2 및 Ar을 함유하는 플라즈마 여기된 제2 공정 가스에 노출시키는 단계
를 포함하는, 플라즈마 공정 수행 단계; 및
상기 컨포멀 필름의 변형된 수평부 및 상기 실리콘 돌출 형상부를 제거하는 단계로서,
c) 상기 기판을 H2 가스와 선택적으로 불활성 가스로 구성된 플라즈마 여기된 제3 공정 가스에 노출시키는 단계; 및
d) 상기 기판을, i) NF3, O2, H2 및 Ar, ii) NF3, O2 및 H2, iii) NF3 및 O2, iv) NF3, O2 및 Ar, v) NF3 및 H2, 또는 vi) NF3, H2 및 Ar을 함유하는 플라즈마 여기된 제4 공정 가스에 노출시키는 단계
를 포함하는 제거 단계
를 포함하는 것을 특징으로 하는 기판 처리 방법. - 제10항에 있어서, 상기 제1 및 제3 공정 가스는 H2 및 Ar으로 구성된 것을 특징으로 하는 기판 처리 방법.
- 제10항에 있어서, 상기 제2 및 제4 공정 가스는 NF3, O2, H2 및 Ar으로 구성된 것을 특징으로 하는 기판 처리 방법.
- 제10항에 있어서, 상기 실리콘 돌출 형상부는 다결정 Si(poly-Si) 또는 비정질 Si(a-Si)을 포함하는 것을 특징으로 하는 기판 처리 방법.
- 제10항에 있어서, 상기 컨포멀 필름은 SiN을 포함하는 것을 특징으로 하는 기판 처리 방법.
- 제10항에 있어서, 상기 플라즈마 여기된 제1 공정 가스, 상기 플라즈마 여기된 제2 공정 가스, 상기 플라즈마 여기된 제3 공정 가스, 및 상기 플라즈마 여기된 제4 공정 가스는 상부 플레이트 전극과 상기 기판을 지지하는 하부 플레이트 전극을 포함하는 용량성 결합 플라즈마 소스를 사용하여 형성되는 것을 특징으로 하는 기판 처리 방법.
- 제10항에 있어서, 상기 플라즈마 여기된 제1 공정 가스, 상기 플라즈마 여기된 제2 공정 가스, 상기 플라즈마 여기된 제3 공정 가스, 및 상기 플라즈마 여기된 제4 공정 가스는 높은 라디칼-이온 플럭스 비율을 생성하는 원격 플라즈마 소스를 사용하여 형성되는 것을 특징으로 하는 기판 처리 방법.
- 제10항에 있어서, 상기 a)와 b) 단계 및 상기 c)와 d) 단계를 적어도 1회 반복하는 단계를 더 포함하는 것을 특징으로 하는 기판 처리 방법.
- 기판 처리 방법으로서:
실리콘 돌출 형상부 상에 SiN 측벽 스페이서를 포함하는 기판을 제공하는 단계; 및
상기 기판 상의 상기 SiN 측벽 스페이서를 유지하면서 상기 실리콘 돌출 형상부를 제거하는 단계
를 포함하며, 상기 제거 단계는:
상기 기판을 H2 가스와 선택적으로 불활성 가스로 구성된 플라즈마 여기된 제1 공정 가스에 노출시키는 단계; 및
상기 기판을, i) NF3, O2, H2 및 Ar, ii) NF3, O2 및 H2, iii) NF3 및 O2, iv) NF3, O2 및 Ar, v) NF3 및 H2, 또는 vi) NF3, H2 및 Ar을 함유하는 플라즈마 여기된 제2 공정 가스에 노출시키는 단계
를 포함하는 것을 특징으로 하는 기판 처리 방법. - 제18항에 있어서, 상기 제1 공정 가스는 H2 및 Ar으로 구성되며, 상기 제2 공정 가스는 NF3, O2, H2 및 Ar으로 구성된 것을 특징으로 하는 기판 처리 방법.
- 제18항에 있어서, 상기 노출 단계를 적어도 1회 반복하는 단계를 더 포함하는 것을 특징으로 하는 기판 처리 방법.
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| US10192743B2 (en) * | 2016-08-29 | 2019-01-29 | Tokyo Electron Limited | Method of anisotropic extraction of silicon nitride mandrel for fabrication of self-aligned block structures |
| US10312102B2 (en) | 2016-08-29 | 2019-06-04 | Tokyo Electron Limited | Method of quasi-atomic layer etching of silicon nitride |
| TWI761461B (zh) | 2017-02-23 | 2022-04-21 | 日商東京威力科創股份有限公司 | 用於製造自對準塊體結構之矽氮化物心軸的異向性抽出方法 |
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| US10607852B2 (en) * | 2017-09-13 | 2020-03-31 | Tokyo Electron Limited | Selective nitride etching method for self-aligned multiple patterning |
| KR102455355B1 (ko) * | 2018-01-15 | 2022-10-18 | 어플라이드 머티어리얼스, 인코포레이티드 | 원격 플라즈마 산화에 대한 아르곤 추가 |
| JP7025952B2 (ja) * | 2018-02-16 | 2022-02-25 | 東京エレクトロン株式会社 | エッチングする方法及びプラズマ処理装置 |
| JP2019165090A (ja) * | 2018-03-19 | 2019-09-26 | 東芝メモリ株式会社 | 半導体装置の製造方法および半導体製造装置 |
| US10867804B2 (en) * | 2018-06-29 | 2020-12-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Patterning method for semiconductor device and structures resulting therefrom |
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| KR100322545B1 (ko) * | 1999-02-10 | 2002-03-18 | 윤종용 | 건식 세정 공정을 전 공정으로 이용하는 반도체 장치의콘택홀 채움 방법 |
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