KR102313253B1 - 무선 주파수 장치 및 대응 방법 - Google Patents
무선 주파수 장치 및 대응 방법 Download PDFInfo
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- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
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- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
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- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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Abstract
위상 고정 루프(PLL) 회로를 포함하는 무선 주파수 장치가 제공된다. 자동 이득 제어(AGC) 회로를 사용해서 PLL 회로에 기준 신호를 제공한다.
Description
도 2는 일 실시예에 따른 위상 배열 시스템을 나타내는 도면,
도 3은 일 실시예에 따른 위상 배열 시스템을 나타내는 도면,
도 4는 일 실시예에 따른 위상 고정 루프를 나타내는 블록도,
도 5는 일 실시예에 따른 방법을 나타내는 흐름도,
도 6a 내지 6c는 일부 실시예에 따른 위상 배열 시스템의 도면,
도 7은 일부 실시예에서 사용 가능한 자동 이득 제어 회로를 나타낸다.
Claims (14)
- 무선 주파수 장치(10)로서,
위상 고정 루프(phase-locked loop) 회로(12)와,
자동 이득 제어 회로(11, 40)
를 포함하고,
상기 자동 이득 제어 회로(11, 40)의 출력은 상기 위상 고정 루프 회로(12)의 기준 신호 입력에 접속되며, 상기 자동 이득 제어 회로에 의해 상기 기준 신호가 조정되는 진폭은 상기 위상 고정 루프 회로의 위상 대 진폭 특성에 기초하여 선택되고, 상기 위상 대 진폭 특성은 상기 기준 신호의 진폭 변화에 대한 상기 위상 고정 루프 회로의 출력 위상의 감도(sensitivity)를 포함하고,
상기 자동 이득 제어 회로에 의해 상기 기준 신호가 조정되는 상기 선택된 진폭은, 상기 기준 신호의 진폭 변화에 대한 상기 출력 위상의 감도가 다른 진폭 영역에 비해 낮은 전압인
무선 주파수 장치(10).
- 제 1 항에 있어서,
상기 위상 고정 루프 회로(12)는 정수 N 위상 고정 루프 회로를 포함하는
무선 주파수 장치(10).
- 제 1 항 또는 제 2 항에 있어서,
상기 위상 고정 루프 회로(12)는 로컬 오실레이터 신호를 생성하도록 구성되는
무선 주파수 장치(10).
- 제 1 항 또는 제 2 항에 있어서,
상기 장치는 테스트 회로(22, 23, 24, 25, 26)를 더 포함하고,
상기 테스트 회로는 상기 위상 고정 루프 회로(12)의 출력에 접속되는
무선 주파수 장치(10).
- 제 4 항에 있어서,
상기 테스트 회로(22, 23, 24, 25, 26)는, 상기 위상 고정 루프 회로의 상기 출력을 기준으로서 사용하도록 구성된 적어도 하나의 위상 검출기(24, 25)를 포함하는
무선 주파수 장치(10).
- 제 1 항 또는 제 2 항에 있어서,
상기 자동 이득 제어 회로(11, 40)는, 시간 경과 동안의 상기 자동 이득 제어 회로(11, 40)의 출력 신호의 진폭의 적어도 소정의 안정성을 제공하도록 구성되는
무선 주파수 장치(10).
- 제 1 항에 있어서,
상기 위상 고정 루프 회로(12)의 출력에 접속된 믹서
를 더 포함하는 무선 주파수 장치(10).
- 제 1 항 또는 제 2 항에 있어서,
위상 배열 장치
를 더 포함하는 무선 주파수 장치(10).
- 제 8 항에 있어서,
상기 무선 주파수 장치는 상기 위상 고정 루프 회로(12)의 출력 신호를 위상 교정에 사용하도록 구성되는
무선 주파수 장치(10).
- 청구항 8에 개시된 복수의 무선 주파수 장치(10)를 포함하고,
상기 장치 각각의 상기 자동 이득 제어 회로에 기준 신호를 제공하도록 구성된 기준 신호 라인을 더 포함하는
위상 배열 시스템.
- 방법으로서,
기준 신호를 제공하는 단계와,
상기 기준 신호에 대한 자동 이득 제어를 수행해서 이득 제어된 신호를 제공하는 단계 - 상기 자동 이득 제어를 수행함으로써 상기 기준 신호가 조정되는 진폭은 위상 고정 루프의 위상 대 진폭 특성에 기초하여 선택됨 - 와,
상기 이득 제어된 신호를 위상 고정 루프의 기준 입력 단에서 상기 위상 고정 루프에 제공하는 단계와,
무선 주파수 장치에서 상기 위상 고정 루프의 출력을 사용하는 단계
를 포함하고,
상기 위상 대 진폭 특성은 상기 기준 신호의 진폭 변화에 대한 상기 위상 고정 루프 회로의 출력 위상의 감도(sensitivity)를 포함하고, 상기 자동 이득 제어에 의해 상기 기준 신호가 조정되는 상기 선택된 진폭은, 상기 기준 신호의 진폭 변화에 대한 상기 출력 위상의 감도가 다른 진폭 영역에 비해 낮은 전압인
방법.
- 제 11 항에 있어서,
상기 출력을 사용하는 단계는, 상기 출력을 위상 배열 시스템에서의 교정에 사용하는 단계를 포함하는
방법.
- 제 11 항 또는 제 12 항에 있어서,
상기 출력을, 주파수 업컨버전과 주파수 다운컨버전 중 적어도 하나에 사용하는 단계를 더 포함하는
방법.
- 제 12 항에 있어서,
상기 자동 이득 제어를 수행하는 것은, 시간 경과 동안의 적어도 소정의 안정성을 가진 상기 이득 제어된 신호의 진폭을 제공하는 것을 포함하는
방법.
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| DE102016124783.9 | 2016-12-19 | ||
| DE102016124783.9A DE102016124783A1 (de) | 2016-12-19 | 2016-12-19 | Hochfrequenzvorrichtung und entsprechendes Verfahren |
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| US10484106B2 (en) * | 2016-05-05 | 2019-11-19 | International Business Machines Corporation | Antenna calibration |
| WO2020017290A1 (ja) * | 2018-07-20 | 2020-01-23 | 京セラ株式会社 | 電子機器、電子機器の制御方法、及び電子機器の制御プログラム |
| US11086004B2 (en) | 2018-10-23 | 2021-08-10 | Infineon Technologies Ag | RF-DAC digital signal modulation |
| US11588240B2 (en) * | 2020-10-07 | 2023-02-21 | The Regents Of The University Of California | Millimeter-wave scalable PLL-coupled array for phased-array applications |
| US10979059B1 (en) * | 2020-10-26 | 2021-04-13 | Ciena Corporation | Successive approximation register analog to digital converter based phase-locked loop with programmable range |
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| KR101635425B1 (ko) * | 2014-12-24 | 2016-07-01 | 엘아이지넥스원 주식회사 | 위상 배열 레이더 시스템 및 이의 위상 보정 방법 |
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| JPH03117203A (ja) * | 1989-09-29 | 1991-05-20 | Nec Corp | 位相固定ループによるfm復調回路 |
| US7548593B2 (en) * | 2005-09-15 | 2009-06-16 | Qualcomm Incorporated | Baseband compensation of an offset phase locked loop |
| KR101532281B1 (ko) * | 2008-01-14 | 2015-06-29 | 퀄컴 테크놀로지스, 인크. | 휴대용 무선 장치들의 개선점 또는 그에 관련된 개선점 |
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2016
- 2016-12-19 DE DE102016124783.9A patent/DE102016124783A1/de active Pending
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2017
- 2017-11-28 CN CN201711216157.8A patent/CN108233975B/zh active Active
- 2017-11-29 US US15/825,785 patent/US20180175947A1/en not_active Abandoned
- 2017-12-18 KR KR1020170174011A patent/KR102313253B1/ko active Active
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2020
- 2020-04-06 KR KR1020200041337A patent/KR20200039636A/ko not_active Withdrawn
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR101635425B1 (ko) * | 2014-12-24 | 2016-07-01 | 엘아이지넥스원 주식회사 | 위상 배열 레이더 시스템 및 이의 위상 보정 방법 |
Also Published As
| Publication number | Publication date |
|---|---|
| DE102016124783A1 (de) | 2018-06-21 |
| US20180175947A1 (en) | 2018-06-21 |
| CN108233975A (zh) | 2018-06-29 |
| KR20180071179A (ko) | 2018-06-27 |
| KR20200039636A (ko) | 2020-04-16 |
| CN108233975B (zh) | 2021-06-04 |
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