KR101675855B1 - Shift register - Google Patents

Abstract

The present invention relates to a shift register capable of stabilizing the output from the stage by preventing leakage of charge from the voltage of the set node. A shift register according to the present invention includes a plurality of stages for sequentially outputting scan pulses, each stage including a node controller for controlling signal states of a set node and a reset node, and a plurality of clock pulses having different phases And outputting the supplied clock pulse as a scan pulse through its output terminal according to the signal state of the set node and the reset node. At this time, at least one of the switching elements provided in the node control section of each stage is constituted by a four-terminal switching element whose threshold voltage can be adjusted by an external voltage.

Description

SHIFT REGISTER {SHIFT REGISTER}

The present invention relates to a shift register, and more particularly to a shift register capable of stabilizing the output from the stage by preventing leakage of charge from the voltage of the set node.

The shift register sequentially outputs a plurality of scan pulses to sequentially drive gate lines of a display device such as a liquid crystal display device. For this purpose, the shift register includes a plurality of switching elements therein, and an oxide semiconductor transistor may be used as the switching element.

1 is a graph showing a relationship between a gate voltage and a drain current according to a temperature of a conventional oxide semiconductor transistor.

When an N-type oxide semiconductor transistor is used in a shift register, it is preferable that its threshold voltage has a positive value. However, as shown in FIG. 1, as the temperature increases, the threshold voltage of the oxide semiconductor transistor shifts in the negative direction. As a result, the N-type oxide semiconductor transistor to be turned off in the output period of the shift register The leakage current does not normally turn on at a high temperature and the voltage of the set node is lowered due to the leakage current and the output of the shift register is not normally generated.

FIG. 2 is a view showing voltage and scan pulse voltage of a set node according to a change in threshold voltage of a conventional oxide semiconductor transistor.

As shown in FIG. 2A, when the threshold voltage of the oxide semiconductor transistor is -1, the voltage of the set node is lowered rapidly due to the leakage current of the oxide semiconductor transistor, so that the output, that is, the voltage of the scan pulse, It can be seen that it is descending.

Also, as shown in FIG. 2B, when the threshold voltage of the oxide semiconductor transistor is -3, the leakage current of the oxide semiconductor transistor is further increased, so that the voltage of the set node is not even raised. As a result, no scan pulse is generated at all .

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above-mentioned problems, and it is an object of the present invention to provide a switching element for discharging a set node, which comprises a 4-terminal element including a sub terminal, And to provide a shift register capable of normally generating a scan pulse by completely turning off the switching element during an output period in which the clock pulse is output as a scan pulse by supplying a clock pulse having a large voltage value.

According to an aspect of the present invention, there is provided a shift register including a plurality of stages sequentially outputting scan pulses, each stage including a node controller for controlling signal states of a set node and a reset node, And outputting the supplied clock pulse as a scan pulse through its output terminal in accordance with a signal state of the set node and the reset node, Wherein at least one of the switching elements provided in the node control section of the node control section is a four-terminal switching element whose threshold voltage can be adjusted by an external voltage.

The n-th stage node control unit may include a first switching device that is turned on or turned off in response to a scan pulse from the (n-2) th stage and electrically connects the power source for charging at the turn- A second switching element that is turned on or off in response to a charging voltage from the charging power supply and electrically connects the charging power supply and the set node when turned on; A third switching element that is turned on or off in response to the pulse and electrically connects the set node and the discharge power supply when the first switch is turned on and the second switch turns on or off in response to the voltage supplied to the set node, Off or turn-off in response to a voltage supplied to the set node, and turns on or off in response to a voltage supplied to the set node, wherein the turn- A fifth switching device for electrically connecting the node and the discharge power source to each other, and an n + 2-th stage for turning on or off in response to a scan pulse from the n + And a sixth switching element electrically connecting the first and second switching elements to each other, wherein a discharging voltage from the discharging power source is smaller than the charging voltage, and at least one of the fifth and sixth switching elements is a four terminal switching element .

The output section provided in the n-th stage may be turned on or off according to a signal state of the set node, and when the turn-on state is selected, And a pull-down switching element that is turned on or off according to a signal state of the reset node and electrically connects the output terminal of the n-th stage and the discharge power source to each other when the switch is turned on .

The n-th stage node control unit may include a first switching device that is turned on or turned off in response to a scan pulse from the (n-2) th stage and electrically connects the power source for charging at the turn- A second switching element that is turned on or off in response to a charging voltage from the charging power supply and electrically connects the charging power supply and the set node when turned on; A third switching element that is turned on or off in response to the pulse and electrically connects the set node and the discharge power supply when the first switch is turned on and the second switch turns on or off in response to the voltage supplied to the set node, Off or turn-off in response to a voltage supplied to the set node, and turns on or off in response to a voltage supplied to the set node, wherein the turn- A fifth switching device for electrically connecting the node and the discharge power source to each other, a second switching device for turning on or off in response to a scan pulse from the (n + 2) th stage, And a sixth switching device for electrically connecting the lines to each other, wherein a discharge voltage from the discharge power source is smaller than the charging voltage, and the fifth switching device is a four-terminal switching device.

The n-th stage node control unit may include a first switching device that is turned on or turned off in response to a scan pulse from the (n-2) th stage and electrically connects the power source for charging at the turn- A second switching element that is turned on or off in response to a charging voltage from the charging power supply and electrically connects the charging power supply and the set node when turned on; A third switching element that is turned on or off in response to a pulse and electrically connects the set node and the first discharging power supply when turned on, a third switching element that turns on or off in response to the voltage supplied to the set node, A fourth switching element that is turned off and turns on when the reset node and the first power supply are electrically connected to each other in a turn-on state, a fourth switching element that is turned on or off in response to a voltage supplied to the set node, - ONSHI A fifth switching device for electrically connecting the set node and a second discharge power source to each other, a second switching device for turning on or off the scan signal in response to a scan pulse from the (n + 2) A first discharging voltage from the first discharging power source and a second discharging voltage from the second discharging power source are connected to the charging voltage The first discharge voltage is smaller than the second discharge voltage, and the third and fourth switching elements are four-terminal switching elements.

The output section provided in the n-th stage may be turned on or off according to a signal state of the set node, and when the turn-on state is selected, And a pull-down switching element that is turned on or off according to a signal state of the reset node and electrically connects the output terminal of the n-th stage to the second power source .

The n-th stage node control unit may include a first switching device that is turned on or turned off in response to a scan pulse from the (n-2) th stage and electrically connects the power source for charging at the turn- A second switching element that is turned on or off in response to a clock pulse supplied to the output of the (n + 2) th stage and electrically connects the charging power supply and the reset node to each other when turned on; A third switching element that is turned on or turned off in response to a scan pulse from the second stage and electrically connects the set node and the discharge power supply to each other in a turn- Off or turn-off in response to a voltage supplied to the set node, the fourth switching element being turned-on or turned-off and electrically connecting the reset node and the discharge power supply when the switch is turned on, , Turn - a fifth switching device for electrically connecting the set node and the discharge power source to each other at the on time, and a second switching device for turning on or off in response to a scan pulse from the (n + 2) And a sixth switching element for electrically connecting the power supply for discharging to each other, wherein a discharging voltage from the discharging power source is smaller than the charging voltage, and the fifth and sixth switching elements are four-terminal switching elements .

The n-th stage node control unit may include a first switching device that is turned on or turned off in response to a scan pulse from the (n-2) th stage and electrically connects the power source for charging at the turn- A second switching element that is turned on or off in response to a clock pulse supplied to the output of the (n + 2) th stage and electrically connects the charging power supply and the reset node to each other when turned on; A third switching element that is turned on or turned off in response to a scan pulse from the second stage and that electrically connects the set node and the first discharge power source when turned on, A fourth switching element that is turned on or off in response to the voltage supplied to the set node and that electrically connects the reset node and the first discharge power supply when the switch is turned on; Turn-o A fifth switching device for electrically connecting the set node and the second discharge power source to each other at the time of turn-on, an n + 2-th stage for turning on or off in response to a scan pulse from the n + And a sixth switching element for electrically connecting the set node and the second discharging power source to each other, wherein the first discharging voltage from the first discharging power source and the second discharging voltage from the second discharging power source And the second discharging voltage is equal to a clock pulse of a low voltage state, the first discharging voltage is smaller than the second discharging voltage, and the third and fourth switching And the device is a four-terminal switching device.

The output section provided in the n-th stage may be turned on or off according to a signal state of the set node, and when the turn-on state is selected, And a pull-down switching element that is turned on or off according to a signal state of the reset node and electrically connects the output terminal of the n-th stage to the second power source .

The set node is divided into a first reset node and a second reset node, and a node controller included in the n-th stage is turned on or off in response to a scan pulse from the (n-2) A first switching element for electrically connecting the set node to the power source for charging at the time of turn-on, a second switching element for turning on or off in response to a first AC voltage from the first AC power supply, A second switching element for electrically connecting the power supply and the first common node to each other, a second switching element that is turned on or off in response to a voltage supplied to the set node, And a second reset node electrically connected to the first AC power supply and the first reset node when the first AC power supply and the first reset node are turned on or off in response to a voltage supplied to the first common node, Fourth A fifth switching device that is turned on or off in response to a second AC voltage from the second AC power supply and electrically connects the second AC power supply and the second common node to each other when the first switching device is turned on, A sixth switching element that is turned on or turned off in response to a voltage supplied to the set node and electrically connects the second common node and the discharge power source to each other when the first common node is turned on, A seventh switching element which is turned on or off in response to a voltage and electrically connects the second AC power supply and the second reset node to each other in a turn-on state, An eighth switch for turning on or off the switch and turning on the first reset node and the discharge power supply in electrical connection with each other, Or turned off, A ninth switching element for electrically connecting the second reset node and the discharging power supply to each other in a turn-on state, a third switching element for turning on or off the first node in response to a voltage supplied to the set node, A tenth switching element electrically connecting the reset node and the discharging power source to each other; a second switching element that is turned on or off in response to a voltage supplied to the set node, And a control circuit for controlling the set node and the discharging power supply to be electrically connected to each other when the power supply is turned on or turned off in response to a voltage supplied to the first reset node, And a third switch connected in series between the set node and the discharge power supply in response to a voltage supplied to the second reset node, And a fourteenth switching element that is turned on or off in response to a scan pulse from the (n + 2) th stage and electrically connects the set node and the discharge power source when turned on, The discharge voltage from the dedicated power source is smaller than the charging voltage from the charging power source, the phase of the first AC voltage is inverted by 180 degrees with respect to the phase of the second AC voltage, 13 and the fourteenth switching element are four-terminal switching elements.

The set node is divided into a first reset node and a second reset node, and a node controller included in the n-th stage is turned on or off in response to a scan pulse from the (n-2) A first switching element for electrically connecting the set node to the power source for charging at the time of turn-on, a second switching element for turning on or off in response to a first AC voltage from the first AC power supply, A second switching element for electrically connecting the power supply and the first common node to each other, a second switching element that is turned on or off in response to a voltage supplied to the set node, And a second reset node electrically connected to the first AC power supply and the first reset node when the first AC power supply and the first reset node are turned on or off in response to a voltage supplied to the first common node, Fourth A fifth switching device that is turned on or off in response to a second AC voltage from the second AC power supply and electrically connects the second AC power supply and the second common node to each other when the first switching device is turned on, A sixth switching element that is turned on or turned off in response to a voltage supplied to the set node and electrically connects the second common node and the discharge power source to each other when the first common node is turned on, A seventh switching element which is turned on or off in response to a voltage and electrically connects the second AC power supply and the second reset node to each other in a turn-on state, An eighth switch for turning on or off the switch and turning on the first reset node and the discharge power supply in electrical connection with each other, Or turned off, A ninth switching element for electrically connecting the second reset node and the discharging power supply to each other in a turn-on state, a third switching element for turning on or off the first node in response to a voltage supplied to the set node, A tenth switching element electrically connecting the reset node and the discharging power source to each other; a second switching element that is turned on or off in response to a voltage supplied to the set node, And a control circuit for controlling the set node and the discharging power supply to be electrically connected to each other when the power supply is turned on or turned off in response to a voltage supplied to the first reset node, And a third switch connected in series between the set node and the discharge power supply in response to a voltage supplied to the second reset node, And a fourteenth switching element that is turned on or off in response to a scan pulse from the (n + 2) th stage and electrically connects the set node and any one of the clock transmission lines to each other, Wherein the discharging voltage from the discharging power source is smaller than the charging voltage from the charging power source and the phase of the first AC voltage is inverted by 180 degrees with respect to the phase of the second AC voltage, And the thirteenth switching element are four-terminal switching elements.

The set node is divided into a first reset node and a second reset node, and a node controller included in the n-th stage is turned on or off in response to a scan pulse from the (n-2) A first switching element for electrically connecting the set node to the power source for charging at the time of turn-on, a second switching element for turning on or off in response to a first AC voltage from the first AC power supply, A second switching element for electrically connecting the power source and the first common node to each other, a second switching element for turning on or off in response to a voltage supplied to the set node, Off or turn-off in response to a voltage supplied to the first common node, wherein the first AC power supply and the first reset node are electrically connected to each other A link to A fourth switching element that is turned on or off in response to a second AC voltage from the second AC power supply and that electrically connects the second AC power supply and the second common node to each other at the time of turn- A sixth switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the second common node and the first discharging power supply to each other when turned on, A seventh switching element for electrically connecting the second AC power supply and the second reset node to each other in a turn-on state, a scan switch from the n < th > An eighth switching element which is turned on or off in response to the pulse and electrically connects the first reset node and the second discharging power supply when turned on; Turn-on or turn-off A ninth switching element for electrically connecting the second reset node and the second discharging power supply to each other in a turn-on state, a third switching element for turning on or off in response to a voltage supplied to the set node, - a tenth switching element for electrically connecting the first reset node and the second power supply to the second node when the second node is turned on, a second node for turning on or off the second node in response to a voltage supplied to the set node, A second resetting power supply, a second resetting power supply for electrically connecting the first reset node and the second reset power supply to each other, and a second reset power supply for turning on or off the second reset node in response to a voltage supplied to the first reset node, On or off in response to a voltage supplied to the second reset node, wherein the switch node is turned on or off in response to a voltage supplied to the second reset node, Power supply to each other A first switching element connected in parallel to the first node, a thirteenth switching element connected in a parasitic manner, a second switching element turned on or off in response to a scan pulse from the (n + 2) th stage, Wherein the first discharging voltage from the first discharging power source and the second discharging voltage from the second discharging power source are smaller than the charging voltage from the charging power source, And the second alternating-current voltage is inverted by 180 degrees with respect to the phase of the second alternating-current voltage, and the eighth, ninth, tenth, and tenth 11 switching element is a 4-terminal switching element.

The output section provided in the n-th stage may be turned on or off according to a signal state of the set node, and when the turn-on state is selected, A first pull-down switching circuit which turns on or off according to a signal state of the first reset node and turns on an output terminal of the n-th stage and the first discharge power supply electrically, A second pull-up switching element that is turned on or off according to a signal state of the set node and electrically connects the output terminal of any one of the clock transmission lines and the n-th stage at the time of turn-on, And a second pull-down circuit that turns on or off according to the signal state of the reset node and electrically connects the output terminal of the n-th stage to the first power- It characterized in that it comprises a switching device.

The n-th stage node control unit includes a first switching device that is turned on or off in response to a scan pulse from the (n-1) th stage and electrically connects the power supply for charging and the set node at the turn- a second switching element which is turned on or off in response to a scan pulse from the (n + 1) th stage and electrically connects the set node and the discharge power source when turned on; And a third switching element that is turned on or off in response to a supplied clock pulse and electrically connects the set node to the output terminal of the n-1th stage at turn-on, The discharge voltage is smaller than the charging voltage from the charging power source, and the first and second switching elements are four-terminal switching elements.

The output section of the n-th stage is turned on or off in response to a voltage supplied to the set node, and when one of the clock transmission lines and the output terminal of the n-th stage is electrically connected And an output terminal of the (n + 1) -th stage is turned on or off in response to a clock pulse supplied to the output terminal of the (n + 1) And a pull-down switching device for connecting the pull-

The n-th stage node control unit may include a first switching device that is turned on or off in response to a scan pulse from the (n-1) th stage and electrically connects the set power supply to the set- A second switching element that turns on or off in response to a clock pulse supplied to the output of the (n-1) th stage and electrically connects the charging power supply and the common node to each other at turn-on, A third switching element for electrically connecting the common node and the discharge power supply when the first switch is turned on or turned off in response to a clock pulse supplied to the output part of the stage, On or turn-off in response to a scan pulse from the n-th stage, a fourth switching device for electrically connecting the charge power supply and the reset node to each other in a turn-on state, Turn-o A fifth switching device for electrically connecting the reset node and the discharge power source to each other at the time of turn-on, an n + 1-th stage for turning on or off in response to a clock pulse supplied to the output of the n + A sixth switching device for electrically connecting the reset node and the discharge power source when the first switch is turned on, a seventh switch for electrically connecting the reset node and the discharge power source in response to a voltage supplied to the set node, An eighth switching element electrically connecting the set node and the discharging power source in response to a voltage supplied to the reset node, a second switching element for electrically connecting the set node and the discharge power source in response to a scan pulse from the (n + 1) And a ninth switching element for electrically connecting the discharging power source to each other, wherein a discharging voltage from the discharging power source is supplied from the charging power source It was less than, and said eighth and ninth switching elements, characterized in that the four-terminal switching device.

The n-th stage node control unit may include a first switching device that is turned on or off in response to a scan pulse from the (n-1) th stage and electrically connects the set power supply to the set- A second switching element that turns on or off in response to a clock pulse supplied to the output of the (n-1) th stage and electrically connects the charging power supply and the common node to each other at turn-on, A third switching element for electrically connecting the common node and the discharge power supply when the first switch is turned on or turned off in response to a clock pulse supplied to the output part of the stage, On or turn-off in response to a scan pulse from the n-th stage, a fourth switching device for electrically connecting the charge power supply and the reset node to each other in a turn-on state, Turn-o A fifth switching device for electrically connecting the reset node and the discharge power source to each other at the time of turn-on, an n + 1-th stage for turning on or off in response to a clock pulse supplied to the output of the n + A sixth switching device for electrically connecting the reset node and the discharge power source when the first switch is turned on, a seventh switch for electrically connecting the reset node and the discharge power source in response to a voltage supplied to the set node, An eighth switching element electrically connecting the set node and the discharging power supply in response to a voltage supplied to the reset node, and an eighth switching element electrically connecting the set node and the discharging power supply in response to a scan pulse from the (n + 1) And a ninth switching element for electrically connecting one clock transmission line to each other, wherein a discharge voltage from the discharge power source is supplied from the charge power source And the eighth switching element is a four-terminal switching element.

The n-th stage node control unit may include a first switching device that is turned on or off in response to a scan pulse from the (n-1) th stage and electrically connects the set power supply to the set- A second switching element that turns on or off in response to a clock pulse supplied to the output of the (n-1) th stage and electrically connects the charging power supply and the common node to each other at turn-on, A third switching element for electrically connecting the common node and the first discharging power supply when the second switching element is turned on or off in response to a clock pulse supplied to the output part of the stage, A fourth switching element that is turned on or off in response to a voltage and that electrically connects the charging power supply and the reset node when turned on; On or turn A fifth switching device for electrically connecting the reset node and the second discharging power supply to each other in a turn-on state, a fifth switching device for turning on or off the switching device in response to a clock pulse supplied to the output of the (n + 1) And a sixth switching device for turning off the second node when the first node is turned on, the sixth switching element for electrically connecting the reset node and the second node, An eighth switching element electrically connecting the set node and the first discharging power supply in response to a voltage supplied to the reset node, a seventh switching element electrically connecting the set node and the first discharging power source in response to a voltage supplied to the reset node, And a ninth switching element for electrically connecting the set node and the first discharging power source in response to a pulse, wherein the first discharging voltage from the first discharging power source and the ninth switching element The second discharging voltage from the two-discharging power source is smaller than the charging voltage from the charging power source, the second discharging voltage is smaller than the first discharging voltage, and the fifth, 7 switching element is a 4-terminal switching element.

The output section of the n-th stage is turned on or off in response to a voltage supplied to the set node, and when one of the clock transmission lines and the output terminal of the n-th stage is electrically connected And an output terminal of the (n + 1) -th stage is turned on or off in response to a clock pulse supplied to the output of the (n + 1) And a pull-down switching element for electrically connecting the first and second transistors.

First, a switching element for discharging a set node is constituted by a 4-terminal element including a sub terminal, a predetermined voltage is applied to the sub terminal, and a threshold voltage of the switching element is adjusted to output a clock pulse as a scan pulse The scan pulse can be normally generated by completely turning off the switching element during the output period.

Second, a clock pulse having a voltage value larger than that of the discharge voltage is supplied to the source electrode of the switching element responsible for discharging the set node, and the switching element is fully turned on during an output period in which the clock pulse is output as a scan pulse. The scan pulse can be normally generated.

1 is a graph showing a relationship between a gate voltage and a drain current according to the temperature of a conventional oxide semiconductor transistor;
2 is a graph showing a voltage and a scan pulse voltage of a set node according to a change in threshold voltage of a conventional oxide semiconductor transistor
3 is a view illustrating a shift register according to an embodiment of the present invention.
Fig. 4 is a timing chart of output signals of various signals supplied to the shift register of Fig. 1 and various signals outputted therefrom
5 is a diagram showing a circuit configuration of a stage according to the first embodiment of the present invention;
6 is a cross-sectional view of a four-terminal switching device
7 is a view showing characteristics of the four-terminal switching device of Fig. 6
8 is a graph showing a change in threshold voltage when a specific voltage is applied to a sub terminal of a four-terminal switching device having characteristics as shown in Fig. 7
9 is a diagram showing a circuit configuration of a stage according to a second embodiment of the present invention
10 is a diagram showing a circuit configuration of a stage according to a third embodiment of the present invention
11 is a diagram showing a circuit configuration of a stage according to a fourth embodiment of the present invention
12 is a diagram showing a circuit configuration of a stage according to a fifth embodiment of the present invention
13 is a diagram showing a circuit configuration of a stage according to a sixth embodiment of the present invention
14 is a diagram showing a circuit configuration of a stage according to a seventh embodiment of the present invention
15 is a diagram showing a circuit configuration of a stage according to an eighth embodiment of the present invention
16 is a diagram showing a circuit configuration of a stage according to a ninth embodiment of the present invention;
17 is a diagram showing a circuit configuration of a stage according to a tenth embodiment of the present invention
18 is a diagram showing a circuit configuration of a stage according to an eleventh embodiment of the present invention
19 is a diagram showing a circuit configuration of a stage according to a twelfth embodiment of the present invention
Fig. 20 is a diagram showing voltage waveforms of the set node and the scan pulse generated by the shift register according to the fourth embodiment of Fig. 11
FIG. 21 is a diagram showing the voltage of the set node and the voltage waveform of the scan pulse generated by the shift register according to the first embodiment of FIG. 5; FIG.
FIG. 22 is a view showing voltage waveforms of a set node and a scan pulse generated by a shift register according to the second embodiment of FIG. 9; FIG.
23 is a view showing voltage waveforms of a set node and a scan pulse generated by the shift register according to the fifth embodiment of Fig. 12

FIG. 3 is a diagram illustrating a shift register according to an embodiment of the present invention. FIG. 4 is an output timing diagram of various signals supplied to the shift register of FIG. 1 and various signals output therefrom.

The shift register according to the embodiment of the present invention includes n stages ST1 to STn and two dummy stages STn + 1 and STn + 2 as shown in FIG. Here, each of the stages ST1 to STn + 2 outputs one scan pulse (SP1 to SPn + 2) for one frame period through each output terminal OT.

Each of the stages ST1 to STn drives a gate line connected thereto by using a scan pulse. In addition, all the stages ST1 to STn + 2 including the first and second dummy stages control the operation of the stage located at the rear end from itself and the stage located at the front end from the stage itself. Here, the stage located at the front end of the n-th stage may be any one of the stages located at the upper side of the n-th stage, and the stage positioned at the rear end of the n-th stage may be any one of the stages .

The stages ST1 to STn + 2 sequentially output scan pulses in the order of the first stage ST1 to the second dummy stage STn + 2. That is, the first stage ST1 outputs the first scan pulse SP1, the second stage ST2 outputs the second scan pulse SP2, and the third stage ST3 outputs the second scan pulse SP2. (N + 1) -th dummy stage (STn + 1) outputs a scan pulse (SP3) and outputs n + 1 scan pulse (SPn + 1). Finally, the second dummy stage STn + 2 outputs the (n + 2) th scan pulse SPn + 2.

The scan pulses output from the stages ST1 to STn except for the first and second dummy stages STn + 1 and STn + 2 are sequentially supplied to the gate lines of the liquid crystal panel (not shown) The lines are scanned sequentially. The scan pulse output from the stages is supplied only to the stage located at the previous stage from the stage itself, or to the stage located at the front stage and to the stage located at the rear stage, or to the stage located at the rear stage.

 Such a shift register can be incorporated in the liquid crystal panel. That is, the liquid crystal panel has a display portion for displaying an image and a non-display portion surrounding the display portion, and the shift register is embedded in the non-display portion.

The entire stages ST1 to STn + 2 of the shift register constructed as described above are supplied with the charging voltage VDD, the discharging voltage VSS and the first to fourth clock pulses CLK1 to CLK4 Or the like). The first stage, the second stage, the first dummy stage and the second dummy stage ST1 and ST2 among the stages ST1 to STn + 2 further include first and second start pulses Vst1 and Vst2, It is supplied.

The charging voltage VDD is mainly used to charge the nodes of each of the stages ST1 to STn + 2 and the discharging voltage VSS is mainly used for the nodes of the stages ST1 to STn + 1 and the output terminals OT Is discharged.

The charging voltage VDD and the discharging voltage VSS are both DC voltages, the charging voltage VDD is positive and the discharging voltage VSS is negative. Here, the discharge voltage VSS may be a ground voltage.

On the other hand, according to the circuit configuration of the stage, the entire stage can be further supplied with the first and second AC voltages Vac1 and Vac2.

The first and second AC voltages Vac1 and Vac2 are mainly AC signals for controlling the charging and discharging of the reset nodes among the nodes of each of the stages ST1 to STn + And inverted by 180 degrees with respect to the second AC voltage (Vac2). The voltage value of the first and second AC voltages Vac1 and Vac2 in the high state may be the same as the voltage value of the charging voltage VDD and the voltage value of the first and second AC voltages Vac1 and Vac2 May be the same as the voltage value of the discharge voltage (VSS). The first and second AC voltages (Vac1, Vac2) are inverted in their p-frame periods. Here, p is a natural number.

The first to fourth clock pulses CLK1 to CLK4 are signals used to generate the scan pulses SP1 to SPn of the stages ST1 to STn + 1, and the stages ST1 to STn + 1 to the fourth clock pulses CLK1 to CLK4 and outputs the scan pulses SP1 to SPn. For example, the (4j + 1) -th stage outputs a scan pulse using the first clock pulse CLK1 and the scan pulse using the second clock pulse CLK2 for the (4j + 2) The fourth j + 4 stage outputs a scan pulse using the third clock pulse CLK3 and the fourth j + 4 stage outputs the scan pulse using the fourth clock pulse CLK4. Here, j represents a natural number.

Although four clock pulses having different phase differences are used in the present invention, the number of clock pulses may be two or more.

As shown in FIG. 4, the clock pulses CLK1 to CLK4 are outputted such that the high period between the clock pulses output in the adjacent periods overlaps with each other for a certain period of time. For example, the first clock pulse CLK1 and the second clock pulse CLK2 which are adjacent to each other may be output so that their high-level portions overlap for a time corresponding to about 1 / 2H (horizontal period). The time of the overlapping horizontal period may be 1 / 3H. As the high period of the adjacent clock pulses is overlapped, the scan pulses have the same characteristics as those of the clock pulses. That is, as shown in FIG. 9, the scan pulses are outputted so that the high period between the scan pulses output in the adjacent periods overlaps with each other for a predetermined period. The first and second start pulses Vst1 and Vst2 may also overlap each other.

As shown in Fig. 3, the k-th stage is enabled in response to the scan pulses from the (k-2) th and (k-1) th stages. Here, k is a natural number. However, the first stage ST1 is enabled in response to the first start pulse Vst1 from the timing controller, and the second stage is enabled in response to the second start pulse from the timing controller. Here, the second stage ST2 may be enabled by the first start pulse Vst1 instead of the second start pulse Vst2.

The k < th > stage is disabled in response to the scan pulse from the (k + 2) th stage. However, the first and second dummy stages STn + 1 and STn + 2 are disabled in response to the first start pulse Vst1 or the second start pulse Vst2 from the timing controller.

Here, the circuit configuration of each stage will be described in detail as follows.

1st In the embodiment  Following Shift  register

5 is a diagram showing a circuit configuration of a stage according to the first embodiment of the present invention.

Each stage according to the first embodiment of the present invention includes a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit (NC) controls the signal states of the set node (Q) and the reset node (QB) of the stage. The output unit OB is supplied with any one of a plurality of clock pulses having different phases and outputs the supplied clock pulse to its output terminal (QB) according to the signal states of the set node Q and the reset node QB OT) as a scan pulse.

The node control unit NC provided in the n-th stage includes the set node Q, the reset node QB, and the first to sixth switching elements Tr1 to Tr6.

The first switching device Tr1 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage and electrically connects the set power supply to the set power supply. However, the first switching device Tr1 provided in the first stage ST1 is controlled by the first start pulse Vst1 of the timing controller instead of the scan pulse from the (n-2) th stage. Similarly, the first switching device Tr1 provided in the second stage ST2 is controlled by the first start pulse Vst2 of the timing controller instead of the scan pulse from the (n-2) th stage.

The second switching device Tr2 of the n-th stage is turned on or turned off in response to the charging voltage from the charging power supply, and when the turning power is turned on, the charging power supply and the reset node QB are electrically .

The third switching device Tr3 of the n-th stage is turned on or off in response to the scan pulse from the n-2 stage, and when the turn-on, the reset node QB and the discharge power source are electrically . However, the third switching device Tr3 provided in the first stage ST1 is controlled by the first start pulse Vst1 of the timing controller instead of the scan pulse from the (n-2) th stage. Similarly, the third switching element Tr1 provided in the second stage ST2 is controlled by the first start pulse Vst2 of the timing controller instead of the scan pulse from the (n-2) th stage.

The fourth switching device Tr4 of the n-th stage is turned on or off in response to the voltage supplied to the set node Q. When the reset node QB is turned on, They are electrically connected to each other.

The fifth switching element Tr5 of the n-th stage is turned on or turned off in response to a voltage supplied to the reset node QB, and when the set node Q is turned on, They are electrically connected to each other.

The sixth switching element Tr6 of the n-th stage is turned on or off in response to a scan pulse from the (n + 2) th stage, and the set node Q and the discharging power source are electrically . However, the sixth switching element Tr6 provided in the first dummy stage STn + 1 is controlled by the first start pulse Vst1 of the timing controller instead of the scan pulse from the (n + 2) th stage. Similarly, the sixth switching element Tr6 provided in the second dummy stage STn + 2 is controlled by the second start pulse Vst2 of the timing controller instead of the scan pulse from the (n + 2) th stage.

The output section QB provided in the n-th stage includes a pull-up switching device Uc and a pull-down switching device Ds.

The pull-up switching device Uc of the n-th stage is turned on or off according to the signal state of the set node Q and is turned on at any one of the clock transmission lines and the output terminal OT of the n-th stage, Are electrically connected to each other.

The pull-down switching device Ds of the n-th stage is turned on or off according to the signal state of the reset node QB. When the output terminal OT of the n-th stage is turned on, And are electrically connected to each other.

The operation of the shift register including stages according to the first embodiment of the present invention will now be described in detail. For the convenience of explanation, the n-th stage in Fig. 5 is replaced with the fourth stage ST4. In addition, the following description of the operation describes the operation in the non-overlapping period of the first and second start pulses and the clock pulses, and the operations in the overlapped periods are simultaneously generated during the overlap period. For example, in the 1 / 3H period in which the first clock pulse CLK1 and the second clock pulse CLK2 overlap with each other, the operation by the first clock pulse CLK1 and the operation by the second clock pulse CLK2 Occurs simultaneously.

First, the operation in the set period of this fourth stage ST4, that is, the enable operation will be described. For example, the first set period of the fourth stage ST4 is the second 1 / 3H period of the second clock pulse CLK2 (when the pulse width of the second clock pulse is divided into three equal parts, 3H period), and the first set period is a period corresponding to the second clock pulse CLK2 (i.e., a period corresponding to the third clock pulse CLK2) 2 and the fourth clock pulse).

In this set period, the second scan pulse SP2 output from the second stage ST2 is input to the fourth stage ST4.

That is, the second scan pulse SP2 is supplied to the gate terminal of the first switching device Tr1 and the gate terminal of the third switching device Tr2 included in the fourth stage ST4.

Then, the first and third switching elements Tr1 and Tr3 are turned on, and the charging voltage VDD is applied to the set node Q through the first switching element Tr1 turned on . Accordingly, the pull-up switching device Uc and the fourth switching device Tr4 of the fourth stage ST1, to which the set node Q is charged and the gate terminal is connected to the charged set node Q, - Turns on.

Here, the discharge voltage VSS is supplied to the reset node QB of the first stage ST1 through the turned-on third and fourth switching devices Tr3 and Tr4. Then, the reset node QB is discharged. Accordingly, the pull-down switching device Ds and the fifth switching device Tr5, to which the gate terminal is connected, to the reset node QB are turned off.

At this time, since the second switching device Tr2 is in the form of a diode having its gate terminal and drain terminal connected to each other, the second switching device Tr2 is always kept in the turn-on state by the charging voltage VDD supplied thereto have. The charging voltage VDD is supplied to the reset node QB by the turn-on second switching element Tr2, whereby the negative discharge voltage VSS is applied to the reset node QB, And the positive charging voltage VDD are supplied together with the fourth clock pulse CLK4 in the low voltage state while the area of the third and fourth switching elements Tr3 and Tr4 is equal to the area of the second switching element Tr2 The reset node QB is maintained in the discharged state.

On the other hand, during this set period, since the output from the sixth stage ST6 is the sixth scan pulse in the low voltage state, the sixth switching element Tr6 provided in the fourth stage ST4 is in the turn-off state .

Next, the operation in the output period of the fourth stage ST4 will be described as follows. For example, the output period of the fourth stage ST4 is the second 1 / 3H period of the fourth clock pulse CLK4 (the second 1 / 3H period when the pulse width of the fourth clock pulse CLK4 is divided by 3) / 3H period). This output period is a period corresponding to the clock pulses adjacent to the fourth clock pulse CLK4 in the entire pulse width section of the fourth clock pulse CLK4 And the first clock pulse).

In the output period of the fourth stage ST4, as the set node Q of the fourth stage ST1 is kept in the charged state by the charging voltage VDD applied during the set period, Up switching element Uc of the transistor ST4 maintains the turn-on state. At this time, as the fourth clock pulse CLK4 is applied to the drain terminal of the turn-on pull-up switching device Uc, the charging voltage (for example, 0 V) charged in the set node Q in the floating state of the fourth stage ST4 VDD) is amplified by bootstrapping. Therefore, the fourth clock pulse CLK4 applied to the drain terminal of the pull-up switching element Uc of the fourth stage ST4 is stably outputted through its source terminal (output terminal OT). The fourth scan pulse SP4 is supplied to the fourth gate line to drive the fourth gate line and the fourth scan pulse SP4 is applied to the first and third switching pulses Is supplied to the gate terminals of the elements Tr1 and Tr3 so that the sixth stage ST6 can perform the set operation. The fourth scan pulse SP4 is supplied to the gate terminal of the sixth switching device Tr6 provided in the second stage ST2 so that the second stage ST2 can perform the reset operation .

Next, the operation in the reset period of the fourth stage ST4, that is, the disable operation will be described. For example, the reset period of the fourth stage ST4 is the second 1 / 3H period of the second clock pulse CLK2 (when the pulse width of the second clock pulse CLK2 is divided into three equal parts, 1 / 3H period) of the second clock pulse CLK2. This reset period is a period corresponding to the clock pulses CLK2 adjacent to the second clock pulse CLK2 in the entire pulse width section of the second clock pulse CLK2, The first and third clock pulses).

In this reset period, the sixth stage ST6 outputs the second clock pulse CLK2 as the sixth scan pulse SP6. The sixth scan pulse SP6 is supplied to the gate terminal of the sixth switching element Tr6 provided in the fourth stage ST4.

Then, the sixth switching element Tr6 is turned on, and the fourth clock pulse CLK4 in the low voltage state is turned on through the turned-on sixth switching element Tr6 to the set node of the fourth stage ST4, (Q). Thus, the set node Q is discharged, and the pull-up switching element Uc and the fourth switching element Tr4 connected to the discharged set node Q through the gate terminal are turned off. Thus, the charging voltage VDD is supplied to the reset node QB via the turned-on second switching element Tr2. Thus, the reset node QB is charged and the pulldown switching element Ds connected to the charged reset node QB via the gate terminal is turned off. Then, the discharge voltage VSS is output through the output terminal OT through the turn-on pull-down switching element Ds.

In the overlap period located between the first set period and the second set period, the operation in the first set period and the operation in the second set period described above occur simultaneously, and in the overlap period located between the second set period and the output period The operation in the above-described second set period and the operation in the output period occur at the same time, and in the overlap period located between the output period and the reset period, the operation in the above described output period and the operation in the reset period occur simultaneously do.

On the other hand, in order to normally output the output of the fourth stage ST4, that is, the fourth scan pulse SP4 during the output period of the fourth stage ST4, the voltage of the set node Q of the fourth stage ST4 The fifth switching device Tr5 must remain in a completely turned-off state during the output period of the fourth stage ST4. To this end, the fifth switching device Tr5 is replaced with a four-terminal switching device whose threshold voltage is adjustable in the present invention.

That is, the fifth switching device Tr5 further includes a sub terminal in addition to the gate terminal, the source terminal and the drain terminal. In other words, the fifth switching element Tr5 is a four-terminal switching element whose threshold voltage changes when a predetermined voltage is applied to its sub-terminal, and the four-terminal switching element having such characteristics is the same as the one shown in Fig. 6 Structure.

Fig. 6 is a cross-sectional view of the four-terminal switching device. As shown in Fig. 6, the four-terminal switching device further includes sub-terminals formed on opposite sides of the gate terminal.

FIG. 7 is a graph showing the characteristics of the four-terminal switching device of FIG. 6. As shown in FIG. 7, as the voltage applied to the sub-terminal of the four-terminal switching device increases in the negative direction, It can be seen that it is directed in this positive direction.

8 is a diagram showing a change in threshold voltage when a specific voltage is applied to a sub terminal of a four terminal switching element having characteristics as shown in Fig. 7. As shown in Fig. 8, the four terminal switching element When a voltage of 0 [V] is applied to the sub-terminal of the four-terminal switching device having the gate-source terminal voltage Vgs of 0 [V], the source-drain terminal current Ids of the four- [nA]. However, when the voltage of the sub terminal is lowered to -10 [V], it can be seen that the current Ids between the source and the drain terminals of the four-terminal switching device is significantly lowered to 0.1 [pA].

The sixth switching element Tr6 in Fig. 5 may also be constituted by a four-terminal switching element as described above.

Second In the embodiment  Following Shift  register

9 is a diagram showing a circuit configuration of a stage according to a second embodiment of the present invention.

Each stage according to the second embodiment of the present invention has a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit (NC) controls the signal states of the set node (Q) and the reset node (QB) of the stage. The output unit OB is supplied with any one of a plurality of clock pulses having different phases and outputs the supplied clock pulse to its output terminal (QB) according to the signal states of the set node Q and the reset node QB OT) as a scan pulse.

The node control unit NC provided in the n-th stage includes the set node Q, the reset node QB, and the first to sixth switching elements Tr1 to Tr6.

The first switching device Tr1 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage and electrically connects the set power supply to the set power supply. However, the first switching device Tr1 provided in the first stage ST1 is controlled by the first start pulse Vst1 of the timing controller instead of the scan pulse from the (n-2) th stage. Similarly, the first switching device Tr1 provided in the second stage ST2 is controlled by the first start pulse Vst2 of the timing controller instead of the scan pulse from the (n-2) th stage.

The second switching device Tr2 of the n-th stage is turned on or turned off in response to the charging voltage from the charging power supply, and when the turning power is turned on, the charging power supply and the reset node QB are electrically .

The third switching device Tr3 of the n-th stage is turned on or off in response to the scan pulse from the n-2 stage, and when the turn-on, the reset node QB and the discharge power source are electrically . However, the third switching device Tr3 provided in the first stage ST1 is controlled by the first start pulse Vst1 of the timing controller instead of the scan pulse from the (n-2) th stage. Similarly, the third switching element Tr1 provided in the second stage ST2 is controlled by the first start pulse Vst2 of the timing controller instead of the scan pulse from the (n-2) th stage.

The fourth switching device Tr4 of the n-th stage is turned on or off in response to the voltage supplied to the set node Q. When the reset node QB is turned on, They are electrically connected to each other.

The fifth switching element Tr5 of the n-th stage is turned on or turned off in response to a voltage supplied to the reset node QB, and when the set node Q is turned on, They are electrically connected to each other.

The sixth switching element Tr6 of the n-th stage is turned on or off in response to a scan pulse from the (n + 2) th stage, and the set node Q and any one of the clock transmission lines They are electrically connected to each other. However, the sixth switching element Tr6 provided in the first dummy stage STn + 1 is controlled by the first start pulse Vst1 of the timing controller instead of the scan pulse from the (n + 2) th stage. Similarly, the sixth switching element Tr6 provided in the second dummy stage STn + 2 is controlled by the second start pulse Vst2 of the timing controller instead of the scan pulse from the (n + 2) th stage.

The output section QB provided in the n-th stage includes a pull-up switching device Uc and a pull-down switching device Ds.

The pull-up switching device Uc of the n-th stage is turned on or off according to the signal state of the set node Q and is turned on at any one of the clock transmission lines and the output terminal OT of the n-th stage, Are electrically connected to each other.

The pull-down switching device Ds of the n-th stage is turned on or off according to the signal state of the reset node QB. When the output terminal OT of the n-th stage is turned on, And are electrically connected to each other.

The fifth switching element Tr5 of the first to sixth switching elements Tr1 to Tr6 may be a four-terminal switching element.

Third In the embodiment  Following Shift  register

10 is a diagram showing a circuit configuration of a stage according to the third embodiment of the present invention.

 Each stage according to the third embodiment of the present invention includes a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit (NC) controls the signal states of the set node (Q) and the reset node (QB) of the stage. The output unit OB is supplied with any one of a plurality of clock pulses having different phases and outputs the supplied clock pulse to its output terminal (QB) according to the signal states of the set node Q and the reset node QB OT) as a scan pulse.

The node control unit NC provided in the n-th stage includes the set node Q, the reset node QB, and the first to sixth switching elements Tr1 to Tr6.

The first switching device Tr1 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage and electrically connects the set power supply to the set power supply.

The second switching device Tr2 of the n-th stage is turned on or turned off in response to the charging voltage from the charging power supply, and when the turning power is turned on, the charging power supply and the reset node QB are electrically .

The third switching device Tr3 of the n-th stage is turned on or off in response to a scan pulse from the n-2 stage, and the reset node QB and the first discharge power supply They are electrically connected to each other.

The fourth switching device Tr4 of the n-th stage is turned on or off in response to the voltage supplied to the set node Q. When the reset node QB is turned on, Connect the power supply to each other electrically.

The fifth switching device Tr5 of the n-th stage is turned on or off in response to a voltage supplied to the reset node QB, and when the turn-on of the set node Q and the second discharging power supply Are electrically connected to each other.

The sixth switching element Tr6 of the n-th stage is turned on or off in response to a scan pulse from the (n + 2) th stage and is turned on when the set node Q and the second discharge power source They are electrically connected to each other.

The first discharge voltage VSS1 from the first discharge power source is less than or equal to the second discharge voltage VSS2 from the second discharge power source. The second discharge specific voltage VSS2 is equal to the discharge specific voltage VSS in the first embodiment.

The output section OB provided in the n-th stage includes a pull-up switching device Uc and a pull-down switching device Ds.

The pull-up switching element Uc is turned on or off in response to a voltage supplied to the set node Q. When the turn-on state of one of the clock transmission lines and the output terminal of the n-th stage is electrically connected .

The pull-down switching element Ds is turned on or turned off in response to a voltage supplied to the reset node QB and is turned on when the output terminal OT of the nth stage and the second discharging power supply Are electrically connected to each other.

Here, the third and fourth switching elements Tr3 and Tr4 are four-terminal switching elements.

Fourth In the embodiment  Following Shift  register

11 is a diagram showing a circuit configuration of a stage according to a fourth embodiment of the present invention.

Each stage according to the fourth embodiment of the present invention includes a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit (NC) controls the signal states of the set node (Q) and the reset node (QB) of the stage. The output unit OB is supplied with any one of a plurality of clock pulses having different phases and outputs the supplied clock pulse to its output terminal (QB) according to the signal states of the set node Q and the reset node QB OT) as a scan pulse.

The node control unit NC provided in the n-th stage includes the set node Q, the reset node QB, and the first to sixth switching elements Tr1 to Tr6.

The first switching device Tr1 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage and electrically connects the set power supply to the set power supply.

The second switching device Tr2 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n + 2) -th stage. When the second switching device Tr2 is turned on, QB are electrically connected to each other. The clock pulse supplied to the output of the (n + 2) th stage means a clock pulse supplied to the pull-up switching element Uc in the output portion.

The third switching device Tr3 of the n-th stage is turned on or off in response to the scan pulse from the n-2 stage, and when the turn-on, the reset node QB and the discharge power source are electrically .

The fourth switching device Tr4 of the n-th stage is turned on or off in response to the voltage supplied to the set node Q. When the reset node QB is turned on, They are electrically connected to each other.

The fifth switching element Tr5 of the n-th stage is turned on or turned off in response to a voltage supplied to the reset node QB, and when the set node Q is turned on, They are electrically connected to each other.

The sixth switching element Tr6 of the n-th stage is turned on or off in response to a scan pulse from the (n + 2) th stage, and the set node Q and the discharging power source are electrically .

The output section OB provided in the n-th stage includes a pull-up switching device Uc and a pull-down switching device Ds.

The pull-up switching element Uc is turned on or off in response to a voltage supplied to the set node Q. When the turn-on state of one of the clock transmission lines and the output terminal of the n-th stage is electrically connected .

The pull-down switching device Ds is turned on or off in response to a voltage supplied to the reset node QB, and when the output terminal OT of the n-th stage is turned on, Electrical connection.

Here, the fifth and sixth switching elements Tr5 and Tr6 are four-terminal switching elements.

Fifth In the embodiment  Following Shift  register

12 is a diagram showing a circuit configuration of a stage according to a fifth embodiment of the present invention.

Each stage according to the fifth embodiment of the present invention includes a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit (NC) controls the signal states of the set node (Q) and the reset node (QB) of the stage. The output unit OB is supplied with any one of a plurality of clock pulses having different phases and outputs the supplied clock pulse to its output terminal (QB) according to the signal states of the set node Q and the reset node QB OT) as a scan pulse.

The first switching device Tr1 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage and electrically connects the set power supply to the set power supply.

The second switching device Tr2 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n + 2) -th stage. When the second switching device Tr2 is turned on, QB are electrically connected to each other.

The third switching device Tr3 of the n-th stage is turned on or off in response to a scan pulse from the n-2 stage, and the reset node QB and the first discharge power supply They are electrically connected to each other.

The fourth switching device Tr4 of the n-th stage is turned on or off in response to the voltage supplied to the set node Q. When the reset node QB is turned on, Connect the power supply to each other electrically.

The fifth switching device Tr5 of the n-th stage is turned on or off in response to a voltage supplied to the reset node QB, and when the turn-on of the set node Q and the second discharging power supply Are electrically connected to each other.

The sixth switching element Tr6 of the n-th stage is turned on or off in response to a scan pulse from the (n + 2) th stage and is turned on when the set node Q and the second discharge power source They are electrically connected to each other.

The output section OB provided in the n-th stage includes a pull-up switching device Uc and a pull-down switching device Ds.

The pull-up switching element Uc is turned on or off in response to a voltage supplied to the set node Q. When the turn-on state of one of the clock transmission lines and the output terminal of the n-th stage is electrically connected .

The pull-down switching element Ds is turned on or turned off in response to a voltage supplied to the reset node QB and is turned on when the output terminal OT of the nth stage and the second discharging power supply Are electrically connected to each other.

The first discharging voltage VSS1 from the first discharging power source and the second discharging voltage VSS2 from the second discharging power source are smaller than the charging voltage VDD.

The second discharging voltage VSS2 is equal to the voltage value of the clock pulse CLK1 to CLK4 in the low voltage state and the first discharging voltage VSS1 is equal to the second discharging voltage VSS2, Less than or equal to.

Here, the third and fourth switching elements Tr3 and Tr4 are four-terminal switching elements.

6th In the embodiment  Following Shift  register

13 is a diagram showing a circuit configuration of a stage according to a sixth embodiment of the present invention.

Each stage according to the sixth embodiment of the present invention includes a node control unit and an output unit OB as shown in Fig. The node control unit NC controls signal states of the set node Q, the first reset node QB1 and the second reset node QB2 of the stage. The output section OB is supplied with any one of a plurality of clock pulses having different phases and is supplied with the voltage supplied to the set node Q, the first reset node QB1 and the second reset node QB2 And outputs the supplied clock pulse as a scan pulse through its output terminal OT in response.

The node controller NC provided in the n-th stage includes a first discharging switching element TD1 and first through fourteenth switching elements Tr1 through Tr14.

The first switching device Tr1 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage and electrically connects the set power supply to the set power supply.

The second switching device Tr2 of the n-th stage is turned on or off in response to the first AC voltage (Vac1) from the first AC power supply. When the first switching device Tr2 is turned on, (CN1) are electrically connected to each other.

The third switching element Tr3 of the n-th stage is turned on or off in response to the voltage supplied to the set node Q. When the first common node CN1 is turned on, They are electrically connected to each other.

The fourth switching device Tr4 of the n-th stage is turned on or off in response to a voltage supplied to the first common node CN1, and when the first AC power source and the first reset And electrically connects the node QB1 to each other.

The fifth switching element Tr5 of the n-th stage is turned on or turned off in response to the second AC voltage Vac2 from the second AC power supply, and when the second AC power is turned on, (CN2) are electrically connected to each other.

The sixth switching element Tr6 of the n-th stage is turned on or turned off in response to the voltage supplied to the set node, and electrically connects the second common node and the discharge power supply to each other .

The seventh switching device Tr7 of the n-th stage is turned on or off in response to a voltage supplied to the second common node, and when the second AC power source and the second reset node are turned on Connect electrically.

The eighth switching element Tr8 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage, and when the turn- .

The ninth stage switching element Tr9 of the n-th stage is turned on or off in response to the scan pulse from the (n-2) th stage, and when the turn- .

The tenth switching element Tr10 of the n-th stage is turned on or off in response to a voltage supplied to the set node, and when the first reset node and the discharging power source are turned on, they are electrically connected do.

The eleventh switching element Tr11 of the n-th stage is turned on or off in response to a voltage supplied to the set node, and when the second reset node and the discharging power source are turned on, do.

The twelfth switching element Tr12 of the n-th stage is turned on or off in response to the voltage supplied to the first reset node, and when the set node and the discharging power supply are turned on electrically, do.

The thirteenth switching element Tr13 of the n-th stage is turned on or off in response to a voltage supplied to the second reset node, and when the set node and the discharging power source are electrically connected to each other do.

The fourteenth switching device Tr14 of the n-th stage is turned on or off in response to a scan pulse from the (n + 2) th stage, and electrically connects the set node and the discharge power source .

The output section OB provided in the n-th stage includes a pull-up switching device Uc, a first pull-down switching device Ds1, and a second pull-down switching device Ds2.

The pull-up switching element Uc of the n-th stage is turned on or turned off in response to the voltage supplied to the set node Q, and is turned on at any one of the clock transmission lines and the n-th stage output terminal OT) are electrically connected to each other.

The first pull-down switching device Ds1 of the n-th stage is turned on or off in response to the voltage supplied to the first reset node QB1, and the output terminal OT of the n-th stage And the discharge power source are electrically connected to each other.

The second pull-down switching device Ds2 of the n-th stage is turned on or off in response to the voltage supplied to the set node Q, and when turned on, the output of one of the clock transmission lines and the n-th stage Terminals OT are electrically connected to each other.

The second pull-down switching device Ds2 of the n-th stage is turned on or off in response to the voltage supplied to the second reset node QB2, and the output terminal OT And the discharge power source are electrically connected to each other.

The stage according to the sixth embodiment of the present invention includes first and second reset nodes QB1 and QB2, and the first reset node QB1 and the second reset node QB2 are connected in a frame period And are charged alternately. For example, in the odd-numbered frame period, the first reset node QB1 is charged and the second reset node QB2 is discharged. In the odd-numbered frame period, the first reset node QB1 is discharged, The reset node QB2 is charged.

Specifically, during the set period in which the set node QB is charged, all of the first and second reset nodes QB1 and QB2 are maintained in a discharged state. In the reset period in which the set node QB is discharged, Either one of the first and second reset nodes QB1 and QB2 is charged and one of them is discharged. At this time, in the reset period, the first and second reset nodes QB1 and QB2 are alternately charged in frame units. Accordingly, when the first pull-down switching device Ds1 connected to the first reset node QB1 during the reset period in the odd-numbered frame period is turned on, the second pull-down switch Q2 connected to the second reset node QB2 The switching element Ds2 is turned off. Conversely, when the first pull-down switching element Ds1 connected to the first reset node QB1 during the reset period in the odd-numbered frame period is turned off, the second pull-down switching element Ds2 connected to the second reset node QB2 The pulldown switching element Ds2 is turned on.

For this operation, the first alternating-current voltage Vac1 is supplied to the second and fourth switching elements Tr2 and Tr4 instead of the charging voltage VDD, and the first alternating-current voltage Vac1 is inverted by 180 degrees The second alternating-current voltage Vac2 is supplied to the fifth and seventh switching elements Tr5 and Tr7.

Here, the twelfth, thirteenth, and fourteenth switching devices Tr12, Tr13, and Tr14 are four-terminal switching devices.

Seventh In the embodiment  Following Shift  register

14 is a diagram showing a circuit configuration of a stage according to a seventh embodiment of the present invention.

Each stage according to the seventh embodiment of the present invention includes a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit NC controls signal states of the set node Q, the first reset node QB1 and the second reset node QB2 of the stage. The output section OB is supplied with any one of a plurality of clock pulses having different phases and is supplied with the voltage supplied to the set node Q, the first reset node QB1 and the second reset node QB2 And outputs the supplied clock pulse as a scan pulse through its output terminal OT in response.

The node controller NC provided in the n-th stage includes a first discharging switching element TD1 and first through fourteenth switching elements Tr1 through Tr14.

The first switching device Tr1 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage and electrically connects the set power supply to the set power supply.

The second switching device Tr2 of the n-th stage is turned on or off in response to the first AC voltage (Vac1) from the first AC power supply. When the first switching device Tr2 is turned on, (CN1) are electrically connected to each other.

The third switching element Tr3 of the n-th stage is turned on or off in response to the voltage supplied to the set node Q. When the first common node CN1 is turned on, They are electrically connected to each other.

The fourth switching device Tr4 of the n-th stage is turned on or off in response to a voltage supplied to the first common node CN1, and when the first AC power source and the first reset And electrically connects the node QB1 to each other.

The fifth switching element Tr5 of the n-th stage is turned on or turned off in response to the second AC voltage Vac2 from the second AC power supply, and when the second AC power is turned on, (CN2) are electrically connected to each other.

The sixth switching element Tr6 of the n-th stage is turned on or turned off in response to the voltage supplied to the set node, and electrically connects the second common node and the discharge power supply to each other .

The seventh switching device Tr7 of the n-th stage is turned on or off in response to a voltage supplied to the second common node, and when the second AC power source and the second reset node are turned on Connect electrically.

The eighth switching element Tr8 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage, and when the turn- .

The ninth stage switching element Tr9 of the n-th stage is turned on or off in response to the scan pulse from the (n-2) th stage, and when the turn- .

The tenth switching element Tr10 of the n-th stage is turned on or off in response to a voltage supplied to the set node, and when the first reset node and the discharging power source are turned on, they are electrically connected do.

The eleventh switching element Tr11 of the n-th stage is turned on or off in response to a voltage supplied to the set node, and when the second reset node and the discharging power source are turned on, do.

The twelfth switching element Tr12 of the n-th stage is turned on or off in response to the voltage supplied to the first reset node, and when the set node and the discharging power supply are turned on electrically, do.

The thirteenth switching element Tr13 of the n-th stage is turned on or off in response to a voltage supplied to the second reset node, and when the set node and the discharging power source are electrically connected to each other do.

The fourteenth switching device Tr14 of the n-th stage is turned on or off in response to the scan pulse from the (n + 2) th stage, and when the set node and any one of the clock transmission lines are turned on electrically Connect.

The output section OB provided in the n-th stage includes a pull-up switching device Uc, a first pull-down switching device Ds1, and a second pull-down switching device Ds2.

The pull-up switching element Uc of the n-th stage is turned on or turned off in response to the voltage supplied to the set node Q, and is turned on at any one of the clock transmission lines and the n-th stage output terminal OT) are electrically connected to each other.

The first pull-down switching device Ds1 of the n-th stage is turned on or off in response to the voltage supplied to the first reset node QB1, and the output terminal OT of the n-th stage ) And the discharge power source are electrically connected to each other.

The second pull-down switching device Ds2 of the n-th stage is turned on or off in response to the voltage supplied to the set node Q, and when turned on, the output of one of the clock transmission lines and the n-th stage Terminals OT are electrically connected to each other.

The second pull-down switching device Ds2 of the n-th stage is turned on or off in response to the voltage supplied to the second reset node QB2, and the output terminal OT ) And the discharge power source are electrically connected to each other.

Here, the twelfth and thirteenth switching elements Tr12 and Tr14 are four-terminal switching elements.

Eighth In the embodiment  Following Shift  register

15 is a diagram showing a circuit configuration of a stage according to an eighth embodiment of the present invention.

Each stage according to the eighth embodiment of the present invention includes a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit NC controls signal states of the set node Q, the first reset node QB1 and the second reset node QB2 of the stage. The output section OB is supplied with any one of a plurality of clock pulses having different phases and is supplied with the voltage supplied to the set node Q, the first reset node QB1 and the second reset node QB2 And outputs the supplied clock pulse as its own scan pulse through its output terminal OT in response.

The node controller NC provided in the n-th stage includes a first discharging switching element TD1 and first through fourteenth switching elements Tr1 through Tr14.

The first switching device Tr1 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage and electrically connects the set power supply to the set power supply.

The second switching device Tr2 of the n-th stage is turned on or off in response to the first AC voltage (Vac1) from the first AC power supply. When the first switching device Tr2 is turned on, (CN1) are electrically connected to each other.

The third switching element Tr3 of the n-th stage is turned on or off in response to the voltage supplied to the set node Q. When the first common node CN1 is turned on, Connect the power supply to each other electrically.

The fourth switching device Tr4 of the n-th stage is turned on or off in response to a voltage supplied to the first common node CN1, and when the first AC power source and the first reset And electrically connects the node QB1 to each other.

The fifth switching element Tr5 of the n-th stage is turned on or turned off in response to the second AC voltage Vac2 from the second AC power supply, and when the second AC power is turned on, (CN2) are electrically connected to each other.

The sixth switching element Tr6 of the n-th stage is turned on or off in response to a voltage supplied to the set node, and when the second common node and the first discharging power supply are turned on electrically Connect.

The seventh switching device Tr7 of the n-th stage is turned on or off in response to a voltage supplied to the second common node, and when the second AC power source and the second reset node are turned on Connect electrically.

The eighth switching element Tr8 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage, and when the first reset node and the second discharging power source are turned on, Connect electrically.

The ninth stage switching element Tr9 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage and is turned on when the second reset node and the second discharge power source They are electrically connected to each other.

The tenth switching element Tr10 of the n-th stage is turned on or off in response to a voltage supplied to the set node, and when the first reset node and the second discharging power source are turned on, .

The eleventh switching element Tr11 of the n-th stage is turned on or off in response to a voltage supplied to the set node, and when the second reset node and the second discharging power source are turned on .

The twelfth switching element Tr12 of the n-th stage is turned on or off in response to the voltage supplied to the first reset node, and when the set node and the discharging power supply are turned on electrically, do.

The thirteenth switching element Tr13 of the n-th stage is turned on or off in response to a voltage supplied to the second reset node, and when the set node and the discharging power source are electrically connected to each other do.

The fourteenth switching device Tr14 of the n-th stage is turned on or off in response to the scan pulse from the (n + 2) th stage, and when the set node and any one of the clock transmission lines are turned on electrically Connect.

The output section OB provided in the n-th stage includes a pull-up switching device Uc, a first pull-down switching device Ds1, and a second pull-down switching device Ds2.

The pull-up switching element Uc of the n-th stage is turned on or turned off in response to the voltage supplied to the set node Q, and is turned on at any one of the clock transmission lines and the n-th stage output terminal OT) are electrically connected to each other.

The first pull-down switching device Ds1 of the n-th stage is turned on or off in response to the voltage supplied to the first reset node QB1, and the output terminal OT of the n-th stage And the first discharge power source are electrically connected to each other.

The second pull-down switching device Ds2 of the n-th stage is turned on or off in response to the voltage supplied to the second reset node QB2, and the output terminal OT And the first discharge power source are electrically connected to each other.

Here, the second discharge voltage VSS2 from the second discharge power source is smaller than the first discharge voltage VSS1 from the first discharge power source.

Here, the eighth, ninth, tenth and eleventh switching elements Tr8, Tr9, Tr10 and Tr11 are four-terminal switching elements.

9th In the embodiment  Following Shift  register

16 is a diagram showing a circuit configuration of a stage according to a ninth embodiment of the present invention.

Each stage according to the ninth embodiment of the present invention includes a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit (NC) controls the signal states of the set node (Q) and the reset node (QB) of the stage. The output unit OB is supplied with any one of a plurality of clock pulses having different phases and outputs the supplied clock pulse to its output terminal (QB) according to the signal states of the set node Q and the reset node QB OT) as a scan pulse.

The node control unit NC provided in the n-th stage includes the set node Q and the first to third switching elements Tr1 to Tr3.

The first switching device Tr1 of the n-th stage is turned on or off in response to the scan pulse from the n-2 stage, and the power for charging and the set node Q are electrically connected to each other do.

The second switching device Tr2 of the n-th stage is turned on or off in response to the scan pulse from the (n + 2) th stage, and when the set node Q is turned on, Connect.

The third switching device Tr3 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n-1) -th stage, and the output terminal of the n- And electrically connects the set node (Q).

The discharging voltage VSS from the discharging power source is smaller than the charging voltage VDD from the charging power source.

The output section QB provided in the n-th stage includes a pull-up switching device Uc and a pull-down switching device Ds.

The pull-up switching device Uc of the n-th stage is turned on or off according to the signal state of the set node Q and is turned on at any one of the clock transmission lines and the output terminal OT of the n-th stage, Are electrically connected to each other.

The pull-down switching device Ds of the n-th stage is turned on or off in response to a clock pulse supplied to the output OB of the (n + 2) -th stage, OT) and the discharge power source are electrically connected to each other. The gate terminal of this pull-down switching device Ds serves as a reset node QB.

Here, the first and second switching elements Tr1 and Tr2 are four-terminal switching elements.

Article 10 In the embodiment  Following Shift  register

17 is a diagram showing a circuit configuration of a stage according to a tenth embodiment of the present invention.

Each stage according to the tenth embodiment of the present invention includes a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit (NC) controls the signal states of the set node (Q) and the reset node (QB) of the stage. The output unit OB is supplied with any one of a plurality of clock pulses having different phases and outputs the supplied clock pulse to its output terminal (QB) according to the signal states of the set node Q and the reset node QB OT) as a scan pulse.

The node control unit NC provided in the n-th stage includes the set node Q, the reset node QB, and the first to ninth switching elements Tr1 to Tr9.

The first switching device Tr1 of the n-th stage is turned on or off in response to the scan pulse from the (n-2) th stage, and the turn-on charging power source and the set node Q are electrically Connect.

The second switching device Tr2 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n-2) th stage. When the second switching device Tr2 is turned on, Are electrically connected to each other.

When the third switching device Tr3 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n + 2) -th stage, the common node and the discharging power supply are electrically .

The fourth switching device Tr4 of the n-th stage is turned on or off in response to the voltage supplied to the common node, and when the turn-on, the charging power supply and the reset node QB are electrically Connect.

The fifth switching device Tr5 of the n-th stage is turned on or off in response to a scan pulse from the n-2 stage, and when the reset node is turned on, the reset node and the discharge power supply are electrically connected do.

The sixth switching element Tr6 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n + 2) -th stage, and when the reset node is turned on, They are electrically connected to each other.

The seventh switching device Tr7 of the n-th stage electrically connects the reset node QB and the discharging power supply to each other in response to the voltage supplied to the set node Q.

The eighth switching device Tr8 of the n-th stage electrically connects the set node and the discharging power source to each other in response to a voltage supplied to the reset node QB.

The ninth stage switching element Tr9 of the n-th stage electrically connects the set node and the discharge power source in response to a scan pulse from the (n + 2) th stage.

The output section QB provided in the n-th stage includes a pull-up switching device Uc and a pull-down switching device Ds.

The pull-up switching device Uc of the n-th stage is turned on or off according to the signal state of the set node Q and is turned on at any one of the clock transmission lines and the output terminal OT of the n-th stage, Are electrically connected to each other.

The pull-down switching device Ds of the n-th stage is turned on or off according to the signal state of the reset node QB. When the output terminal OT of the n-th stage is turned on, And are electrically connected to each other.

The discharging voltage VSS from the discharging power source is smaller than the charging voltage VDD from the charging power source.

The eighth and ninth switching elements Tr8 and Tr9 are four-terminal switching elements.

Eleventh In the embodiment  Following Shift  register

18 is a diagram showing a circuit configuration of a stage according to an eleventh embodiment of the present invention.

Each stage according to the eleventh embodiment of the present invention includes a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit (NC) controls the signal states of the set node (Q) and the reset node (QB) of the stage. The output unit OB is supplied with any one of a plurality of clock pulses having different phases and outputs the supplied clock pulse to its output terminal (QB) according to the signal states of the set node Q and the reset node QB OT) as a scan pulse.

The node control unit NC provided in the n-th stage includes the set node Q, the reset node QB, and the first to ninth switching elements Tr1 to Tr9.

The first switching device Tr1 of the n-th stage is turned on or off in response to the scan pulse from the (n-2) th stage, and the turn-on charging power source and the set node Q are electrically Connect.

The second switching device Tr2 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n-2) th stage. When the second switching device Tr2 is turned on, Are electrically connected to each other.

When the third switching element Tr3 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n + 2) -th stage, when the common node CN and the discharge power source Are electrically connected to each other.

The fourth switching device Tr4 of the n-th stage is turned on or off in response to a voltage supplied to the common node CN, and is turned on when the charging power source and the reset node QB are turned on They are electrically connected to each other.

The fifth switching element Tr5 of the n-th stage is turned on or off in response to a scan pulse from the n-2 stage, and when the reset node QB and the discharging power source are turned on Connect electrically.

The sixth switching element Tr6 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n + 2) -th stage, and the reset node QB and the Connect the dedicated power supply to each other electrically.

The seventh switching device Tr7 of the n-th stage electrically connects the reset node QB and the discharging power supply to each other in response to the voltage supplied to the set node Q.

The eighth switching element Tr8 of the n-th stage electrically connects the set node Q and the discharging power source in response to a voltage supplied to the reset node QB.

The ninth stage switching element Tr9 of the nth stage electrically connects the set node Q and any one of the clock transmission lines to each other in response to a scan pulse from the (n + 2) th stage.

The output section QB provided in the n-th stage includes a pull-up switching device Uc and a pull-down switching device Ds.

The pull-up switching device Uc of the n-th stage is turned on or off according to the signal state of the set node Q and is turned on at any one of the clock transmission lines and the output terminal OT of the n-th stage, Are electrically connected to each other.

The pull-down switching device Ds of the n-th stage is turned on or off according to the signal state of the reset node QB. When the output terminal OT of the n-th stage is turned on, And are electrically connected to each other.

The discharging voltage VSS from the discharging power source is smaller than the charging voltage VDD from the charging power source.

Here, the eighth switching device Tr8 is a four-terminal switching device.

Article 12 In the embodiment  Following Shift  register

19 is a diagram showing a circuit configuration of a stage according to a twelfth embodiment of the present invention.

Each stage according to the twelfth embodiment of the present invention includes a node control unit (NC) and an output unit (OB) as shown in Fig. The node control unit (NC) controls the signal states of the set node (Q) and the reset node (QB) of the stage. The output unit OB is supplied with any one of a plurality of clock pulses having different phases and outputs the supplied clock pulse to its output terminal (QB) according to the signal states of the set node Q and the reset node QB OT) as a scan pulse.

The node control unit NC provided in the n-th stage includes the set node Q, the reset node QB, and the first to ninth switching elements Tr1 to Tr9.

The first switching device Tr1 of the n-th stage is turned on or off in response to the scan pulse from the (n-2) th stage, and the turn-on charging power source and the set node Q are electrically Connect.

The second switching device Tr2 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n-2) th stage. When the second switching device Tr2 is turned on, Are electrically connected to each other.

When the third switching device Tr3 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n + 2) -th stage, Connect the dedicated power supply to each other electrically.

The fourth switching device Tr4 of the n-th stage is turned on or off in response to a voltage supplied to the common node CN, and is turned on when the charging power source and the reset node QB are turned on They are electrically connected to each other.

The fifth switching device Tr5 of the n-th stage is turned on or off in response to a scan pulse from the (n-2) th stage, and the reset node QB and the second discharge power supply They are electrically connected to each other.

The sixth switching element Tr6 of the n-th stage is turned on or off in response to a clock pulse supplied to the output of the (n + 2) -th stage, and when the reset node QB and the 2 electrically connect the dedicated power supply to each other.

The seventh switching device Tr7 of the n-th stage electrically connects the reset node QB and the second discharging power supply in response to the voltage supplied to the set node.

The eighth switching element Tr8 of the n-th stage electrically connects the set node Q and the discharging power source in response to a voltage supplied to the reset node QB.

The ninth switching element Tr9 of the nth stage electrically connects the set node Q and the discharging power source in response to a scan pulse from the (n + 2) th stage.

The output section QB provided in the n-th stage includes a pull-up switching device Uc and a pull-down switching device Ds.

The pull-up switching device Uc of the n-th stage is turned on or off according to the signal state of the set node Q and is turned on at any one of the clock transmission lines and the output terminal OT of the n-th stage, Are electrically connected to each other.

The pull-down switching element Ds of the n-th stage is turned on or off according to the signal state of the reset node QB, and is turned on when the output terminal OT of the n- Connect the power supply to each other electrically.

The first discharging voltage VSS1 from the first discharging power source and the second discharging voltage VSS2 from the second discharging power source are smaller than the charging voltage VDD from the charging power source, The second discharge voltage VSS2 is less than or equal to the first discharge voltage VSS1.

Here, the fifth, sixth and seventh switching elements Tr5, Tr6 and Tr7 are four-terminal switching elements.

On the other hand, in the first, second, third, fourth, and fifth embodiments, the charging power source connected to the first switching device Tr1 and the charging power source connected to the second switching device Tr2 are charged May also be a power source. For example, the first charging power supply may be connected to the first switching device Tr1, while the second charging power supply may be connected to the second switching device Tr2. The first charging power supply and the second charging power supply are independent of each other, and the charging voltage from the first charging power supply and the charging voltage from the second charging power supply may be the same or different from each other.

FIG. 20 is a diagram showing the voltage of the set node and the voltage waveform of the scan pulse generated by the shift register according to the fourth embodiment of FIG. 11. As shown in FIG. 20, the voltage (Vq) It can be seen that the voltage Vsp is normally output.

FIG. 21 is a diagram showing the voltage of the set node and the voltage waveform of the scan pulse generated by the shift register according to the first embodiment of FIG. 5. As shown in FIG. 21, It can be seen that the voltage Vsp is normally output.

FIG. 22 is a diagram showing the voltage of the set node and the voltage waveform of the scan pulse generated by the shift register according to the second embodiment of FIG. 9, and the voltage Vq of the set node and the scan pulse It can be seen that the voltage Vsp is normally output.

FIG. 23 is a diagram showing the voltage of the set node and the voltage waveform of the scan pulse generated by the shift register according to the fifth embodiment of FIG. 12, in which the voltage Vq of the set node, It can be seen that the voltage Vsp is normally output.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. Will be clear to those who have knowledge of.

Q: set node QB: reset node
Uc: Pull-up switching element Ds: Pull-down switching element
OB: output unit VDD: charging voltage
VSS: discharge voltage CLKi: i-th clock pulse
Tri: i < th > switching device NC:
OT: Output terminal

Claims (19)

A plurality of stages for sequentially outputting scan pulses;
Each of the stages receiving a clock signal of a set node and a reset node and a plurality of clock pulses having different phases, And an output section for outputting the pulse as a scan pulse through its output terminal; And,
Wherein at least one of the switching elements provided in the node control section of each stage is a 4-terminal switching element including a sub terminal for raising a threshold voltage by a negative voltage from the outside. The method according to claim 1,
The node control unit of any stage,
A first switching device that is turned on or off in response to a scan pulse from the front stage and electrically connects the first charging power supply and the set node to each other;
A second switching element that is turned on or turned off in response to a charging voltage from the second charging power supply and electrically connects the second charging power supply and the reset node to each other upon turning on;
A third switching element which is turned on or off in response to a scan pulse from the front stage and which electrically connects the reset node and the discharge power supply when turned on;
A fourth switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the reset node and the discharge power supply when the switch is turned on;
A fifth switching element that is turned on or off in response to a voltage supplied to the reset node and electrically connects the set node and the discharge power supply when the first switch is turned on;
And a sixth switching element that is turned on or off in response to a scan pulse from the rear stage and electrically connects the set node and the discharge power supply to each other at the turn-on time;
The discharging voltage from the discharging power source is smaller than the charging voltage;
Wherein at least one of the fifth and sixth switching elements is a four-terminal switching element. 3. The method of claim 2,
An output unit provided in an arbitrary n stage,
A pull-up switching element which is turned on or off according to a signal state of the set node and which electrically connects one of the clock transmission lines and the output terminal of the arbitrary stage when the switch is turned on; And
And a pull-down switching element that is turned on or off according to a signal state of the reset node and electrically connects the output terminal of the stage to the discharge power source when the switch is turned on. register. The method according to claim 1,
The node control unit of any stage,
A first switching device that is turned on or off in response to a scan pulse from the front stage and electrically connects the first charging power supply and the set node to each other;
A second switching element that is turned on or off in response to a charging voltage from the second charging power supply and electrically connects the second charging power supply and the reset node to each other;
A third switching element which is turned on or off in response to a scan pulse from the front stage and which electrically connects the reset node and the discharge power supply when turned on;
A fourth switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the reset node and the discharge power supply when the switch is turned on;
A fifth switching element that is turned on or off in response to a voltage supplied to the reset node and electrically connects the set node and the discharge power supply when the first switch is turned on;
And a sixth switching device that is turned on or off in response to a scan pulse from the rear stage and electrically connects the set node and any one of the clock transmission lines to each other upon turn-on;
The discharging voltage from the discharging power source is smaller than the charging voltage;
And the fifth switching element is a four-terminal switching element. The method according to claim 1,
The node control unit of any stage,
A first switching device that is turned on or off in response to a scan pulse from the front stage and electrically connects the first charging power supply and the set node to each other;
A second switching element that is turned on or turned off in response to a charging voltage from the second charging power supply and electrically connects the second charging power supply and the reset node to each other upon turning on;
A third switching device that turns on or off in response to a scan pulse from the front stage and electrically connects the reset node and the first discharge power supply when the first switch is turned on;
A fourth switching device that is turned on or off in response to a voltage supplied to the set node and electrically connects the reset node and the first power supply to each other when the power supply is turned on;
A fifth switching element that is turned on or off in response to a voltage supplied to the reset node and electrically connects the set node and a second discharging power supply when the first switch is turned on;
And a sixth switching element which is turned on or off in response to a scan pulse from the rear stage and which electrically connects the set node and the second discharge power supply when turned on;
A first discharging voltage from the first discharging power source and a second discharging voltage from the second discharging power source are smaller than the charging voltage;
The first discharge voltage is less than or equal to the second discharge voltage;
And the third and fourth switching elements are four-terminal switching elements. 6. The method of claim 5,
And an output unit provided in the arbitrary stage,
A pull-up switching element which is turned on or off according to a signal state of the set node and which electrically connects one of the clock transmission lines and the output terminal of the arbitrary stage when the switch is turned on; And
And a pull-down switching element that is turned on or off according to a signal state of the reset node and electrically connects the output terminal of the arbitrary stage to the second power supply when the power supply is turned on. Shift register. The method according to claim 1,
The node control unit of any stage,
A first switching device that is turned on or off in response to a scan pulse from the front stage and electrically connects the first charging power supply and the set node to each other;
A second switching element that is turned on or off in response to a clock pulse supplied to an output terminal of the rear stage and electrically connects the second charging power supply and the reset node to each other;
A third switching element which is turned on or off in response to a scan pulse from the front stage and which electrically connects the reset node and the discharge power supply when turned on;
A fourth switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the reset node and the discharge power supply when the switch is turned on;
A fifth switching element that is turned on or off in response to a voltage supplied to the reset node and electrically connects the set node and the discharge power supply when the first switch is turned on;
And a sixth switching element that is turned on or off in response to a scan pulse from the rear stage and electrically connects the set node and the discharge power supply to each other at the turn-on time;
A discharging voltage from the discharging power source is smaller than a charging voltage from the first and second charging power sources;
And the fifth and sixth switching elements are four-terminal switching elements. The method according to claim 1,
The node control unit of any stage,
A first switching device that is turned on or off in response to a scan pulse from the front stage and electrically connects the first charging power supply and the set node to each other;
A second switching element that is turned on or off in response to a clock pulse supplied to an output terminal of the rear stage and electrically connects the second charging power supply and the reset node to each other;
A third switching device that turns on or off in response to a scan pulse from the front stage and electrically connects the reset node and the first discharge power supply when the first switch is turned on;
A fourth switching device that is turned on or off in response to a voltage supplied to the set node and electrically connects the reset node and the first power supply to each other when the power supply is turned on;
A fifth switching element that is turned on or off in response to a voltage supplied to the reset node and electrically connects the set node and a second discharging power supply when the first switch is turned on;
And a sixth switching element that is turned on or turned off in response to a scan pulse from the rear stage and electrically connects the set node and the clock transmission line to each other at the turn-on time;
A first discharging voltage from the first discharging power source and a second discharging voltage from the second discharging power source are smaller than a charging voltage from the first and second charging power sources;
The second discharge voltage is equal to a voltage value of a clock pulse in a low voltage state;
The first discharge voltage is less than or equal to the second discharge voltage;
And the third and fourth switching elements are four-terminal switching elements. 9. The method of claim 8,
And an output unit provided in the arbitrary stage,
A pull-up switching element that is turned on or off according to a signal state of the set node and electrically connects one of the clock transmission lines and an output terminal of any stage when the switch is turned on; And
And a pull-down switching element that is turned on or off according to a signal state of the reset node and electrically connects the output terminal of the arbitrary stage to the second power supply when the power supply is turned on. Shift register. The method according to claim 1,
Wherein the set node is divided into a first reset node and a second reset node;
A node control unit provided in an arbitrary stage,
A first switching element that is turned on or off in response to a scan pulse from the front stage and electrically connects the set power supply to the set node;
A second switching device that is turned on or off in response to a first AC voltage from the first AC power supply and electrically connects the first AC power supply and the first common node to each other when the first AC power supply is turned on;
A third switching element that is turned on or off in response to a voltage supplied to the set node and that electrically connects the first common node and a power supply for discharging when turned on;
A fourth switching element that is turned on or off in response to a voltage supplied to the first common node and electrically connects the first AC power supply and the first reset node to each other when the first common node is turned on;
A fifth switching device that is turned on or off in response to a second AC voltage from the second AC power supply and electrically connects the second AC power supply and the second common node to each other when the first AC power supply is turned on;
A sixth switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the second common node and the discharge power supply to each other when the first switch is turned on;
A seventh switching element that is turned on or off in response to a voltage supplied to the second common node and electrically connects the second AC power source and the second reset node to each other when the first common node is turned on;
An eighth switching element which is turned on or off in response to a scan pulse from the front stage and electrically connects the first reset node and the discharge power supply to each other;
A ninth switching element that is turned on or turned off in response to a scan pulse from the front stage and electrically connects the second reset node and the discharge power supply to each other;
A tenth switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the first reset node and the discharge power supply to each other;
An eleventh switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the second reset node and the discharging power supply to each other;
A twelfth switching element that is turned on or turned off in response to a voltage supplied to the first reset node and electrically connects the set node and the discharging power supply when turned on;
A thirteenth switching element that is turned on or off in response to a voltage supplied to the second reset node and electrically connects the set node and the discharging power supply when turned on;
And a fourteenth switching element that is turned on or off in response to a scan pulse from the rear stage and electrically connects the set node and the discharging power supply when turned on;
The discharging voltage from the discharging power source is smaller than the charging voltage from the charging power source;
The phase of the first AC voltage is inverted by 180 degrees with respect to the phase of the second AC voltage;
And the twelfth, thirteenth, and fourteenth switching elements are four-terminal switching elements. The method according to claim 1,
Wherein the set node is divided into a first reset node and a second reset node;
A node control unit provided in an arbitrary stage,
A first switching element that is turned on or off in response to a scan pulse from the front stage and electrically connects the set power supply to the set node;
A second switching device that is turned on or off in response to a first AC voltage from the first AC power supply and electrically connects the first AC power supply and the first common node to each other when the first AC power supply is turned on;
A third switching element that is turned on or off in response to a voltage supplied to the set node and that electrically connects the first common node and a power supply for discharging when turned on;
A fourth switching element that is turned on or off in response to a voltage supplied to the first common node and electrically connects the first AC power supply and the first reset node to each other when the first common node is turned on;
A fifth switching device that is turned on or off in response to a second AC voltage from the second AC power supply and electrically connects the second AC power supply and the second common node to each other when the first AC power supply is turned on;
A sixth switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the second common node and the discharge power supply to each other when the first switch is turned on;
A seventh switching element that is turned on or off in response to a voltage supplied to the second common node and electrically connects the second AC power source and the second reset node to each other when the first common node is turned on;
An eighth switching element which is turned on or off in response to a scan pulse from the front stage and electrically connects the first reset node and the discharge power supply to each other;
A ninth switching element that is turned on or turned off in response to a scan pulse from the front stage and electrically connects the second reset node and the discharge power supply to each other;
A tenth switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the first reset node and the discharge power supply to each other;
An eleventh switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the second reset node and the discharging power supply to each other;
A twelfth switching element that is turned on or turned off in response to a voltage supplied to the first reset node and electrically connects the set node and the discharging power supply when turned on;
A thirteenth switching element that is turned on or off in response to a voltage supplied to the second reset node and electrically connects the set node and the discharging power supply when turned on;
And a fourteenth switching element that is turned on or off in response to a scan pulse from the rear stage and electrically connects the set node and any one of the clock transmission lines to each other at the turn-on time;
The discharging voltage from the discharging power source is smaller than the charging voltage from the charging power source;
The phase of the first AC voltage is inverted by 180 degrees with respect to the phase of the second AC voltage;
And the twelfth and thirteenth switching elements are four-terminal switching elements. The method according to claim 1,
Wherein the set node is divided into a first reset node and a second reset node;
A node control unit provided in an arbitrary stage,
A first switching element that is turned on or off in response to a scan pulse from the front stage and electrically connects the set power supply to the set node;
A second switching device that is turned on or off in response to a first AC voltage from the first AC power supply and electrically connects the first AC power supply and the first common node to each other when the first AC power supply is turned on;
A third switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the first common node and the first discharging power supply to each other when turned on;
A fourth switching element that is turned on or off in response to a voltage supplied to the first common node and electrically connects the first AC power supply and the first reset node to each other when the first common node is turned on;
A fifth switching device that is turned on or off in response to a second AC voltage from the second AC power supply and electrically connects the second AC power supply and the second common node to each other when the first AC power supply is turned on;
A sixth switching device that is turned on or off in response to a voltage supplied to the set node and electrically connects the second common node and the first discharging power supply to each other when the first switching device is turned on;
A seventh switching element that is turned on or off in response to a voltage supplied to the second common node and electrically connects the second AC power source and the second reset node to each other when the first common node is turned on;
An eighth switching element that is turned on or off in response to a scan pulse from the front stage and electrically connects the first reset node and the second discharge power source to each other when turned on;
A ninth switching element that turns on or off in response to a scan pulse from the front stage and electrically connects the second reset node and the second power supply to each other when the power supply is turned on;
A tenth switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the first reset node and the second power supply to each other when the power supply is turned on;
An eleventh switching element that is turned on or off in response to a voltage supplied to the set node and electrically connects the second reset node and the second power supply to each other when the power supply is turned on;
A twelfth switching element that is turned on or off in response to a voltage supplied to the first reset node and electrically connects the set node and the first discharging power supply to each other when turned on;
A thirteenth switching element that is turned on or off in response to a voltage supplied to the second reset node and electrically connects the set node and the first discharging power supply when the first switching element is turned on;
And a fourteenth switching element that is turned on or off in response to a scan pulse from the rear stage and electrically connects the set node and the first discharging power source when turned on;
The first discharge voltage from the first discharge power source and the second discharge voltage from the second discharge power source are smaller than the charge voltage from the charge power source;
The second discharge voltage is less than or equal to the first discharge voltage;
The phase of the first AC voltage is inverted by 180 degrees with respect to the phase of the second AC voltage;
And the eighth, ninth, tenth, and eleventh switching elements are four-terminal switching elements. 13. The method of claim 12,
And an output unit provided in the arbitrary stage,
A pull-up switching element that is turned on or off according to a signal state of the set node and electrically connects one of the clock transmission lines and an output terminal of any stage when the switch is turned on;
A first pull-down switching device that is turned on or off according to a signal state of the first reset node and electrically connects an output terminal of the stage to the first power source when the power source is turned on;

And a second pull-down switching element that is turned on or off according to a signal state of the second reset node and electrically connects the output terminal of the arbitrary stage to the first discharge power source when the first switch is turned on A shift register. The method according to claim 1,
The node control unit of any stage,
A first switching element that is turned on or off in response to a scan pulse from the front stage and electrically connects the power supply for charging and the set node when turned on;
A second switching element that is turned on or off in response to a scan pulse from a rear stage and electrically connects the set node and a power supply for discharging when turned on;
And a third switching element that is turned on or off in response to a clock pulse supplied to the output of the front stage and electrically connects the output node of the front stage to the set node at the turn-
The discharging voltage from the discharging power source is smaller than the charging voltage from the charging power source;
Wherein the first and second switching elements are four-terminal switching elements. 15. The method of claim 14,
And an output unit provided in the arbitrary stage,
A pull-up switching element which is turned on or off in response to a voltage supplied to the set node and which electrically connects one of the clock transmission lines and an output terminal of a certain stage when the switch is turned on; And
And a pull-down switching element that is turned on or off in response to a clock pulse supplied to the output of the rear stage and electrically connects the output terminal of the stage to the discharge power source when the turn- Features a shift register. The method according to claim 1,
The node control unit of any stage,
A first switching element that is turned on or off in response to a scan pulse from the front stage and electrically connects the set power supply to the set node;
A second switching element that is turned on or off in response to a clock pulse supplied to an output of the front stage and electrically connects the charging power supply and the common node to each other when the power supply is turned on;
A third switching device for electrically connecting the common node and a power supply for discharging when the power supply is turned on or off in response to a clock pulse supplied to an output part of the rear stage;
A fourth switching device that is turned on or off in response to a voltage supplied to the common node and electrically connects the charging power supply and the reset node when the first switching device is turned on;
A fifth switching element which is turned on or off in response to a scan pulse from the front stage and which electrically connects the reset node and the discharge power supply when turned on;
A sixth switching device that is turned on or off in response to a clock pulse supplied to the output terminal of the rear stage and electrically connects the reset node and the discharge power supply when the switch is turned on;
A seventh switching device for electrically connecting the reset node and the discharging power supply to each other in response to a voltage supplied to the set node;
An eighth switching element electrically connecting the set node and the discharge power supply in response to a voltage supplied to the reset node;
And a ninth switching element for electrically connecting the set node and the discharging power source in response to a scan pulse from the succeeding stage;
The discharging voltage from the discharging power source is smaller than the charging voltage from the charging power source;
And the eighth and ninth switching elements are four-terminal switching elements. The method according to claim 1,
The node control unit of any stage,
A first switching element that is turned on or off in response to a scan pulse from the front stage and electrically connects the set power supply to the set node;
A second switching element that is turned on or off in response to a clock pulse supplied to an output of the front stage and electrically connects the charging power supply and the common node to each other when the power supply is turned on;
A third switching device for electrically connecting the common node and a power supply for discharging when the power supply is turned on or off in response to a clock pulse supplied to an output part of the rear stage;
A fourth switching device that is turned on or off in response to a voltage supplied to the common node and electrically connects the charging power supply and the reset node when the first switching device is turned on;
A fifth switching element which is turned on or off in response to a scan pulse from the front stage and which electrically connects the reset node and the discharge power supply when turned on;
A sixth switching device that is turned on or off in response to a clock pulse supplied to the output terminal of the rear stage and electrically connects the reset node and the discharge power supply when the switch is turned on;
A seventh switching device for electrically connecting the reset node and the discharging power supply to each other in response to a voltage supplied to the set node;
An eighth switching element electrically connecting the set node and the discharge power supply in response to a voltage supplied to the reset node;
And a ninth switching element for electrically connecting the set node and any one of the clock transmission lines to each other in response to a scan pulse from the rear stage;
The discharging voltage from the discharging power source is smaller than the charging voltage from the charging power source;
And the eighth switching element is a four-terminal switching element. The method according to claim 1,
The node control unit of any stage,
A first switching element that is turned on or off in response to a scan pulse from the front stage and electrically connects the set power supply to the set node;
A second switching element that is turned on or off in response to a clock pulse supplied to an output of the front stage and electrically connects the charging power supply and the common node to each other when the power supply is turned on;
A third switching element for electrically connecting the common node and the first discharging power supply to each other when the second switching element is turned on or off in response to a clock pulse supplied to an output part of the rear stage;
A fourth switching device that is turned on or off in response to a voltage supplied to the common node and electrically connects the charging power supply and the reset node when the first switching device is turned on;
A fifth switching device that is turned on or off in response to a scan pulse from the front stage and electrically connects the reset node and the second discharge power source when the first switch is turned on;
A sixth switching device that is turned on or off in response to a clock pulse supplied to an output terminal of the rear stage and electrically connects the reset node and the second power supply to each other when the power supply is turned on;
A seventh switching element for electrically connecting the reset node and the second discharging power supply to each other in response to a voltage supplied to the set node;
An eighth switching device electrically connecting the set node and the first discharging power supply in response to a voltage supplied to the reset node;
And a ninth switching element for electrically connecting the set node and the first discharging power source in response to a scan pulse from the succeeding stage;
The first discharge voltage from the first discharge power source and the second discharge voltage from the second discharge power source are smaller than the charge voltage from the charge power source;
The second discharge voltage is less than or equal to the first discharge voltage;
And the fifth, sixth and seventh switching elements are four-terminal switching elements. 19. The method of claim 18,
And an output unit provided in the arbitrary stage,
A pull-up switching element which is turned on or off in response to a voltage supplied to the set node and which electrically connects one of the clock transmission lines and an output terminal of a certain stage when the switch is turned on; And
And a pull-down switching element that is turned on or off in response to a voltage supplied to the reset node and electrically connects the output terminal of the arbitrary stage to the first discharging power supply at the time of turn-on A shift register.

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