KR101141600B1 - Apparatus for measuring power consumption and generating a trigger for side channel analysis and method thereof - Google Patents

Abstract

The present invention relates to a power signal measurement and trigger generation technology for sub-channel analysis, and to analyze and verify the sub-channel generated by using a general-purpose card reader for a device card with an encryption algorithm. In order to verify the subchannel analysis of the mounted card, a general-purpose card reader may perform power signal measurement for subchannel analysis, and trigger generation by I / O data through a trigger generation module. According to the present invention, there is provided a device capable of performing subchannel analysis on a device card including a cryptographic algorithm using a general purpose reader and simple logic without developing a separate card reader for subchannel analysis, and generating a trigger. By separating the operation of the logic and reader from the device card, it is possible to reduce noise caused by the device card to obtain a more precise subchannel signal.

Side channel, power signal measurement, trigger

Description

Apparatus for measuring power consumption and generating a trigger for side channel analysis and method

The present invention relates to a subchannel analysis technique for a card equipped with a security algorithm, and in particular, performs a power signal measurement for subchannel analysis through a general-purpose card reader, and a trigger signal by I / O data through a trigger generation module. The present invention relates to a power supply signal measuring and triggering apparatus and method for subchannel analysis suitable for generating a signal.

The present invention is derived from the research conducted as part of the IT growth engine technology development project of the Ministry of Knowledge Economy. [Task Management No .: 2009-F-055-01, Title: Development of source technology and safety verification technology to prevent subchannel attacks] .

As is well known, cryptographic algorithms are being used as basic primitives that create mechanisms to provide security technologies such as authentication for computing systems, network systems, wired and wireless communication systems, and digital signatures. Since it is difficult to analyze cryptographic primitives in order to attack such cryptographic algorithms, it is common to find and exploit the weaknesses of implementing cryptographic primitives.

These cryptographic algorithms are implemented in software or hardware on a physical device and interact with the physical device environment when the algorithm is running. At this time, the attacker can observe this physical interaction, so the information generated from it can be usefully used for cryptographic analysis.

Such information is called subchannel information, and an attack using subchannel information is called a subchannel attack. As such, side-channel attacks are one of the strongest attacking techniques for cryptographic algorithms, while conventional cryptographic methods see cryptographic algorithms as mathematical targets, while side-channel attacks focus on how algorithms are implemented. It is a big threat.

A general subchannel analysis is a method of determining the secret key value by using the correlation between the internal state of the device with the secret key and the physical information such as power consumption, calculation time, and electronic copying that occur during the operation. .

In order to prepare for such various subchannel attack methods, various studies have been conducted on the subchannel analysis verification method for the physical device including the encryption algorithm. For example, by measuring the time for the parallax of the internal operation time, Parallax attack method to obtain secret information of the user, error attack method to obtain secret information based on error information generated during cryptographic operation performed on the device, power to obtain secret information based on power consumption information that can occur during cryptographic operation of the cryptographic device Analytical attacks.

Therefore, in order to prepare for such subchannel attack method, verification is performed by analyzing the subchannels generated before mounting the encryption algorithm on the physical device, or by analyzing the subchannels generated when the encryption algorithm is mounted on the physical device. The manner of carrying out is being performed.

In the conventional subchannel analysis verification method operating as described above, the subchannel information generated through the encryption algorithm is analyzed before the encryption algorithm is mounted on the physical device, and the encryption algorithm is mounted on the physical device. In order to analyze the subchannels generated in one state, a separate device reader is needed to receive information on the physical device.In the subchannel analysis, precise subchannel analysis and There was a problem that can not be verified.

Accordingly, the present invention provides a power signal measurement and trigger generation device and method for subchannel analysis that can perform subchannel analysis and verification using a card with a built-in encryption algorithm using a general purpose card reader.

In addition, the present invention, for the sub-channel analysis verification for the card equipped with the encryption algorithm, the power supply signal for the sub-channel analysis with a general-purpose card reader, and the trigger signal generated by the input and output data through the trigger generation module Provided are a power signal measuring and trigger generating device and method for subchannel analysis.

An apparatus for measuring and triggering a power signal for subchannel analysis according to an embodiment of the present invention includes: a card reader extension board connected to a host computer and measuring an input / output signal of a device card performing an encryption operation by an encryption algorithm; And a trigger generator for receiving the input / output signal from the card reader extension board and generating a trigger signal based on the input / output signal.

In this case, the card reader expansion board may include a power signal detection unit for detecting a power signal from the device card to measure power consumption, an input / output signal detection unit for detecting an input / output signal from the device card and transmitting the input / output signal to the trigger generator, and the host; A signal detection controller which receives a card reader control command from a computer and controls the power signal detector and the input / output signal detector, and is connected to the power signal detector and the input / output signal detector, and provides a contact interface with the device card. And a card contact device for attaching the device card.

The power signal detector may measure a power signal by placing a variable resistor at a power supply VDD and a ground GND terminal.

The trigger generation unit stores an input / output interface for interlocking with the host computer to receive trigger data and data rate information, and stores the trigger data and data rate information, respectively, and generates a trigger signal when the comparison result of the input / output signal and the trigger data is matched. It characterized in that it comprises a trigger generation control unit.

The trigger generation controller may reset the input / output signal data by initializing the trigger data if the input / output signal transmitted in byte units and the byte value of the trigger data do not match according to a transmission speed. If the input / output signal is received again and compared, and if the comparison result is matched, the operation of byte shifting the trigger data is repeated, and if the data order of the input / output signal is the same as the trigger data and the data of the last byte, the trigger signal It characterized in that to generate.

The method for measuring a power signal and generating a trigger for subchannel analysis according to an embodiment of the present invention includes the steps of measuring an input / output signal of a device card performing a cryptographic operation with a cryptographic algorithm in a card reader expansion board connected to a host computer; And receiving the input / output signal from a trigger generator and generating a trigger signal based on the input / output signal.

The measuring of the input / output signal may include detecting a power signal from the device card interfaced on the card reader expansion board according to a card reader control command from the host computer, and measuring power consumption. Detecting an input / output signal from a card, and transferring the detected input / output signal to the trigger generator.

On the other hand, the process of measuring the power consumption by detecting the power signal, characterized in that for measuring the power signal by placing a variable resistor on the power supply (VDD) and ground (GND) terminal.

The generating of the trigger signal may include receiving the trigger data and the rate information through an input / output interface interworking with the host computer, storing the trigger data and the rate information, respectively, and storing the trigger data and the rate data. If the comparison result is matched, the method may include generating a trigger signal.

The generating of the trigger signal may include: resetting the input / output signal data when the input / output signal transmitted in byte units and the byte value of the trigger data do not match according to a transmission rate, and resetting the input / output signal data. Repeating the step of re-receiving and comparing the input / output signal, and if the comparison result is matched, repeats the operation of byte shifting the trigger data so that the data order of the input / output signal is the same as the trigger data and the data of the last byte. If so, characterized in that it comprises the step of generating the trigger signal.

According to the power signal measuring and trigger generating device and method for subchannel analysis according to an embodiment of the present invention as described above has the following effects.

According to an exemplary embodiment of the present invention, a power signal measuring and triggering device for subchannel analysis and a method thereof include an encryption algorithm using a general-purpose reader and simple logic without developing a separate card reader for subchannel analysis. It is possible to provide an apparatus capable of performing subchannel analysis on the device card.

In addition, by separating the trigger generation logic and the operation of the reader from the device card, it is possible to reduce the noise caused by such a device card to obtain a more precise subchannel signal.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various different forms, and only the embodiments make the disclosure of the present invention complete, and the general knowledge in the art to which the present invention belongs. It is provided to fully inform the person having the scope of the invention, which is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

In describing the embodiments of the present invention, if it is determined that a detailed description of a known function or configuration may unnecessarily obscure the gist of the present invention, the detailed description thereof will be omitted. In addition, terms to be described below are terms defined in consideration of functions in the embodiments of the present invention, which may vary according to intentions or customs of users and operators. Therefore, the definition should be based on the contents throughout this specification.

Each block of the accompanying block diagrams and combinations of steps of the flowchart may be performed by computer program instructions. These computer program instructions may be mounted on a processor of a general purpose computer, special purpose computer, or other programmable data processing equipment such that instructions executed through the processor of the computer or other programmable data processing equipment may not be included in each block or flowchart of the block diagram. It will create means for performing the functions described in each step. These computer program instructions may be stored in a computer usable or computer readable memory that can be directed to a computer or other programmable data processing equipment to implement functionality in a particular manner, and thus the computer usable or computer readable memory. It is also possible for the instructions stored in to produce an article of manufacture containing instruction means for performing the functions described in each block or flowchart of each step of the block diagram. Computer program instructions may also be mounted on a computer or other programmable data processing equipment, such that a series of operating steps may be performed on the computer or other programmable data processing equipment to create a computer-implemented process to create a computer or other programmable data. Instructions that perform processing equipment may also provide steps for performing the functions described in each block of the block diagram and in each step of the flowchart.

In addition, each block or step may represent a portion of a module, segment or code that includes one or more executable instructions for executing a specified logical function (s). It should also be noted that in some alternative embodiments, the functions noted in the blocks or steps may occur out of order. For example, the two blocks or steps shown in succession may in fact be executed substantially concurrently or the blocks or steps may sometimes be performed in the reverse order, depending on the functionality involved.

The present invention is to perform the analysis and verification of the sub-channel generated by the device card with a built-in encryption algorithm using a general-purpose card reader, the general-purpose card reader for the sub-channel analysis of the card equipped with the encryption algorithm It is to measure the power signal for subchannel analysis and to generate the trigger signal by I / O data through the trigger generation module.

That is, since the analysis of the subchannel consumes a lot of power when the encryption algorithm is driven, power consumption of the device card on which the encryption algorithm is driven is required to measure the power consumption. Signal alignment is required.

Therefore, the following embodiment will be described in detail with reference to the accompanying drawings for the method of generating the power measurement and trigger signal for the sub-channel analysis.

1 is a block diagram illustrating the structure of a power supply measuring device and a trigger generating device for a general purpose card reader for subchannel analysis according to an embodiment of the present invention.

Referring to FIG. 1, a power measuring device and a trigger generating device for a general purpose card reader for subchannel analysis may include a host computer 100, a general purpose card reader 110, a card reader extension board 120, and a device card 130. And a trigger generator 140 and the like.

The host computer 100 performs card reading through the universal card reader 110 in conjunction with the universal card reader 110 and the trigger generator 140, and triggers a signal for more accurate subchannel signal analysis. The trigger data and the transmission rate information are transmitted to the trigger generator 140 for the generation of.

The universal card reader 110 is connected to the host computer 100 (eg, Universal Serial Bus (USB), Peripheral Component Interconnect (PCI), serial method, etc.), and attaches and detaches the device card 130 of various methods. As an interface capable of providing the interface, the device card 130 may be mounted through the card reader extension board 120 attached to the universal card reader 110. In addition, the card reader control command transmitted from the host computer 100 is transmitted to the card reader expansion board 120, the power measurement signal leaked from the device card 130 mounted on the card reader expansion board 120, Input / output (I / O) signals, clock signals (CLK), and reset signals (RST) are measured.

Accordingly, the power measurement signal is transmitted to the host computer 100 or an external display device to detect power consumption, and the measured I / O signal, CLK signal, and RST signal are transmitted to the trigger generator 140. In the following description, I / O signals, CLK signals, and RST signals will be collectively referred to as input / output signals.

The device card 130 is a device including an encryption algorithm, and performs an encryption algorithm. In this case, the device card 130 may leak a subchannel signal such as a power signal or an RF signal while performing an encryption operation in the device card 130. do.

The trigger generator 140 performs signal alignment by a certain trigger signal for accurate analysis of the subchannel signal. The trigger generator 140 receives and stores trigger data and data rate information transmitted from the host computer 100 and expands the card reader. The trigger generation logic is operated by receiving an input / output signal from the board 120.

2 is a block diagram showing the structure of a card reader expansion board according to an embodiment of the present invention.

Referring to FIG. 2, the card reader expansion board 120 is a board for detecting input / output signals, a power signal, and the like between the general-purpose card reader unit 110 and the device card 130, and includes a signal detection control unit 200, A power supply signal detector 202, a connection signal detector 204, a card contact device 206, and the like.

The card reader expansion board 120 is connected to the general purpose card reader 110 via a specific interface (eg, USB, PCI, raiser, etc.), and detects a card reader control command transmitted from the general purpose card reader 110. The control unit 200 receives.

The signal detection control unit 200 controls the power signal detection unit 202 and the connection signal detection unit 204 according to the received card reader control command, and the power signal detection unit 202 controls the device card attached to the card contact device 206. The power measurement signal may be detected from the 130, and the detected power measurement signal may be transferred to the host computer 100 or an external display device to measure the power consumption. Alternatively, the power signal detector 202 may detect a power measurement signal and measure power consumption through the power measurement signal. This may be configured to measure the power signal by placing a variable resistor at the power supply (VDD) and ground (GND) terminal as shown in FIG.

The connection signal detector 204 detects input / output signals (I / O signals, CLK signals, and RST signals) from the device card 130, and transmits the detected input / output signals to the trigger generator 140.

The card contact device 206 is connected to the power signal detection unit 202 and the connection signal detection unit 204, and provides an interface (eg, USB, PCI, etc.) to allow the device card 130 including the encryption algorithm to be attached and detached. to provide.

4 is a flowchart illustrating an operation procedure of a card reader expansion board according to an embodiment of the present invention.

Referring to FIG. 4, when the device card 130 including the encryption algorithm is attached to the card contact device 206 of the card reader expansion board 120 connected to the universal card reader 110 in step 400, In operation 402, the host computer 100 transmits a card read control command, so that the signal detection control unit 200 receives a card reader control command.

Meanwhile, since the device card 130 leaks a subchannel signal such as a power signal or an RF signal while performing an encryption operation using an encryption algorithm, the signal detection controller 200 controls the power signal detector 202 in step 404. The power supply signal is detected from the device card 130 to measure power consumption. In step 406, the connection signal detector 204 is controlled to output input / output signals (I / O signals, CLK signals, and RST signals) from the device card 130. Will be detected.

Thereafter, in step 408, the input / output signal detected by the connection signal detector 204 is transferred to the trigger generator 140 so that the logic for generating the trigger signal may operate.

5 is a block diagram illustrating a structure of a trigger generator according to an exemplary embodiment of the present invention.

Referring to FIG. 5, the trigger generator 140 may include an input / output interface 500, a trigger generation controller 502, a trigger data storage 504, a transfer rate storage 506, a trigger generation logic 508, and the like. It includes.

The input / output interface unit 500 is connected to the host computer 100 to perform data transmission and reception. The input / output interface unit 500 receives trigger data and transmission rate information from the host computer 100 and transmits the trigger data and transmission rate information to the trigger generation control unit 502.

The trigger generation control unit 502 transmits the received trigger data and the transfer rate information to the trigger data storage unit 504 and the transfer rate storage unit 506, respectively, so that they can be stored and connected in the card reader extension board 120. By receiving an input / output signal transmitted from the signal detector 204 and passing it to the trigger generation logic unit 508, it is finally controlled to generate a trigger signal through the trigger generation logic unit 508. The trigger generation logic unit 508 may be implemented as a central processing unit (CPU), a field programmable gate array (FPGA), a chipset, or the like.

Here, the trigger generation logic unit 508 generates a trigger signal by receiving an input / output signal, and performs signal alignment by a predetermined trigger signal for accurate analysis of subchannel information.

Referring to the trigger operation in the trigger generation control unit 502, the input and output signals transmitted in byte units from the card reader expansion board 120 are stored and compared with the byte values of the trigger data. If the comparison result is matched, the trigger data is shifted by byte, and the transmitted I / O signal is saved and compared with the byte value of the trigger data. If the comparison result is not the same, the stored I / O signal data is reset and the trigger byte data is initialized. Repetition is performed from the operation of receiving the transmitted I / O signal.

Therefore, when the order of the input / output signal data becomes the same as the trigger data and the data of the last byte, the trigger signal is generated and this operation is repeated.

6 is a flowchart illustrating an operation procedure of a trigger generator according to an exemplary embodiment of the present invention.

Referring to FIG. 6, in operation 600, the input / output interface unit 500 of the trigger generator 140 receives trigger data and transfer rate information from the host computer 100 and transmits the trigger data and the transfer rate information to the trigger generation controller 502. The controller 502 stores the received trigger data and the rate information in the trigger data storage 504 and the rate storage 506.

In operation 602, the trigger generation controller 502 sets a mode at a corresponding transmission rate based on the received transmission rate information, and waits for reception of an input / output signal. Thereafter, in step 604, the input / output signal is monitored, and in step 606, the input / output signal transmitted in byte units is received from the connection signal detector 204 in the card reader expansion board 120 according to the transmission rate and stored therein. .

Thereafter, in operation 608, if the comparison result matches the byte value of the trigger data stored in the trigger data storage unit and the trigger data storage unit, the comparison result is matched in step 610. In step 612, the trigger data is shifted byte by byte. If it is not the last byte data after checking whether it is data, the operation returns to step 606 and the above operation is repeated for the next byte data.

However, if the comparison result does not match in step 610, the process proceeds to step 616 to reset the stored input / output signal data, initializes the trigger byte data, and returns to step 606 to repeat the operation.

On the other hand, after the trigger data is byte-shifted in step 612, it is determined whether the last byte data in step 614, and if the last byte data, the process proceeds to step 618 to generate a trigger signal. Thereafter, in step 620, the number of repetitions is stored in order to repeat the trigger signal generation procedure. In step 622, it is determined whether the number of repetitions stored is equal to a preset number of repetition settings.

If the stored number of repetitions is smaller than the number of repetition settings, the process returns to step 606 to repeat the trigger signal generation procedure. If the stored number of repetitions is equal to the number of repetition settings, the trigger signal generation procedure is terminated.

As described above, the apparatus for measuring and triggering a power signal for subchannel analysis according to an embodiment of the present invention, and a method thereof, analyze a subchannel generated using a general purpose card reader with a device card having an encryption algorithm. In order to verify the sub-channel analysis of the card equipped with the encryption algorithm, the power signal measurement for the sub-channel analysis is performed by the general-purpose card reader, and the trigger signal is generated by the input / output signal data through the trigger generation module. Let's do it.

As described above, the present invention provides an apparatus capable of performing subchannel analysis on a device card including a cryptographic algorithm using a general purpose reader and simple logic without developing a separate card reader for subchannel analysis. In addition, by separating the trigger generation logic and the operation of the reader from the device card, it is possible to reduce the noise caused by the device card to obtain a more precise subchannel signal.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments, but is capable of various modifications within the scope of the invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined by the scope of the appended claims, and equivalents thereof.

1 is a block diagram showing the structure of a power supply measuring device and a trigger generating device for a general purpose card reader for subchannel analysis according to an embodiment of the present invention;

2 is a block diagram showing the structure of a card reader expansion board according to an embodiment of the present invention;

3 is a view illustrating a variable resistor configured in a power signal detection unit according to an embodiment of the present invention;

4 is a flowchart illustrating an operation procedure of a card reader expansion board according to an embodiment of the present invention;

5 is a block diagram showing the structure of a trigger generator according to an embodiment of the present invention;

6 is a flowchart illustrating an operation procedure of a trigger generator according to an exemplary embodiment of the present invention.

<Description of Signs of Major Parts of Drawings>

100: host computer # 110: universal card reader

120: card reader expansion board 130: device card

140: trigger generation unit 125: GTP-U

130: GGSN 200: signal detection control unit

202: power signal detector 204: connection signal detector

206: card contact device 500: input and output interface unit

502: trigger generation control unit 504: trigger data storage unit

 506: rate storage unit 508: trigger generation logic unit

Claims (10)

A card reader expansion board connected to a host computer and measuring an input / output signal of a device card performing a cryptographic operation by a cryptographic algorithm, A trigger generator which receives the input / output signal from the card reader extension board and generates a trigger signal based on the input / output signal Power signal measurement and trigger generator for subchannel analysis comprising a. The method of claim 1, The card reader expansion board, A power signal detector configured to detect a power signal from the device card to measure power consumption; An input / output signal detector for detecting an input / output signal from the device card and transferring the input / output signal to the trigger generator; A signal detection controller which receives a card reader control command from the host computer and controls the power signal detector and the input / output signal detector; A card contact device connected to the power signal detection unit and the input / output signal detection unit and providing a contact interface with the device card to attach the device card to Power signal measurement and trigger generation device for subchannel analysis comprising a. 3. The method of claim 2, The power signal detector, A power signal measuring and triggering device for subchannel analysis, comprising measuring a power signal by placing a variable resistor at a power supply (VDD) and a ground (GND) terminal. The method of claim 1, The trigger generation unit, An input / output interface interworking with the host computer to receive trigger data and rate information; A trigger generation control unit for storing the trigger data and the rate information, and generating a trigger signal if the comparison result of the input / output signal and the trigger data is matched. Power signal measurement and trigger generation device for subchannel analysis comprising a. The method of claim 4, wherein The trigger generation control unit, If the input / output signal transmitted in byte units and the byte value of the trigger data do not match according to the transmission rate, the input / output signal data is reset, the trigger data is initialized, and the input / output signal is received again and compared. and, If the comparison result is matched, the operation of byte shifting the trigger data is repeated to generate the trigger signal when the data order of the input / output signal is the same as the trigger data and the last byte data. Signal measuring and triggering device for use. Measuring an input / output signal of a device card performing a cryptographic operation with a cryptographic algorithm in a card reader expansion board connected to a host computer; A process of generating a trigger signal based on the input / output signal received from a trigger generator Power signal measurement and trigger generation method for subchannel analysis comprising a. The method of claim 6, The process of measuring the input and output signals, Measuring power consumption by detecting a power signal from the device card interfaced on the card reader expansion board according to a card reader control command from the host computer; Detecting an input / output signal from the device card; Transferring the detected input / output signal to the trigger generator Power signal measurement and trigger generation method for the sub-channel analysis comprising a. The method of claim 7, wherein The process of measuring the power consumption by detecting the power signal, A method of measuring and triggering a power signal for subchannel analysis, comprising measuring a power signal by placing a variable resistor at a power supply (VDD) and a ground (GND) terminal. The method of claim 6, The process of generating the trigger signal, Receiving the trigger data and the rate information through an input / output interface interworking with the host computer; Storing the trigger data and the rate information, and generating a trigger signal if the comparison result matches the input / output signal and the trigger data. Power signal measurement and trigger generation method for the sub-channel analysis comprising a. The method of claim 9, The process of generating the trigger signal, If the input / output signal transmitted in byte units and the byte value of the trigger data do not match according to the transmission rate, the input / output signal data is reset, the trigger data is initialized, and the input / output signal is received again and compared. Process, Repeating the operation of byte shifting the trigger data when the comparison result is matched, and generating the trigger signal when the data order of the input / output signal is the same as the trigger data and the data of the last byte. Power signal measurement and trigger generation method for the sub-channel analysis comprising a.

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