KR100850778B1 - Nitride semiconductor device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nitride semiconductor device, and in particular, an n-type cladding layer formed on a substrate, an n-type cladding layer formed on the substrate, and a predetermined region on the n-type cladding layer, and an n-type grading doping layer and an n-type delta doping layer. The current diffusion layer formed by sequentially stacking the active layer formed on the current diffusion layer, the p-type cladding layer formed on the active layer, the p-type electrode formed on the p-type cladding layer, and the n where the current spreading layer is not formed. A nitride semiconductor device comprising an n-type electrode formed on a type clad layer.

Nitride, Grade Doping, Delta Doping, Electrostatic Discharge (ESD), Current Spread

Description

Nitride Semiconductor Devices {NITRIDE SEMICONDUCTOR DEVICE}

1 is a cross-sectional view showing the structure of a nitride semiconductor device (LED) according to the prior art.

2 is a cross-sectional view showing the structure of a nitride semiconductor device (LED) according to an embodiment of the present invention.

3 is a partial cross-sectional view showing a current diffusion layer of the nitride semiconductor element shown in FIG.

4 is a graph schematically showing an example of a doping profile of the current spreading layer shown in FIG.

FIG. 5 is a flow diagram of source gas shown to explain a method of manufacturing the current spreading layer shown in FIG. 3. FIG.

<Explanation of symbols for the main parts of the drawings>

100 substrate 110 buffer layer

120: n-type cladding layer 130: active layer

140: p-type cladding layer 150: transparent conductor layer

160: p-type electrode 170: n-type electrode

200: current diffusion layer 210: n-type grading doping layer

220: n-type delta doping layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device such as a light emitting diode (LED), a laser diode (LD), a light emitting device such as a solar cell, an optical sensor, or a nitride semiconductor device used for electronic devices such as transistors and power devices.

Recently, III-V nitride semiconductors such as GaN have been spotlighted as core materials of light emitting devices such as light emitting diodes (LEDs) or laser diodes (LDs) due to their excellent physical and chemical properties. LEDs or LDs using III-V nitride semiconductor materials are widely used in light emitting devices for obtaining light in the blue or green wavelength band, and these light emitting devices are applied to light sources of various products such as electronic displays and lighting devices. The III-V nitride semiconductor is generally made of a GaN-based material having a composition formula of In _X Al _Y Ga _{1 -X- Y} N (0≤X, 0≤Y, X + Y≤1).

Next, a conventional nitride semiconductor device (LED) using a III-V nitride semiconductor as described above will be described in detail with reference to FIG. 1.

1 is a cross-sectional view schematically showing a structure of a nitride semiconductor device (LED) according to the prior art.

As shown in FIG. 1, an LED device using a nitride semiconductor according to the related art includes a buffer layer 110 made of GaN, an n-type cladding layer 120, and a single quantum well on a sapphire substrate 100 that is a light transmissive substrate. An active layer 130 and a p-type cladding layer 140 of a multi-quantum well (MQW) structure containing InGaN or InGaN having an (SQW) structure are sequentially stacked.

In addition, since some regions of the p-type cladding layer 140 and the active layer 130 are removed by some mesa etching process, some top surfaces of the n-type cladding layer 120 are exposed. In addition, an n-type electrode 170 is formed on the exposed n-type cladding layer 120, and on the p-type cladding layer 160, the transparent conductor layer 150 and the p-type electrode 160 made of ITO or the like. It is formed in this stacked structure.

As described above, the nitride semiconductor device (LED) may adopt a double heterostructure having an active layer 130 having a single quantum well structure or a multi quantum well structure having a well layer made of InGaN.

In particular, in the nitride semiconductor device (LED), the multi-quantum well structure has a large number of mini bands, has high efficiency, and can emit light even at a small current, so that the light emission output is higher than that of the single quantum well structure. Improvement is expected. This discloses an active layer having a multi-quantum well structure consisting of a barrier layer of undoped GaN and a well layer of undoped InGaN in order to improve luminous efficiency and luminous intensity in Japanese Patent Laid-Open No. 10-135514. In addition, a nitride semiconductor device including a cladding layer having a band gap larger than that of the barrier layer of the active layer is disclosed.

However, when the active layer has a multi-quantum well structure, high luminous efficiency and luminous intensity can be obtained, but there is a limit in luminous efficiency and luminous intensity, i.e., light output, for using a nitride semiconductor element as a light source for illumination or an outdoor display. have. In addition, when the active layer has a multi-quantum well structure, the thickness of the entire active layer is higher than that of the single quantum well structure, so that the series resistance in the longitudinal direction is high, and in particular, the operating voltage (V _f ) in the case of an LED element. There is a problem of getting higher.

In addition, since the light emitting device using the nitride semiconductor is generally poor in resistance to electrostatic discharge (ESD), it is necessary to improve the electrostatic discharge characteristics. In particular, the nitride semiconductor LED device or LD device has a problem that can be damaged by the static electricity easily generated in people or things in the process of handling or using the same.

Accordingly, in order to suppress damage of the nitride semiconductor device due to ESD, various studies have recently been conducted. For example, US Pat. No. 6,593,597 discloses a technique for protecting an LED device from ESD by integrating the LED device and the Schottky diode on the same substrate and connecting the LED device and the Schottky diode in parallel. In addition, in order to improve ESD resistance, a method of connecting an LED device in parallel with a Zener diode has been proposed.

However, these methods have the problem of purchasing and assembling a separate zener diode or forming a Schottky junction, thereby increasing the overall manufacturing cost of the device.

Accordingly, an object of the present invention is to provide a nitride semiconductor device that secures high output characteristics by improving the current dispersion effect in order to solve the above problems.

In addition, an object of the present invention is to provide a nitride semiconductor device that can implement a high ESD resistance without having to provide a separate device for improving the ESD resistance.

In order to achieve the above object, the present invention is formed in a substrate, an n-type cladding layer formed on the substrate, a predetermined region on the n-type cladding layer, the n-type grading doping layer and n-type delta doping layer The n-type current diffusion layer, which is sequentially stacked, an active layer formed on the current diffusion layer, a p-type cladding layer formed on the active layer, a p-type electrode formed on the p-type cladding layer, and the current diffusion layer is not formed. Provided is a nitride semiconductor device including an n-type electrode formed on a clad layer.

In addition, in the nitride semiconductor device of the present invention, the n-type grading doping layer, In _X Al _Y Ga _{1 -X- Y} N (0≤X, 0≤Y, X + Y≤1) composition, It is preferable that the nitride semiconductor layer is formed of two or more layers in which the doping concentration of the n-type conductive impurities is sequentially reduced from the top surface of the n-type cladding layer to the bottom surface of the delta doping layer.

In the nitride semiconductor device of the present invention, it is preferable that the n-type grading doped layer has at least one or more layers further doped with acenic ions.

In addition, in the nitride semiconductor device of the present invention, the n-type delta doping layer, In _X Al _Y Ga _1-XY N (0≤X, 0≤Y, X + Y≤1) composition, which is the The doping concentration is preferably higher than that of the layer doped at the highest concentration of the n-type grading doped layer.

Further, in the nitride semiconductor device of the present invention, the n-type delta doped layer includes two or more layers of nitrides in which a doping concentration of n-type conductive impurities is sequentially reduced from an upper surface of the n-type grading doping layer to a lower surface of the active layer. It is preferable that it consists of a semiconductor layer.

In addition, in the nitride semiconductor device of the present invention, it is preferable to further include a buffer layer formed between the substrate and the n-type cladding layer, further comprising a transparent conductor layer formed between the p-type cladding layer and the p-type electrode. .

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like reference numerals designate like parts throughout the specification.

Now, a nitride semiconductor device according to an embodiment of the present invention will be described in detail with reference to FIGS. 2 to 4.

2 is a cross-sectional view showing a structure of a nitride semiconductor device (LED) according to an embodiment of the present invention, FIG. 3 is a partial cross-sectional view showing a current diffusion layer of the nitride semiconductor device shown in FIG. 2, and FIG. 4 is shown in FIG. 3. A graph schematically showing an example of the doping profile of the current spreading layer shown.

First, as shown in FIG. 2, a light transmissive substrate 100, a buffer layer 110, an n-type cladding layer 120, a current diffusion layer 200, an active layer 130, and the like on the substrate 100. The p-type cladding layer 140 includes a light emitting structure formed by sequentially stacking.

The substrate 100 is a substrate suitable for growing a nitride semiconductor single crystal, and is preferably formed using a transparent material including sapphire. In addition to sapphire, it may be formed of zinc oxide (ZnO), gallium nitride (GaN), silicon carbide (SiC), aluminum nitride (AlN), or the like.

The buffer layer 110 is a layer for improving lattice matching with the substrate 100 before growing the n-type nitride semiconductor layer 120, and generally includes a nitride including GaN or Ga, for example, SiC / It is formed of InGaN. This is a layer for improving lattice matching with the substrate 100 and is not necessarily a layer, and thus may be omitted according to the characteristics and process conditions of the device.

The n-type cladding layer 120, the current diffusion layer 200, the active layer 130, and the p-type cladding layer 140 may have an In _X Al _Y Ga _{1 -X - Y} N composition formula (where 0 ≦ _X and 0 ≦ Y, X + Y ≤ 1).

More specifically, the n-type cladding layer 120 and the current diffusion layer 200 may be formed of a GaN layer or a GaN / AlGaN layer doped with n-type conductive impurities, for example, n-type conductive impurities, Si, Ge, Sn, etc. are used, Preferably Si is mainly used. In addition, the p-type cladding layer 140 may be formed of a GaN layer or a GaN / AlGaN layer doped with a p-type conductive impurity. For example, Mg, Zn, Be, or the like may be used as the p-type conductive impurity. Preferably, Mg is mainly used. The active layer 130 may be formed of an InGaN / GaN layer having a multi-quantum well structure.

In particular, the current diffusion layer 200 according to the present invention, as shown in Figure 3, the n-type grading doping layer 210 and the n-type delta doping layer 220 on the n-type cladding layer 120 It is formed in the structure laminated one by one. This is to increase the cladding effect and the current diffusion effect of the n-type cladding layer 120, and to enhance the resistance of the electrostatic discharge (ESD) characteristics.

The current diffusion layer 200 will be described in more detail with reference to FIG. 4. The n-type grading doping layer 210 is formed from an upper surface of the n-type cladding layer 120 to a lower surface of the delta doping layer 220. The nitride semiconductor layer may be formed of two or more layers in which the doping concentration of the n-type conductive impurity is sequentially decreased, and more preferably, at least one or more layers doped with an asceic (As) ion may be formed. This is to improve the horizontal diffusion effect of the current by making the energy band profile of the n-type grading doped layer 210 have an uneven shape.

The n-type delta doped layer 220 may be formed to have a higher doping concentration than that of the doped layer at the highest concentration of the n-type grading doped layer 210.

In addition, the n-type delta doping layer 220 also has two or more nitride semiconductors in which the doping concentration of n-type conductive impurities is sequentially decreased from the top surface of the n-type grading doping layer 210 to the bottom surface of the active layer 130. It may consist of layers.

In addition, the nitride semiconductor device according to the present invention includes a plurality of mesas formed by etching the p-type cladding layer 140 and the active layer 130 to expose a portion of the upper surface of the n-type cladding layer 120, and the plurality of mesas. The n-type electrode 170 formed on the exposed n-type cladding layer 120 on the mesa, and the transparent conductor layer 150 and the transparent conductor layer formed on the p-type cladding layer 140 to diffuse current. A p-type electrode 160 that serves as a reflective metal and a bonding metal on 150 is included.

In the light emitting structure of the present embodiment, the transparent conductor layer 150 is a layer for improving the current diffusion effect by increasing the current injection area, Indium Tin Oxide (ITO), Tin Oxide (TO), Indium Zinc (IZO) Oxide), ITZO (Indium Tin Zinc Oxide) and TCO (Transparent Conductive Oxide) is preferably made of any one film selected from the group, it can be omitted if the current flows smoothly.

Next, a method of manufacturing the current spreading layer according to the present embodiment will be described with reference to FIGS. 5 and 3 and 4 described above.

FIG. 5 is a flow diagram of source gas shown to explain a method of manufacturing the current spreading layer shown in FIG. 3.

First, an n-type conductive impurity (using Si in the present embodiment) is supplied into the reactor, but the amount of n-type conductive impurity gradually supplied is reduced to decrease the delta from the top surface of the n-type cladding layer 120. An n-type grading doping layer 210 including two or more nitride semiconductor layers in which the doping concentration of the n-type conductive impurity is sequentially reduced to the bottom surface of the doping layer 220 is formed.

Then, the supply of n-type conductive dopants for growing the n-type grading doped layer 210 is stopped for several seconds, and then the highest concentration of the n-type grading doped layer 210 is greater than the doping concentration of the doped layer. A high concentration of n-type conductive impurity is supplied into the reactor for several seconds to form the n-type delta doping layer 220. In this case, the n-type delta doping layer 210, by reducing the amount of n-type conductive impurities supplied to the inside of the reactor for a few seconds, as in the process of forming the n-type grading doping layer 210, the n-type grading doping layer From the upper surface of 210 to the lower surface of the active layer 130 can be formed of two or more nitride semiconductor layers in which the doping concentration of the n-type conductivity-type impurities sequentially decreases.

Meanwhile, in FIG. 5, after the supply of the n-type conductive dopant for forming the n-type grading doping layer 210 is completely stopped in the reactor, the n-type conductive type for forming the n-type delta doping layer 220 is stopped. Although impurities are supplied, the present invention is not limited thereto, and while the n-type conductive impurities forming the n-type grading doping layer 210 are continuously supplied, more n-type conductive impurities are instantaneously supplied to the n-type grading. The n-type delta doped layer 220 doped at a concentration higher than the doping concentration of the doped layer at the highest concentration of the doped layer 210 may be formed.

In the current diffusion layer 200 according to the embodiment of the present invention manufactured as described above, since the n-type grading doping layer 210 and the n-type delta doping layer 220 have radically different doping concentrations, the n-type grading is performed. Due to the discontinuity of the doping concentration whose concentration is rapidly changed at the interface between the doping layer 210 and the n-type delta doping layer 220, a two-dimensional electron gas layer (not shown) is formed at the interface.

In accordance therewith, the present invention is the voltage applied when the tunnel phenomenon in n ⁺ -p ⁺ junction occurs through the current diffusion layer 200 to improve the cladding (cladding) the effect of the n-type cladding layer 120, a high carrier mobility It is possible to improve the current diffusion effect by securing the degree. As such, when the current diffusion effect is improved through the current diffusion layer 200, the operating voltage V _f is lowered and the light emission efficiency is also improved due to the increase in the emission area. Can be implemented.

In addition, since the n-type delta doping layer 220 is interposed between the n-type grading doping layer 210 and the active layer 130 having a lower doping concentration than this, and has a relatively high dielectric constant, it may serve as a kind of capacitor. It becomes possible. Accordingly, the current spreading layer 200 can protect the nitride semiconductor device from sudden surge voltage or electrostatic phenomena, thereby improving the ESD resistance of the device.

Although the preferred embodiments of the present invention have been described in detail above, those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Accordingly, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concept of the present invention as defined in the following claims also fall within the scope of the present invention.

As described above, the present invention has a cladding effect of the n-type cladding layer having a current diffusion layer formed of a structure in which an n-type grading doping layer and an n-type delta doping layer are sequentially stacked between the n-type cladding layer and the active layer. Current diffusion effect can be improved.

As described above, the present invention reduces the operating voltage (V _f ) due to the improvement of the current diffusion effect to improve the luminous efficiency, thereby realizing a nitride semiconductor device that can obtain a high light output.

In addition, according to the present invention, the n-type delta doped layer may serve as a kind of capacitor, thereby providing a highly reliable nitride semiconductor device by improving ESD resistance without having to provide a separate device for improving ESD resistance.

Claims (9)

Board; An n-type cladding layer formed on the substrate; A current diffusion layer formed in a predetermined region on the n-type cladding layer and formed by sequentially stacking an n-type grading doping layer and an n-type delta doping layer; An active layer formed on the current spreading layer; A p-type cladding layer formed on the active layer; A p-type electrode formed on the p-type cladding layer; And And an n-type electrode formed on the n-type cladding layer in which the current spreading layer is not formed. The method of claim 1, The n-type grading doped layer is a nitride semiconductor device, characterized in that consisting of the composition In _X Al _Y Ga _{1 -X- Y} N (0≤X, 0≤Y, X + Y≤1). The method according to claim 1 or 2, The n-type grading doped layer is formed of a nitride semiconductor layer comprising two or more nitride semiconductor layers in which the doping concentration of n-type conductive impurities is sequentially reduced from an upper surface of the n-type cladding layer to a lower surface of the delta doping layer. device. The method of claim 3, The n-type grading doped layer, nitride semiconductor device, characterized in that it has at least one layer further doped with the ions. The method of claim 1, The n-type delta doped layer is a nitride semiconductor device, characterized in that composed of In _X Al _Y Ga _{1 -X- Y} N (0≤X, 0≤Y, X + Y≤1) composition. The method according to claim 1 or 5, The n-type delta doped layer is a nitride semiconductor device, characterized in that the doping concentration is formed higher than the doping concentration of the layer doped to the highest concentration of the n-type grading doping layer. The method of claim 6, The n-type delta doped layer is formed of a nitride semiconductor device comprising at least two nitride semiconductor layers in which the doping concentration of n-type conductive impurities is sequentially reduced from the top surface of the n-type grading doping layer to the bottom surface of the active layer. . The method of claim 1, The nitride semiconductor device further comprises a buffer layer formed between the substrate and the n-type cladding layer. The method of claim 1, And a transparent conductor layer formed between the p-type cladding layer and the p-type electrode.

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