KR100816338B1 - Liquid crystal display - Google Patents

Abstract

In the liquid crystal display according to the present invention, red, green, and blue pixels are sequentially arranged in the row direction, red and green pixels are alternately arranged in the column direction, and the blue and green pixels are adjacent to the red and green pixels. The columns are arranged one by one for two pixel rows, and the blue pixels are arranged at the centers of four pixels of neighboring red and green. In this case, gate lines are formed in the horizontal direction to transfer the scan signal or the gate signal to the pixels, and in the vertical direction, the gate lines are insulated from and cross the gate lines to transfer the data signals. The data line is formed. Each pixel is formed with a thin film transistor including a pixel electrode and a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode. Here, data lines of red or green pixel columns that are adjacent to each other in a predetermined unit cross each other to transmit an image signal, and data lines that transmit image signals to two blue pixel columns are connected to each other.

Pixels, dots, pentiles, pads,

Description

Liquid crystal display {a thin film transistor array for a liquid crystal display}

1 is a layout view illustrating a pixel array structure of a liquid crystal display according to a first exemplary embodiment of the present invention.

2 and 3 are cross-sectional views of thin film transistor substrates for liquid crystal display devices taken along lines II-II 'and III-III' of FIG. 1;

4 is a layout view illustrating a structure of a thin film transistor array substrate for a liquid crystal display according to a second exemplary embodiment of the present invention.

FIG. 5 is a cross-sectional view taken along the line VV ′ of FIG. 4;

6 is a layout view illustrating a pixel array structure of a liquid crystal display according to a third exemplary embodiment of the present invention.

FIG. 7 is a cross-sectional view of the TFT substrate for the liquid crystal display device taken along the line VII-VII ′ in FIG. 6.

8 to 10 are diagrams illustrating a connection structure of wirings in the inversion driving method of the liquid crystal display according to the fourth to sixth embodiments of the present invention.

11 and 12 illustrate a column inversion driving and a two dot inversion driving in the driving method of the liquid crystal display according to the fifth embodiment of the present invention.

13 to 15 illustrate structures and dot inversion driving of the liquid crystal display according to the seventh to ninth embodiments of the present invention.

16 and 17 are plan views illustrating data line cross connection portions in the liquid crystal display according to the fourth to ninth embodiments of the present invention.

FIG. 18 is a plan view illustrating a data line connection unit and a data line cross connection unit in the thin film transistor substrate for liquid crystal display according to the fourth to ninth embodiments.

The present invention relates to a liquid crystal display device.

In general, a liquid crystal display device injects a liquid crystal material between two substrates having an electrode generating an electric field, and applies an electric potential different from each other to form an electric field to change the arrangement of liquid crystal molecules, thereby transmitting light. It is a device that expresses the image by adjusting.

Such a liquid crystal display has a display operation and includes a plurality of pixels in which pixel electrodes and color filters of red, green, and blue are formed, and the pixels are driven by signals applied through wirings. The wiring includes a scan signal line or a gate line for transmitting a scan signal, an image signal line or a data line for transferring an image signal, and each pixel includes a thin film transistor connected to one gate line and one data line. The image signal transmitted to the pixel electrode formed in the is controlled.                         

At this time, there is a method of arranging various color filters of red (R), green (G), and blue (B) in each pixel, and a stripe type in which color filters of the same color are arranged in pixel columns as a unit. , Mosaic type that sequentially arranges the red (R), green (G), and blue (B) color filters in the column and row directions, and arranges the unit pixels in the column direction in a zigzag form and ), Green (G), and blue (B) color delta (sequence) arranged sequentially. In the case of the delta type, three unit pixels including red (R), green (G), and blue (B) colors are represented as round or diagonal lines on the screen display when the image is displayed as one dot. It has the ability to express well.

In addition, "ClairVoyante Laboratories" has proposed a pixel array structure called "The PenTile Matrix ™ color pixel arrangement" which can minimize the design cost and at the same time have a higher resolution and more favorable display capacity. In the pixel array structure of the PenTile matrix, the blue unit pixels are shared together when displaying two dots, and the blue unit pixels adjacent to each other are separated by one data driving integrated circuit. And are driven by different gate drive integrated circuits. Using the pentile matrix pixel structure, the UXGA-class resolution can be realized using an SVGA-class display device, and the number of low-cost gate driver integrated circuits is increased, but the number of relatively expensive data driver integrated circuits can be reduced. Therefore, the design cost of the display device can be minimized.

However, in the liquid crystal display having the pixel array of the pentile matrix, the blue unit pixels are arranged in a rhombus shape, and correspondingly, the signal lines for transmitting the data signals are also curved to transmit the signal to the blue unit pixels. As the length of only the data signal line is increased, the delay occurs only in the data signal transmitted to the blue unit pixel, resulting in uneven display characteristics. There is a limitation in applying a pixel array of a pentile matrix to a large liquid crystal display device. In addition, red or green pixels are disposed on both sides of one blue pixel in two pixel columns, and blue pixels are different in size from red or green pixels to form a storage capacitor, which is required in a liquid crystal display. Has very difficult drawbacks. In addition, since the data signal line or the two gate signal lines that transmit the data signals to the red or green pixels are formed adjacent to each other, short-circuit of the wiring is easily generated, resulting in reduced process yield, and indirect display between adjacent data signal lines. Can be degraded. In addition, since adjacent blue pixels are driven by one driving integrated circuit, data driving integrated circuits must be disposed on both sides of the display area where an image is displayed, thereby increasing the size of the display device and repairing disconnection or short circuit in the wiring. It is difficult to form a repair line for the periphery of the display area. In addition, in order to prevent deterioration of the liquid crystal, inversion driving should be performed. Irregular polarities are generated for the red, green, and blue pixels, thereby causing flicker and a luminance difference between the columns of pixels. The problem of deterioration of image quality occurs.

An object of the present invention is to provide a liquid crystal display device having excellent display capability and capable of preventing short circuits between signal lines of neighboring pixels.

In addition, another technical problem of the present invention is to provide a liquid crystal display device having excellent display capability and capable of stably securing a storage capacitance.

In addition, another technical problem of the present invention is to provide a liquid crystal display device having excellent display capability and minimizing the size of a substrate and easily taking a repair line for repairing a short circuit or disconnection of a wiring.

In addition, another technical problem of the present invention is to manufacture a liquid crystal display device capable of performing inversion driving of regularity.

In the liquid crystal display according to the present invention, a data pad connection part for electrically connecting data lines of adjacent blue pixel columns with one pad is formed, or gate lines or data lines adjacent to each other are disposed to be spaced apart from each other. In addition, in the pentile matrix pixel array structure in which red, blue, and green pixels are sequentially arranged in the column direction, an image signal is transmitted by connecting data lines of the first or second neighboring blue pixel columns to one pad. The data lines of the red and green pixel columns that are adjacent to each other cross each other and are connected to the pads to transfer image signals.

More specifically, in the thin film transistor array substrate for a liquid crystal display device according to the present invention, red, green, and blue pixels are sequentially arranged in the row direction, and red and green pixels are alternately arranged in the column direction. The blue pixels are arranged one by one for two rows of pixels between neighboring red and green pixel columns, and the blue pixels are arranged at the centers of four pixels of neighboring red and green. In this case, gate lines are formed in the horizontal direction to transfer the scan signal or the gate signal to the pixels, and in the vertical direction, the gate lines are insulated from and cross the gate lines to transfer the data signals. The data line is formed. Each pixel is formed with a thin film transistor including a pixel electrode and a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode. Here, data lines of red or green pixel columns that are adjacent to each other in a predetermined unit cross each other to transmit an image signal, and data lines that transmit image signals to two blue pixel columns are connected to each other.

The predetermined unit is a nine pixel column, and the data line of the n + 4th blue pixel column is electrically connected to the data line of the n + 1th blue pixel column to transfer an image signal, and the data line of the n + 7th blue pixel column is n +. The image line may be electrically connected to the data line of the tenth blue pixel column to transfer the image signal, and the data line of the n + 5th green pixel column and the data line of the n + 6th red pixel column may cross each other to transmit the image signal.

In addition, the data line of the n + 10th blue pixel column is electrically connected to the data line of the n + 1th blue pixel column to transmit an image signal, and the data line of the n + 7th blue pixel column is the data line of the n + 4th blue pixel column. The image line may be electrically connected to and transmit an image signal, and the data line of the n + 8th green pixel column and the data line of the n + 9th red pixel column may cross each other to transmit the image signal.

Further, the data line of the n + 7th blue pixel column is electrically connected to the data line of the n + 1th blue pixel column to transmit an image signal, and the data line of the n + 10th blue pixel column is the data line of the n + 4th blue pixel column. The image line may be electrically connected to and transmit an image signal, and the data line of the n + 8th green pixel column and the data line of the n + 9th red pixel column may cross each other to transmit the image signal.

In this case, the liquid crystal display may apply column inversion in the column direction or two dot inversion in the row direction.

In the blue pixel, subpixel electrodes are formed with respect to the pixel rows, and the two subpixel electrodes are connected through the pixel electrode connectors, and the pixel electrode connectors are alternately arranged in the pixel columns of the two rows.

Here, the pixel electrode connection portion may overlap the gate line that transfers the scan or gate signal to the front end or its pixel row.

In addition, some of the data lines may have cross wirings that cross and transfer image signals transmitted to the data lines of the red or green pixel columns through the data pads. The cross wirings may be formed in the same layer as the gate lines, and may include the first cross wiring lines, The second crossing wiring line is formed of the same layer as the data line and is insulated from the first crossing wiring line, and is formed of the same layer as the pixel electrode and is connected to the first or second crossing wiring line and the data line, respectively. And a third crossing wire connecting the data pad of the n + 1 th data line to the n + 1 th data line and the n th data line.

The data line having no cross wiring may have a connection wiring, and the connection wiring is formed of the same layer as the first connection wiring and the pixel electrode formed of the same layer as the gate line, and the first connection wiring and the data line. It is preferable to include a second connection wiring for electrically connecting the.

Here, the pixel electrode may be made of a transparent conductive material or a conductive material having reflectivity.

Next, embodiments of the liquid crystal display according to the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

FIG. 1 is a layout view illustrating a pixel structure of a liquid crystal display according to a first exemplary embodiment of the present invention, and FIGS. 2 and 3 are cut along the lines II-II 'and III-III' of FIG. 1, respectively. A cross-sectional view of a thin film transistor array substrate. 2 is a cross-sectional view illustrating in detail a pixel portion and a pad portion, and FIG. 3 is a connection portion C for connecting a data line for transmitting a data signal to two neighboring blue pixels B1 and B2 with one pad. Is a cross-sectional view showing in detail.

As shown in FIG. 1, in the liquid crystal display according to the first embodiment of the present invention, pixels for red, blue, and green color filters arranged in the form of a matrix (R, B1, G, R, B2, G, ... ) Are formed. At this time, the red, blue, and green pixels (... R, B1, G, R, B2, G, ...) are sequentially arranged in the row direction, and in the column direction, red, green, Blue pixels (... R, B1, G, R, B2, G, ...) are arranged. At this time, as shown in Figure 1, in the horizontal direction, a gate line (or scan signal line 22) for transmitting a scan signal or a gate signal is formed one for each pixel row in the pixel row direction, and in the vertical direction Transmits a data signal and the data line 62 defining the unit pixel by crossing the gate line 22 is insulated from the gate line 22 so that the pixels R, B1, G, R, B2, G, ... It is formed against heat. Here, the gate electrode 26 connected to the gate line 22 and the source electrode 65 and the gate electrode connected to the data line 62 are formed at a portion where the gate line 22 and the data line 62 cross each other. A thin film transistor including a drain electrode 66 and a semiconductor layer 40 formed opposite to the source electrode 65 is formed with respect to the 26, and each pixel includes a gate line 22 through a thin film transistor. ) And a pixel electrode 82 electrically connected to the data line 62. In this case, the pixel electrodes 82 formed in the two adjacent blue pixels B1 and B2 are connected to each other through the first and second pixel electrode connection portions 851 and 852 that are alternately formed with respect to the pixel rows. In the blue pixels B1 and B2 having the pixel electrode 82, thin film transistors are alternately arranged one by one with respect to two pixel rows.

Next, a structure of the thin film transistor substrate for a liquid crystal display according to the first embodiment of the present invention having the pixel array structure will be described in detail with reference to FIGS. 1 to 3.

First, as shown in FIGS. 1 to 3, a thin film transistor array substrate for a liquid crystal display device according to a first embodiment of the present invention may include aluminum (Al), an aluminum alloy (Al alloy), A gate wiring including a metal or a conductor such as molybdenum (Mo), chromium (Cr), tantalum (Ta) or silver or silver alloy (Au Alloy) is formed. The gate wiring is a gate connecting the scan signal lines or gate lines 22 and 28 extending in the horizontal direction, the gate electrode 26 of the thin film transistor that is part of the gate line 22, and the dual gate lines 22 and 28. It is connected to the end of the line connecting portion 27 and the gate line 22 includes a gate pad 24 for receiving a scan signal from the outside to transfer to the gate line 22. The gate wirings 22, 26, 27, and 28 overlap with the pixel electrodes 82 of neighboring pixel rows, which will be described later, to form a storage capacitor having a storage capacitor for improving the charge storage capability of the pixel. In this case, when the storage capacitor is not sufficient, the storage capacitor wiring may be separately formed on the same layer as the gate wirings 22, 26, 27, and 28 and overlap the pixel electrode 82 to be described later. On the other hand, blue (B) pixels adjacent to each other in order to transmit a data signal in common to the pixel electrodes 82 of the blue pixels B1 and B2 columns adjacent to each other on the same layer as the gate wirings 22, 26, 27, and 28. First data pad connection portions 21 for connecting the data lines 62 in the column to one data pad 68 are formed in the C portion outside the display area D with respect to the blue pixel column. Here, the display area D refers to an area in which an image is displayed and is composed of a set of red, blue, and green pixels (R, B1, G, R, B2, G, ...).

The gate wirings 22, 26, 27, and 28 may be formed in a single layer, but may also be formed in a double layer or a triple layer. In the case of forming more than two layers, it is preferable that one layer is made of a material having low resistance and the other layer is made of a material having good contact properties with other materials, and is made of a double layer of Cr / Al (or Al alloy) or Al / Mo. Bilayers are an example.

A gate insulating layer 30 made of silicon nitride (SiN _x ) is formed on the gate wirings 22, 26, 27, 28, and the data pad connection portion 21 to form the gate wirings 22, 26, 27, 28, and data pads. The connecting portion 21 is covered.

A semiconductor layer 40 made of a semiconductor such as hydrogenated amorphous silicon is formed on the gate insulating layer 30, and the semiconductor layer 40 is heavily doped with n-type impurities such as phosphorus (P) on the semiconductor layer 40. An ohmic contact layer or intermediate layers 55 and 56 made of amorphous silicon are formed.

On the contact layers 55 and 56, data wirings including conductive materials such as Al or Al alloys, Mo or MoW alloys, Cr, Ta, Cu or Cu alloys are formed. The data line is connected to one end of the data line 62 formed in the vertical direction, the source electrode 65 of the thin film transistor connected to the data line 62 and the data line 62 to apply an image signal from the outside. A data line portion made up of a receiving data pad 68, and is separated from the data line portions 62, 65, and 68, and the source electrode 65 with respect to the gate electrode 26 or the semiconductor layer 40 of the thin film transistor. A drain electrode 66 of the thin film transistor positioned on the opposite side. In this case, the data lines 62 of the adjacent blue pixel columns B1 and B2 have second data pad connectors 61 protruding wider than other portions at the ends thereof, and the first data pad connectors 21 ) Is disposed adjacent to the second data pad connector 61.

The data lines 62, 65, 66, 68 and the second data pad connection portion 61 may also be formed in a single layer like the gate lines 22, 26, 27, and 28, but may also be formed in a double layer or a triple layer. have. Of course, when forming more than two layers, it is preferable that one layer is made of a material having a low resistance and the other layer is made of a material having good contact properties with other materials.

The contact layers 55 and 56 lower the contact resistance between the semiconductor layer 40 below and the source electrode 65 and the drain electrode 66 above.

The passivation layer 70 is formed on the data lines 62, 65, 66, and 68 and the semiconductor layer 40 not covered by the data line, and the passivation layer 70 forms the drain electrode 66 and the data pad 68, respectively. It has exposed contact holes 76 and 78 and has a contact hole 74 which exposes the gate pad 24 together with the gate insulating film 30. The passivation layer 70 may be made of an organic insulating material such as silicon nitride or acrylic. In addition, the passivation layer 70 has a contact hole 71 exposing the second data pad connection portion 61 and a contact hole 72 exposing the first data pad connection portion 21 together with the gate insulating film 30.

A pixel electrode 82 is formed on the passivation layer 70 to receive an image signal from the thin film transistor and generate an electric field together with the common electrode of the upper plate. The pixel electrode 82 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), and the drain electrode 66 of the thin film transistor formed in the adjacent pixel row through the contact hole 76. ) Is connected physically and electrically to receive an image signal. The pixel electrode 80 overlaps with the gate wirings 22, 26, 27, and 28 of the previous stage for transmitting the scan signal to the thin film transistors formed in the adjacent pixel rows at the front end to form the storage capacitor. However, in the case where the holding capacitance is not sufficient, the holding wiring may be separately formed to ensure sufficient holding capacitance. In this case, the pixel electrodes 82 of the neighboring blue pixels B1 and B2 rows are connected through the first and second pixel electrode connectors 851 and 852, respectively, and the blue pixels B1 and B2 are connected to each other. Pixel electrodes 82 are connected to thin film transistors that are alternately arranged one by one in a neighboring blue pixel column with respect to two pixel rows. Therefore, in the portion B, the second pixel electrode connection part 852 overlaps the gate line 22 of the previous stage, but connects the pixel electrode 82 of the other blue pixel B1 of the two neighboring blue pixels B1 and B2. As shown in part A, the first pixel electrode connection part 851 overlaps with its gate line 22 that transmits a gate signal to the pixels of the corresponding row. As a result, a parasitic capacitance formed by overlapping the first pixel electrode connection portion 851 and the gate line 22 is formed, which acts as a cause of the kickback voltage to lower the pixel voltage applied to the corresponding pixel electrode 82. As a result, luminance differences between neighboring blue pixel columns are generated. In order to minimize this problem, in the structure according to the first embodiment in which the storage capacitor is formed through the overlap of the gate wirings 22, 27, 28 and the pixel electrode 82 at the front end, To this end, the parasitic capacitance formed by the overlap of the first pixel electrode connection portion 851 and its gate line 22 in the A portion does not exceed 5% of the sum of the liquid crystal capacitance and the storage capacitance of the corresponding pixel. It is required to optimize the area where the first pixel electrode connection part 851 and the gate line 22 overlap. If the parasitic capacitance between the first pixel electrode connection portion 851 and the gate line 22 exceeds 5% with respect to the sum of the liquid crystal capacitance and the storage capacitance of the corresponding pixel, the kickback voltage is increased by about 1 Volt or more. The difference in luminance between the pixels appears to be severe. Meanwhile, an auxiliary gate pad 84 connected to the gate pad 24 and the data pad 68 through the contact holes 74 and 78 of the passivation layer 70 and the gate insulating layer 30 is formed on the same layer as the pixel electrode 82. ) And auxiliary data pads 88, and whether or not they are applied is optional. In addition, a third data pad that electrically connects a data line 62 that transmits a data signal to two neighboring blue pixels B1 and B2 to one data pad 68 is formed on the same layer as the pixel electrode 82. The connection part 81 is formed. At this time, the two second data pad connecting portions 61 and the first data pad connecting portions 21 adjacent to the two second data pad connecting portions 21 connected to the data lines 62 transmitting data signals to two neighboring blue pixels B1 and B2 columns are formed. It is connected to the third data pad connection portion 81 through exposed contact holes 71 and 72, which are insulated from and intersect with the data lines of the neighboring red and green pixels G and G, and the two data lines of the neighboring blue pixels. Electrically connect 62 to one data pad 68. In this case, the contact hole 71 is connected by connecting the data line 62 of the neighboring blue pixels B1 and B2 to one data pad 68 using the first to second data pad connection parts 21, 61, and 81. , A load resistance may be added when a data signal is transmitted due to the contact resistance of the contact portion including the contact portion 72, and the wiring resistance of the first to second data pad connectors 21, 61, and 81. In this case, it is preferable to design the connection part such that the additional load resistance generated by additionally forming the connection part does not exceed 20% of the total load resistance of the data line 62. If the additional load resistance caused by the addition of such a connection exceeds 20% of the total load resistance of the data line 62, the charge capacity of the pixel is reduced by 5% or more, which is displayed when displaying an image. It will lower the characteristics.

Meanwhile, in the structure of FIGS. 1 to 3, a third data pad connection part of the same layer as the pixel electrode 82 is connected to a connection part for connecting a data line for transmitting a data signal to the two blue pixels B1 and B2 with one pad. Although 81 is used, only the second data pad connection portion may be used. This will be described in detail with reference to FIGS. 4 and 5.

FIG. 4 is a connection part for connecting a data line for transmitting a data signal to two neighboring blue pixels B1 and B2 in a structure of a thin film transistor array substrate for a liquid crystal display according to a second exemplary embodiment of the present invention. 5 is a cross-sectional view taken along the line VV ′ of FIG. 4. Here, the detailed drawings of the same parts as those of the first embodiment will be omitted.

As shown in FIGS. 4 and 5, two first data pad connecting portions 21 for connecting the data lines 62 of two neighboring blue pixels are connected to each other through a connection pattern 211, and a gate The insulating film 30 has contact holes 32 exposing two first data pad connectors 21, respectively. At this time, the two data lines 62 which transmit data signals to two neighboring blue pixels are respectively connected to the first data pad connection part 21 by the second data pad connection part 61 connected to each other through the contact hole 32. They are electrically connected to each other.

Although a thin film transistor substrate for a liquid crystal display device of a transmissive mode using transparent ITO or IZO is used as an example of the material of the pixel electrode 82, the pixel electrode 82 is made of aluminum, an aluminum alloy, silver, or a silver alloy having reflectivity. Likewise, it may be formed of a conductive material having reflectivity.

In the structure according to the embodiment of the present invention, it is similar to the pixel array structure of the pentile matrix, and can be easily applied to display a circle or a diagonal shape when displaying an image, thereby facilitating the representation of letters and figures. The SVGA class pixel array can realize the UXGA class resolution and can reduce the number of data pads 68, thereby reducing the number of expensive data driving integrated circuits, thereby minimizing the design cost of the display device. In addition, since the data line which transmits a signal to the blue unit pixel is formed in the same shape as the data line which transmits a signal to the red and green unit pixels like other wirings, the display characteristics can be prevented from being uneven. In addition, the storage capacitance can be secured through the overlapping of the gate line and the pixel electrode at the front end, and the parasitic capacitance generated by the overlapping of the gate line and the pixel electrode connection part of the front end can be optimized to uniformly form the storage capacitance. In addition, data lines for transmitting data signals to red or green pixels are arranged with unit pixels interposed therebetween, whereby short circuits of neighboring data lines can be prevented. In addition, in driving adjacent blue pixels using one driving integrated circuit, the data driving integrated circuit may be disposed on one side of the display area using a data pad connection unit, thereby optimizing the size of the display device. Repair lines for repairing disconnection or short circuit of the wiring can be easily formed around the display area.

In FIGS. 1 and 3, the structure in which the front gate line and the pixel electrode overlap each other to form a storage capacitor is described. However, referring to FIGS. 6 and 7, a separate storage capacitor wiring line is illustrated to form the storage capacitor. A pixel array structure of the liquid crystal display according to the third embodiment of the present invention will be described in detail.

FIG. 6 is a layout view illustrating a pixel array structure of a liquid crystal display according to a third exemplary embodiment of the present invention, and FIG. 7 is a cross-sectional view of the thin film transistor array substrate taken along the line VII-VII ′ of FIG. 6.

As shown in FIG. 6, the thin film transistor array substrate for a liquid crystal display according to the third exemplary embodiment of the present invention includes a pixel for red, blue, and green color filters in the form of a pentile matrix (R, B1, G, R, B2). , G, ...) are arranged. At this time, as in the first embodiment, red, blue, and green pixels (.R, B1, G, R, B2, G, ...) are sequentially arranged in the row direction, and neighboring row directions in the column direction. Similarly, red, green, and blue pixels (... R, B1, G, R, B2, G, ...) are arranged. However, the difference from the first embodiment is that the blue pixels B1 and B2 have a rhombus shape and are arranged in rows and columns of two neighboring pixels R and G between two neighboring red and green columns of pixels R and G. The red and green pixels R and G, which are arranged one by one and are positioned at the center of four green and blue (G and B), and are arranged around the blue pixels B1 and B2, have a rhombus-shaped blue pixel (B1). , B2) are arranged facing each other. At this time, as shown in Figure 1, in the horizontal direction, the gate line (or scan) to transfer the scan signal or the gate signal to the red (blue, green, green) pixels (R, B1, G, R, B2, G, ...) row Signal lines 221 and 222 are formed for each pixel row, and in the vertical direction, data signals are transmitted to the red, blue, and green pixels (R, B1, G, R, B2, G, ...) columns. Columns of pixels R, B1, G, R, B2, G, ... while the data lines (62R, 62B1, 62G, 62R, 62B2, 62G, ...) are insulated from and cross the gate lines 221 and 222. It is formed with respect to a direction, respectively. In addition, each pixel (... R, B1, G, R, B2, G, ...) is provided with a pixel electrode through which data signals are transmitted through data lines (... 62R, 62B1, 62G, 62R, 62B2, 62G, ...). 82R, 82B1, 82G, 82R, 82B2, 82G, ... are formed. Further, in the column direction of the pixels, the first capacitors 231 and 232 for the storage capacitors, which overlap with the pixel electrodes (... 82R, 82B1, 82G, 82R, 82B2, 82G, ...), form a storage capacitor and extend in the horizontal direction. And storage capacitor wirings including the storage capacitor second wirings 25, 27, and 29 extending along the sides of the pixel electrodes 82B1 and 82B2 of the blue pixel. Here, each pixel also includes gate lines 221 and 222, data lines (62R, 62B1, 62G, 62R, 62B2, 62G, ...) and pixel electrodes (... 82R, 82B1, 82G, 82R, 82B2, 82G, ... Thin film transistors including a gate electrode 26, a source electrode 65, and a drain electrode 66, which are respectively connected to each other, are disposed.

More specifically, in the liquid crystal display according to the third embodiment of the present invention, gate wiring and sustain wiring are alternately formed on the transparent insulating substrate 10. The gate wiring includes a scan signal line or gate lines 221 and 222 extending in the horizontal direction and a gate electrode 26 of a thin film transistor that is part of the gate line 22. As in the first embodiment, the gate lines 221 and The gate pads may include gate pads respectively connected to the ends of the 222. In this case, the gate electrode 26 connected to one gate line 221 is formed only in the blue pixel B1 column, and the gate electrode 26 connected to the other gate line 222 is the blue pixel B2. It is formed only in heat. The storage wiring extends in the horizontal direction and is connected to the first storage wirings 231 and 232 and the first storage wirings 231 and 232 formed alternately with the gate lines 221 and 222, respectively. And the second wirings 25, 27, and 29 for storage capacitors that extend to the boundaries of blue and green pixels (R, B1, G, R, B2, G, ...). The sustain wirings 231, 231, 25, 27, and 29 are pixel electrodes (... 82R, 82B1, 82G, 82R, 82B2, 82G,) of pixels (... R, B1, G, R, B2, G, ...) to be described later. And superimposed on each of them to form a storage capacitor having a storage capacitor for improving the charge storage capability of the pixel. In this case, two gate lines 221 and 222 neighboring each other are formed to be spaced apart from both sides of the first wirings 231 and 232 for the storage capacitor, thereby preventing a short circuit of the gate wirings.

A data line made of a low resistance conductive material is formed on the gate insulating layer 30 covering the gate lines 221, 222, 26 and the sustain lines 231, 232, 25, 27, and 29. The data lines are formed in the vertical direction and are arranged one by one in pixel units of red, blue, and green pixels (... R, B1, G, R, B2, G, ...), and the data lines (... 62R, 62B1, 62G, 62R, 62B2, 62G, ..., and the drain of the thin film transistor positioned opposite to the source electrode 65 with respect to the source electrode 65 and the gate electrode 26 of the thin film transistor connected thereto or the semiconductor layer 40 of the thin film transistor. It includes an electrode 66, and may include a data pad connected to one end of the data line 62 to receive an image signal from the outside. At this time, the data line 62R in the red pixel R column is formed at the boundary between the red and green pixels R and G, while the data lines 62B1 and 62B2 in the blue pixel B1 and B2 columns are red and blue pixels. It is formed across the center of the column, and the data line 62G of the green pixel (G) column is also formed across the center of the green pixel column, so that the data lines (‥ 62R, 62B1, 62G, 62R, 62B2, 62G, ... are spaced apart from each other to prevent short circuit between data lines (62R, 62B1, 62G, 62R, 62B2, 62G, ...), and data lines (62R, 62B1, 62G, 62R, 62B2, 62G). It is possible to prevent indirect between data signals transmitted to,.

On the data lines 62R, 62B1, 62G, 62R, 62B2, 62G, 65, 66 and the semiconductor layer 40 not covered therefrom, a protective film 70 made of an organic insulating material such as silicon nitride or acrylic is formed. In the upper portion of the passivation layer 70, pixel electrodes (... 82R, 82B1, 82G, 82R, 82B2, 82G, ...) connected to the drain electrode 76 through the contact hole 76 are each pixel (... R). , B1, G, R, B2, G, ... are formed along the pixel shape.

Of course, even in the structure according to the third embodiment of the present invention, the structure of the data pad connection unit for connecting the data line to one data pad based on two neighboring blue pixels provided in the first embodiment may be applied in the same manner. The data pad connector may be equally applicable to a conventional fan tile structure.

The liquid crystal display according to the third exemplary embodiment of the present invention has a structure in which a storage capacitor is secured by using a maintenance wiring. The pixel array of the pentile matrix has a pixel array, and gates and gates in the neighboring pixel rows and columns having excellent display characteristics are provided. Signal lines that transmit data signals are spaced at regular intervals to prevent short circuits. In addition, the data line is formed to an optimal length across the center of the pixel, so that the delay of the signal transmitted through the data line can be made uniform. On the other hand, in such a structure, the signal line is formed to cross the center of the pixel, and thus the pixel electrodes (... 82R, 82B1, 82G, 82R, 82B2, 82G, ...) are formed as a reflective film of a conductive material having a reflectivity, thereby forming a reflective liquid crystal display. It is advantageous to apply to the device. At this time, the passivation layer 70 between the data wirings (62R, 62B1, 62G, 62R, 62B2, 62G, ...) and the pixel electrodes (... 82R, 82B1, 82G, 82R, 82B2, 82G, ...) has a low dielectric constant. It is preferable to ensure sufficient wiring between layers which consist of organic insulating materials. In this case, the surface of the protective film 70 may be formed to have irregularities in order to increase the reflectance of the reflective film, and the protective film 70 is adopted as an insulating film having a low reflectance and transmittance with respect to incident light and leaks between neighboring pixels. Blocking the light or blocking the light incident to the semiconductor layer 40 of the thin film transistor may impart a black matrix function, and change the shape of the gate wiring, data wiring and sustain wiring to leak between pixels. It can also be used as a black matrix to block out light.

On the other hand, in the driving method of the liquid crystal display device, in order to prevent deterioration of the liquid crystal, the image signal transmitted to the pixel electrode is driven to be repeated positively and negatively with respect to the common electrode. Such a driving method is called an inversion driving method. In this case, when the inverted polarity of the pixel is driven irregularly, the image signal transmitted to the pixel electrode is severely distorted to generate flicker, which causes a problem of deterioration in image quality of the liquid crystal display. In order to solve this problem, in a structure in which a pixel array of a pentile matrix according to an embodiment of the present invention is arranged and red, blue, and green pixel columns are sequentially arranged, data of the first or second neighboring blue pixel columns is arranged. An image signal is transferred by connecting a line to one pad and intersecting data lines of neighboring red and green pixel columns between data lines of a blue pixel column connected by one pad. This will be described in detail with reference to the drawings.

8 to 10 illustrate a connection structure of wirings in the inversion driving method of the liquid crystal display according to the fourth to sixth embodiments of the present invention. Here, the display "·" shows the positions of the thin film transistors in the blue pixels arranged in the column direction, and "+" and "-" indicate pixel voltages (image signals) applied to the pixel electrodes with respect to the common voltage of the common electrodes. It shows the polarity of. In this embodiment, the pixel arrangement uses twelve pixel columns as a predetermined unit.

As shown in FIG. 8, in the liquid crystal display according to the fourth exemplary embodiment, the data line 62 of the n + 4 th blue pixel column is electrically connected to the data line 62 of the n + 1 th blue pixel column. The n + 4th blue pixel column receives an image signal through a data pad connected to the n + 1th data line 62, and the data line 62 of the n + 7th blue pixel column is n +. The n + 7th blue pixel column is electrically connected to the data line 62 of the 10th blue pixel column, and receives an image signal through a data pad connected to the n + 10th data line 62. In addition, the data line 62 of the n + 5th green pixel column and the data line 62 of the n + 6th red pixel column cross each other, respectively, and the n + 6th green pixel column and the n + 5th red pixel, respectively. Transfer the image signal to the heat.

When the liquid crystal display having such a connection structure is driven with dot inversion in the column and row directions, as shown in Fig. 8, in the row direction of the pixels with respect to the entire liquid crystal panel, ..., +++, ---, +-+ The inversion drive can be performed while having regularity of-,-+-and.

As shown in FIG. 9, in the liquid crystal display according to the fifth exemplary embodiment, the data line 62 of the n + 7th blue pixel column is electrically connected to the data line 62 of the n + 1th blue pixel column. The n + 7th blue pixel column receives an image signal through a data pad connected to the n + 1th data line 62, and the data line 62 of the n + 10th blue pixel column receives n + 4. The n + 10 th blue pixel column is electrically connected to the data line 62 of the first blue pixel column, and receives an image signal through a data pad connected to the n + 4 th data line 62. In addition, the data line 62 of the n + 8th green pixel column and the data line 62 of the n + 9th red pixel column intersect each other, respectively, to the n + 9th green pixel column and the n + 8th red pixel column. Pass the image signal.

When driving the liquid crystal display device according to the fifth embodiment having such a connection structure with dot inversion in the column and row directions, as shown in FIG. 9, in the pixel row direction with respect to the entire liquid crystal panel, ..., +++, Reverse driving can be performed with regularity of-+-, ....

As shown in FIG. 10, in the liquid crystal display according to the sixth exemplary embodiment, the data line 62 of the n + 10 th blue pixel column is electrically connected to the data line 62 of the n + 1 th blue pixel column. The n + 10 th blue pixel column receives an image signal through a data pad connected to the n + 1 th data line 62, and the data line 62 of the n + 7 th blue pixel column n + 4. The n + 7th blue pixel column is electrically connected to the data line 62 of the first blue pixel column, and receives an image signal through a data pad connected to the n + 4th data line 62. In addition, the data line 62 of the n + 8th green pixel column and the data line 62 of the n + 9th red pixel column intersect each other, respectively, to the n + 9th green pixel column and the n + 8th red pixel column. Pass the image signal.

When the liquid crystal display device having such a connection structure is driven with dot inversion in the column and row directions, as shown in FIG. 10, in the row direction of the pixels with respect to the entire liquid crystal panel, ..., +++,-+-, +-+ Reverse driving can be performed with regularity.

Here, in the driving method of the liquid crystal display according to the fifth embodiment of the present invention, when driving in the dot inversion method, inversion driving can be performed with regularities of +++ and-+-in the row direction of the pixels. However, flicker may occur due to the inversion of the frame in the column direction with respect to the blue pixel column. In order to solve this problem, column inversion driving is performed in the row direction or two dot inversion is performed in the column direction.

11 and 12 illustrate a column inversion driving and a two dot inversion driving in the driving method of the liquid crystal display according to the fifth embodiment of the present invention.

As shown in FIG. 11, when the column inversion is performed in the row direction in the driving method of the liquid crystal display according to the fifth embodiment of the present invention, the blue pixel column is also driven by color inversion in the row direction to improve display characteristics. You can.

As shown in Fig. 12, when two-dot inversion driving is performed in the column direction, the blue pixel can realize uniform dot inversion in the column direction and the row direction.

Meanwhile, in the structure of the thin film transistor array substrate for a liquid crystal display device according to the first embodiment of the present invention, a difference in the liquid crystal capacitance formed in the adjacent blue pixel B1 and B2 columns occurs, thereby deteriorating characteristics of the display device. In order to prevent this, a method of optimizing an area where the first pixel electrode connection part 851 overlaps with the gate line 22 transmitting the gate signal to its own pixel is proposed. The first and second pixel electrode connectors may be alternately disposed with respect to two neighboring pixel rows, such as a thin film transistor, so as not to overlap the gate line transferring the gate signal to the corresponding pixel column. This structure will be described below with reference to FIGS. 1 and 13.

13 to 15 illustrate structures and dot inversion driving of the liquid crystal display according to the seventh to ninth embodiments of the present invention. Herein, the structure of the TFT array substrate for a liquid crystal display device according to the seventh to ninth embodiments of the present invention has been described with reference to FIG. 1, and FIGS. 13 to 15 illustrate the seventh to ninth embodiments of the present invention. The structure of the pixel at the time of 2 dot inversion driving using the liquid crystal display device which concerns on this is shown.

In the first embodiment, as shown in FIG. 1, the first and second pixel electrode connection portions 851 and 852 are formed to overlap the same gate line 22. However, referring to FIG. 1, the seventh embodiment will be described with reference to FIG. 1. In the thin film transistor array substrate for a liquid crystal display, the first and second pixel electrode connection parts are alternately arranged with respect to two pixel rows adjacent to the thin film transistor in the same manner as the arrangement structure. In this case, the first pixel electrode connection part overlaps the other gate line adjacent to the gate line overlapping the second pixel electrode connection part to electrically connect the pixel electrodes of two adjacent blue pixel rows. In this structure, the pixel electrodes of the B1 pixel and the B2 pixel have the same structure, but as shown in FIG. 13, the two pixels have an arrangement structure shifted by 1/2 of a pixel, and the thin film transistor of the blue pixel has a corner of the pixel. Is located only.

Using the structure according to the seventh exemplary embodiment of the present invention, when driving in two dot inversion as shown in FIG. 13, uniform inversion driving can be performed and at the same time, the first and second pixel electrode connecting portions As a result, the luminance difference generated in the blue pixel may be eliminated by overlapping the gate line that transmits the scan signal to the neighboring pixels.

Meanwhile, in the liquid crystal display according to the seventh exemplary embodiment, the first and second pixel electrode connection parts overlap the gate lines of the preceding pixel row in order to remove the luminance difference occurring between the blue pixel columns. In the liquid crystal display according to the eighth embodiment of the present invention, like the B1 pixel of FIG. 1, the second pixel electrode connection part of the B2 pixel is formed to overlap the gate line of the corresponding pixel column. In this case, as shown in the B1 pixel of FIG. 1 and the first and second pixel electrode connection portions as shown in FIG. 14, the thin film transistor is positioned on one side of the blue pixel. However, in the structure according to the eighth embodiment, a signal delay occurs severely only in the gate line connected to the thin film transistor connected to only one gate line of the gate lines of two neighboring pixel rows. The difference in delay is severe. In order to solve this problem, as shown in FIG. 15, the blue pixels of neighboring pixel columns may be moved by 1/2 as shown in the seventh embodiment.

On the other hand, in the foregoing fourth to ninth embodiments, the data wirings (see the first to third embodiments) when the data lines 62 intersect with each other in order to transfer image signals to neighboring red and green pixel columns. ), The gate wirings (see the first to third embodiments) and the pixel electrodes (see the first to the third embodiments) are preferably formed in the same layer as the data line crossing wirings. It will be described in detail.

16 and 17 are plan views illustrating data line cross connection portions in the liquid crystal display according to the fourth to ninth embodiments of the present invention. Here, reference numeral 210 denotes a first crossing wiring formed of the same layer as the gate wiring, reference numerals 610 and 620 denote second crossing wiring formed of the same layer as the data wiring, and reference numeral 810 denotes a pixel electrode. It is the 3rd crossing wiring formed in the same layer as this.

  As shown in FIG. 16, n + 5 and n + 6 or n + which transfer an image signal to red and green pixel columns on the thin film transistor array substrate for liquid crystal display according to the fourth to ninth embodiments of the present invention. The eighth or n + 9th data lines 62 are formed parallel to each other, and the data pads 68 are connected to each data line 62 by crossing each other. Here, the second cross wiring 610 is bent to electrically connect the n + 6 and n + 9th data pads 68 to the n + 5 and n + 8th data lines 62, respectively. The first cross wiring 210 and the third cross wiring 810 are connected to the n + 6 and n + 9th data lines 62 and the n + 5 and n + 8th data pads 68, respectively. . In this case, the first crossing wiring 210 is formed of the same layer as the gate wiring and bent to cross the second crossing wiring 610, and the third crossing wiring 810 is referred to as the gate insulating film 30 (FIG. 2). ) Or the first intersecting wiring 210 and the data line 62 are electrically connected through the contact hole 700 formed in the passivation layer 70 (see FIG. 2).

FIG. 17 is a structure in which the second crossing wire 610 of FIG. 16 is changed like the first crossing wire 210 in order to make the contact resistance of the data line cross connection part uniform. As shown in FIG. 17, the second crossing wires 620 are adjacent to the data line (via the contact hole 700 formed in the gate insulating film 30 (see FIG. 2) or the protective film 70 (see FIG. 2). 62 and the third intersecting wiring 810 connected to the data pad 68 are connected to each other.

In addition, data lines that transmit image signals to the red and green pixel columns and have data line cross connection portions have a contact portion between the first, second or third cross wires, so that they have a difference compared to the line resistance of other data lines. This may adversely affect the display characteristics of the liquid crystal display. As a method of improving such a problem, the line resistance variation of the entire data line should be minimized. For this purpose, it is preferable to form a connection portion in each data line, which will be described in detail with reference to FIG. 18.

FIG. 18 is a plan view illustrating a data line connection unit and a data line cross connection unit in the thin film transistor substrate for liquid crystal display according to the fourth to ninth embodiments.

As shown in FIG. 18, each data line 62 has a first connection wiring 250 formed of the same layer as the gate wiring and a second connection wiring 820 formed of the same layer as the pixel electrode. It is connected to the data pad 68 through.

In this structure, the plurality of data lines 62 are connected to the data pads through the two contact portions, respectively, to have uniform line resistances, thereby preventing the characteristics of the display device from being uneven.

Therefore, in the structure of the pixel array according to the present invention, the design cost can be minimized while displaying a high-resolution representation more advantageously when displaying images of letters and figures, and the data lines for transmitting signals to the unit pixels of blue are different. In the same manner as in the above, the display characteristics can be prevented from being uneven. In addition, the storage capacitor may be secured by using the gate line at the front end, and the storage capacitor may be uniformly formed by optimizing the parasitic capacitance generated by the overlap of the gate line and the pixel electrode connection unit. In addition, since the data wires and the gate wires are spaced apart at regular intervals, short circuits between neighboring wires can be prevented, and data driving integrated circuits can be arranged on one side of the display area using the data pad connection part. The size of the device can be optimized so that a repair line for repairing disconnection or short circuit of the wiring can be easily formed around the display area. In addition, an inversion driving having a more uniform polarity can be performed by applying an image signal of red and green pixel columns adjacent to each other between two blue pixel columns electrically connected to each other. Further, by moving the blue pixel columns adjacent to each other by 1/2 pixel, uniform inversion driving can be performed by using the gate line of the front end or its gate line in all the blue pixels, and the holding capacity can be uniformly ensured.

Claims (11)

Red, blue, and green pixels are sequentially arranged in the row direction, and red and green pixels are alternately arranged in the column direction, and blue pixels are arranged one by one for two pixel rows between neighboring red and green pixel columns. A blue pixel arranged in a center of the four neighboring red and green pixels; A gate line disposed in the horizontal direction with respect to the pixel row and transferring a scan signal or a gate signal to the pixel; Data lines arranged to insulate and intersect the gate lines in a vertical direction, and to transfer an image or data signal and to be arranged with respect to the pixel columns; Pixel electrodes disposed in the pixels, A liquid crystal display device comprising: a thin film transistor including a gate electrode disposed on the pixel and connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode, respectively. And the data lines of at least one pair of red and green pixel columns adjacent to each other cross each other to transmit an image signal, and the data lines transmitting the image signal to the blue pixel column are connected to each other in pairs. In claim 1, The pair of red and green pixel columns in which the data lines cross each other to transfer an image signal repeatedly appear in a period of twelve pixel columns, and the data line of the n + 4th blue pixel column is the n + 1th blue pixel column. Electrically connected to the data line to transfer the image signal, and the data line of the n + 7th blue pixel column is electrically connected to the data line of the n + 10th blue pixel column to transfer the image signal, and the n + 5th red And the data line of the green pixel column and the data line of the n + 6th red and green pixel columns cross each other to transmit an image signal. In claim 1, The pair of red and green pixel columns in which the data lines cross each other to transfer an image signal repeatedly appear in a period of twelve pixel columns, and the data line of the n + 10 th blue pixel column is the n + 1 th blue pixel column. Electrically connected to the data line to transfer the image signal, and the data line of the n + 7th blue pixel column is electrically connected to the data line of the n + 4th blue pixel column to transfer the image signal, and the n + 8th red And the data line of the green pixel column and the data line of the n + 9 th red and green pixel columns cross each other to transmit an image signal. In claim 1, The pair of red and green pixel columns in which the data lines cross each other to transmit an image signal repeatedly appear in a period of twelve pixel columns, and the data lines of the n + 7th blue pixel columns represent the n + 1th blue pixel columns. Electrically connected to a data line to transfer an image signal, and the data line of an n + 10th blue pixel column is electrically connected to the data line of an n + 4th blue pixel column to transmit an image signal, and an n + 8th red And the data line of the green pixel column and the data line of the n + 9 th red and green pixel columns cross each other to transmit an image signal. In claim 4, The liquid crystal display device applies a column inversion with respect to the column direction. In claim 4, The liquid crystal display device applies a two dot inversion with respect to the row direction. In claim 6, And a plurality of sub pixel electrodes formed in the blue pixel with respect to the pixel row, and the two sub pixel electrodes are connected through a pixel electrode connection part. In claim 7, And the pixel electrode connection parts are alternately arranged in the pixel columns of the two rows. In claim 8, And the pixel electrode connection part overlaps with the gate line that transmits the scan or gate signal to a front end or its pixel row. In claim 1, Some of the data lines have crossing wires for crossing and transferring image signals transmitted to the data lines of the red and green pixel columns through data pads connected to the data lines. The crossing wiring is formed of the same layer as the gate line, the first crossing wiring, the same layer as the data line, and the second crossing wiring which is insulated from and crosses the first crossing wiring, and the same layer as the pixel electrode. And an nth data pad connected to the n + 1th data line, and an n + 1th data pad connected to the first or second crossing wire and the data line, respectively. And a third crossover wiring connected to the data line. In claim 10, The data line not having the crossing wiring has a connection wiring, The connection wiring includes a first connection wiring formed of the same layer as the gate line and a second connection wiring formed of the same layer as the pixel electrode and electrically connecting the first connection wiring and the data line. Liquid crystal display.

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