KR100748087B1 - High speed packet matching device using S.P.I.Switch and its initialization method - Google Patents

Abstract

The present invention relates to a high-speed packet matching device that accommodates more than the traffic processing capacity of the physical port to increase the actual processing traffic capacity of the system and to implement link stabilization, converts the analog signal applied from the physical layer to digital, the internal digital signal At least one transceiver to convert the signal into an analog signal and output the converted signal; At least one framer configured to generate and restore a corresponding protocol packet frame according to a protocol type connected to each physical layer, and to be configured to correspond to the transceiver, respectively; And a physical layer input / output multiplexer for multiplexing the packets received from the framers and connecting the packet transmitted from the subscriber to the framer in the path for delivering the packet transmitted from the subscriber.

 SPI, Gigabit, Interface, Physical Layer, Packet Matching, Platform

Description

High-Speed Packet Interface Apparatus for the oversubscriber using SPI switch and initializing method

1 is a block diagram schematically illustrating a subscriber board of a network system to which the present invention is applied.

2 is a block diagram of a fast packet matching apparatus according to a preferred embodiment of the present invention.

3 is a block diagram of a functional block associated with mode setting of a subscriber board of a network system to implement the present invention.

* Brief description of symbols for the main parts of the drawings *

100: rear blade 110: front blade

101: Framer 102: Transceiver

103: SPI switch unit 104: blade type selection unit

105: clock generator 111: packet processing processor

112: traffic control unit 113: switch interface unit

114: main control unit

The present invention relates to a packet matching device and an initialization method thereof, and more particularly, to a packet matching device using an SPI (System Packet Interface) switch chip while complying with the Advanced Telecom Computing Architecture (ATCA) standard, and a method for initializing the packet matching device. will be.

The packet processing apparatus developed so far has been developed as a device having a non-standardized structure having a unique specification for each company. However, recent packet processing device manufacturers are making efforts to enact standardization specifications in order to make network system infrastructure (platform) common so that the system can be built with initial development cost and minimal manpower.

Reflecting this phenomenon, the Advanced Telecom Computing Architecture (ATCA) Recommendation was proposed by the PCI Industrial Computer Manufacturers Group (PICMG) Group, an industry standard organization. The ATCA Recommendation contains the system hardware platform specification. This specification aims to reduce initial development costs by sharing the work between developers.

To date, packet processing devices such as Ethernet switches and routers that handle Layer 2 (Layer 2) and Layer 3 (Layer 3) have a large number of physical ports, and the number of physical ports mostly depends on the switch capacity or packet processing capacity. Is determined.

For example, a 10 Gigabit Ethernet switch has ten 1 Gigabit physical ports or one 10 Gigabit physical port. Physical ports of less than 1 gigabit are used as subscriber ports for a few subscribers, so there is no significant damage due to link failure, but 10-gigabit physical links to medium and large routers or switches are used as system ports between stations. It can cause great damage in case of failure. In order to prepare for a fatal error such as a link failure in a system port connected between stations, a method of transmitting a packet by duplexing (redundancy) or bypassing another path is performed.

However, in the above structure, for example, a system capable of handling 10 gigabytes of traffic, for example, usually has only 10 gigabytes of physical ports, so the board must be duplexed or duplexed. In addition, most of the non-worst operational traffic amounts to 30-40% of average traffic based on the maximum value, so the traffic throughput of an Ethernet switch or router is 10 gigabits per second. Having is inefficiently operating the system.

Accordingly, there is a need for a packet matching device having a flexible structure that sufficiently digests system traffic and does not affect system redundancy.

SUMMARY OF THE INVENTION The present invention has been made to solve the problems of the prior art, and an object of the present invention is to provide a packet matching device and an initialization method for accommodating a physical port larger than the traffic processing capacity in order to increase the actual processing traffic capacity of the system and implement link stabilization. have.

In addition, another object of the present invention is to provide a packet matching device and its initialization method that can utilize both ports in consideration of traffic in actual operation rather than simply increasing the physical port for the purpose of physical port duplication. .

The high-speed packet matching device using the S.P.E.Switch according to the present invention for achieving this object,

At least one transceiver for converting an analog signal applied from the physical layer into digital, converting an analog signal applied from the physical layer into digital, and converting an internal digital signal into an analog signal and outputting the analog signal; At least one framer configured to generate and restore a corresponding protocol packet frame according to a protocol type connected to each physical layer, and to be configured to correspond to the transceiver, respectively; A physical layer I / O multiplexer for multiplexing packets received from the framers using a system packet interface (SPI) and connecting the packet transmitted from the subscriber to a framer in a path for delivering the packet to a corresponding destination, wherein the user data link By providing a plurality of physical ports and separate physical ports for operation management and other system control link, so that the provided multiple physical ports are used simultaneously by the physical layer input and output multiplexer according to the operational traffic. It is done.

delete

In one embodiment of the invention, the physical port for the user data link transmits an Ethernet frame without changing the hardware shape set by the user.

In one embodiment of the present invention, the packet matching device may further include a blade type selector to determine a mode that the framer can process, and furthermore, a system clock for adjusting the transmission rate according to each physical layer protocol type. It may further include a generator.

In addition, the initialization method of the high-speed packet matching device using the S.P.eye switch according to the present invention for achieving the above object,

Configuring a plurality of physical ports for the user data link and separate physical ports for operational management and other system control links; Selecting a mode using a blade type selector to determine a mode that the framer can process by a predetermined appointment; If a mode is selected, initializing transceivers and framers of each physical layer for each protocol type; Setting a system clock corresponding to a protocol and a transmission rate of each physical layer; And simultaneously using the plurality of physical ports configured according to operational traffic.

In one embodiment of the present invention, in the transceiver and framer initialization step, it is set to convert to the corresponding protocol frame without any hardware change.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In this case, detailed descriptions of well-known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted. In addition, in the description of the embodiments, the same components are designated by the same reference numerals for the convenience of understanding, even if shown in different drawings.

In the present invention, the subscriber board structure is manufactured based on ATCA, and is divided into a front blade and a rear transition module (RTM) blade. The front blade contains important functions for packet lookup, forwarding, and traffic control.The RTM blade is designed to implement links such as Ethernet, SONET, ATM, etc., depending on the link protocol to be connected, and all RTM blades. Implements the same interface as the front blade.

Subscriber boards are designed to handle 10 Gigabit per second traffic, so the traffic to or from the front blade does not exceed 10 Gigabit. SPI switches are used to multiplex two 10 Gigabit links, which are user data links, and two 1 Gigabit links, which are used for operational management and other system control links. In this case, the 10 Gigabit physical port may process a packet over SONET / SDH or Ethernet frame without changing a hardware configuration set by a user.

Since two 10 Gigabit physical links are processed by multiplexing, there is no restriction on the traffic for each physical link unless the traffic coming from the two physical ports exceeds 10 Gigabit. If the sum of traffic of only two physical links exceeds 10 gigabytes, the SPI switch discards packets that overflow at the same rate on both physical links.

Hereinafter, the configuration of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram schematically illustrating a subscriber board of a network system to which the present invention is applied. The subscriber board of the network system to which the present invention is applied will be described by taking an example in which the subscriber board is manufactured to satisfy the ATCA standard proposed by PICMG. Referring to FIG. 1, the subscriber board includes a front blade (front blade) 110 corresponding to an uplink and a rear side rear transition module (RTM) blade corresponding to a downlink in terms of an input / output (I / O) structure. 100).

The front blade 110 includes a packet processing processor 111 for performing packet lookup and editing, a traffic controller 112 for controlling overall traffic, a switch interface unit 113 that is a switch fabric matching element, and a front blade 110. And a main controller 114 for controlling the RTM blade 100. The RTM blade 100 is mainly designed to process a physical layer, and may be manufactured in a structure that can be matched with the front blade 110 according to a link type such as POS, ATM, Ethernet, and the like.

The RTM blade 100 includes n transceivers 102a to 102n for restoring a digital signal from an analog signal of a physical layer and a framer for generating and restoring a packet frame suitable for each physical layer medium ( 101).

Generally, a transceiver is a type in which a transmitter and a receiver are integrated into a single package, and are mainly responsible for transmitting and receiving analog signals and digital signals in mobile communication terminal devices and a network system.

An example of a packet matching device on the subscriber board side having the basic configuration as described above will be described.

2 is a block diagram of a fast packet matching apparatus according to a preferred embodiment of the present invention. Referring to FIG. 2, the SPI switch unit 103 may be employed in the RTM blade 100 in the subscriber board, and the number of physical ports may be extended and connected to the SPI switch 103 by a number suitable for accepting traffic. In the present invention, a 10 Gigabit traffic per second is processed, and the SPI switch is used to model and describe two multiplexed Gigabit links, which are user data links, and two Gigabit links, which are used for operation management and other system control links. do.

The SPI switch unit 103 has a plurality of SPI interfaces and exchanges packets at high speed between devices connected to each SPI interface. The SPI switch unit 103 has four identical SPI interfaces and each interface has a 10Gbps transmission capability. One SPI interface is connected to the front blade 110 and the other interface is matched to each chip on the RTM blade 100 side. Two framers, namely the first and second framers 101a and 101b and the transceivers 102a and 102b, can handle 10 Gigabit Ethernet (LAN / WAN) or OC-192 POS frames and the remaining third framer 101c. The transceiver 102c may accommodate 10/100 / 1000Base-T copper (copper) or 1000Base-X optical modules. The transceiver 102c thus aggregates the two port Gigabit Ethernet link.

The first transceiver 102a and the second transceiver 102b may be used as user data channels, and the third transceiver 102c may be used as a control channel required for system operation as a two-port gigalink. As a result, only 10 gigabyte and two gigabit ports can be combined to accommodate up to 22 gigabytes of traffic. If the traffic input from the four physical ports does not exceed 10 gigabit, the four ports can be utilized as needed.

The upstream traffic from each transceiver to the front blade is routed through each transceiver to each framer to a system packet interface (SPI) switch, which multiplexes the traffic and forwards it to the front blade through a single SPI interface. Downstream traffic from the front blade to the transceiver enters the desired framer from the SPI switch and is output through the specific transceiver to the physical port.

The 10 Gigabit framer portions 102a and 102b may handle OC-192 SONET or 10GBase-R Ethernet.

Hereinafter, a process of initializing the subscriber board in the state configured as described above will be described.

3 is a block diagram of a functional block associated with mode setting of a subscriber board of a network system to implement the present invention. Referring to FIG. 3, the user selects a value corresponding to a desired mode in the blade type selector 104 to determine a mode that the framer can process according to a predetermined appointment. When the value is determined, the front blade 110 receives information from the blade type selection unit 104 at the initial initialization and initializes it for POS or Ethernet mode. For 10 Gigabit Ethernet LANs, the transfer rate is 10.3125 Gbps, whereas for 10 Gigabit Ethernet WAN or OC-192 POS, the transfer rate is 9.95328 Gbps. Therefore, the system clock used must be supplied differently. The clock generator 105 automatically generates a required clock according to the mode selected by the blade type selector 104 to automatically select a 10 Gigabit Ethernet LAN, WAN, or OC-192 POS frame without any hardware change. To be handled. This cannot be changed actively during operation and must be selected at initialization.

Therefore, the high-speed packet matching device with three SPI-4 ports as in the present invention utilizes a point-to-point SPI-4 interface standard and core / metro / edge-based networking including routers, core switches, and VPN firewalls. It solves various interconnection problems in the market. In addition, the high-speed packet matching device according to the present invention provides a flexible connection of multiple SPI-4 network hardware devices such as a network processor unit (NPU), a coprocessor, a traffic manager, a multigigabit framer, a physical interface (PHY), and a switch fabric interface device. Provides architectural flexibility for multiple point connections.

Although the present invention has been described above with reference to its preferred embodiments, those skilled in the art will variously modify the present invention without departing from the spirit and scope of the invention as set forth in the claims below. And it will be understood that changes can be made. Accordingly, modifications to future embodiments of the present invention will not depart from the technology of the present invention.

As described above, in the related art, a separate packet matching device has been developed according to Ethernet and POS frames as in the conventional packet matching device. In this case, the initial development cost and development period of the system are not only increased, but also the price competitiveness of the performance is high. I can't develop an existing system. According to the present invention, the utility of the system is increased through the expansion of the number of ports while providing versatility to provide various application services, and network management through link duplication can be more efficiently performed.

In addition, by providing a separate control channel to expand the system or to manage the presence or absence of data channels can increase the availability of the system. For example, if the amount of traffic per physical port does not exceed 4 gigabytes in actual operation, even if two physical ports are accommodated in one line card, it does not matter even if two physical ports are used. The two ports have no implementation limitations, so you can use both ports simultaneously as long as the traffic on both ports is no more than 10 gigabits. Therefore, it is highly useful in link redundancy or connecting system load balancing system.

Claims (8)

At least one transceiver for converting an analog signal applied from a physical layer into a digital signal and converting an internal digital signal into an analog signal and outputting the analog signal; At least one framer configured to generate and restore a corresponding protocol packet frame according to a protocol type connected to each physical layer, and to be configured to correspond to the transceiver, respectively; And It includes a physical layer input and output multiplexer for multiplexing the packets received from the framers using a System Packet Interface (SPI), and connects the packets transmitted from the subscriber to the framer in the path for delivering the packets to the corresponding destination, Provides multiple physical ports for user data links and separate physical ports for operational management and other system control links, so that the provided multiple physical ports are simultaneously used by the physical layer I / O multiplexer according to operational traffic A high speed packet matching device using an S.P.E.Switch, characterized in that. delete delete The method of claim 1, wherein the physical port for the user data link, A fast packet matching device using an S.P.E.Switch, characterized by transmitting an Ethernet frame without changing a hardware configuration set by a user. The apparatus of claim 1, wherein the packet matching device is A fast packet matching device using an S.P.E.Switch, characterized by further comprising a blade type selector to determine a mode that the framer can process. The apparatus of claim 1, wherein the packet matching device is A high speed packet matching device using an S.P.E.Switch, further comprising a system clock generating unit for adjusting a transmission rate according to each physical layer protocol type. Configuring a plurality of physical ports for the user data link and separate physical ports for operational management and other system control links; Selecting a mode using a blade type selector to determine a mode that the framer can process by a predetermined appointment; If a mode is selected, initializing transceivers and framers of each physical layer for each protocol type; Setting a system clock corresponding to a protocol and a transmission rate of each physical layer; And And using a plurality of physical ports configured according to operational traffic at the same time. 8. The method of claim 7, wherein in the transceiver and framer initialization steps: Initialization method of a high speed packet matching device using an S.P.I.Switch, characterized in that configured to convert to a corresponding protocol frame without additional hardware change.

Images