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KR0161461B1 - Polysilicon Thin Film Transistor Liquid Crystal Display Manufacturing Method - Google Patents

Polysilicon Thin Film Transistor Liquid Crystal Display Manufacturing Method Download PDF

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KR0161461B1
KR0161461B1 KR1019950042794A KR19950042794A KR0161461B1 KR 0161461 B1 KR0161461 B1 KR 0161461B1 KR 1019950042794 A KR1019950042794 A KR 1019950042794A KR 19950042794 A KR19950042794 A KR 19950042794A KR 0161461 B1 KR0161461 B1 KR 0161461B1
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tft
active layer
insulating film
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KR970028766A (en
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윤찬주
배병성
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김광호
삼성전자주식회사
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743Silicon
    • H10D30/6745Polycrystalline or microcrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)

Abstract

본 발명은 이온의 차아지 업(Charge Up)에 의한 절연 파괴 현상을 방지하기 위한 Poly-Si TFT-LCD(폴리 실리콘 박막 트랜지스터 액정 디스플레이) 제조 방법에 관한 것이다.The present invention relates to a poly-Si TFT-LCD (polysilicon thin film transistor liquid crystal display) manufacturing method for preventing the dielectric breakdown caused by the charge up of the ions.

비도전성 기판상에 P-TFT와 N-TFT가 형성될 활성층을 형성하는 단계; 상기 활성층이 형성된 상기 기판상에 절연막을 증착하는 단계; 상기 절연막상에 게이트를 형성하는 단계; 상기 P-TFT와 N-TFT가 형성될 활성 층에 이온 주입시 이온의 차아지 업(Charge Up)에 의해 절연 파괴 현상이 발생하므로 이를 방지하기 위해 먼저 상기 게이트가 형성된 기판에 도전성막을 얇게 증착한 후 상기 P-TFT와 N-TFT가 형성될 활성층 각각에 포토 공정을 이용하여 이온을 주입하는 단계; 및 상기 도전성막을 제거하고 층간 절연막을 형성하는 단계를 포함한다.Forming an active layer on which a P-TFT and an N-TFT are to be formed; Depositing an insulating film on the substrate on which the active layer is formed; Forming a gate on the insulating film; In order to prevent this, the dielectric breakdown phenomenon occurs due to charge up of ions during ion implantation into the active layer on which the P-TFT and the N-TFT are to be formed. Then implanting ions into each of the active layers in which the P-TFT and the N-TFT are to be formed using a photo process; And removing the conductive film and forming an interlayer insulating film.

이온 주입 공정전에 도전성막을 증착함으로써 주입된 이온은 상기 도전성막 내의 충분한 전자와 결합하여 중화될 수 있고 게이트의 크기나 게이트간 거리에 따른 전위차(Potential Difference)가 발생하지 않아 판낼(PANNEL)의 안정성을 높이고 수율을 향상시킬 수 있다.By depositing a conductive film prior to the ion implantation process, the implanted ions can be neutralized by combining with sufficient electrons in the conductive film and there is no potential difference according to the size of the gate or the distance between the gates, thereby improving the stability of the panel. Increase the yield.

Description

폴리실리콘 박막트랜지스터 액정디스플레이 제조 방법Polysilicon Thin Film Transistor Liquid Crystal Display Manufacturing Method

제1a도 내지 제1c도는 종래 발명에 의한 Poly-Si TFT-LCD(폴리 실리콘 박막 트랜지스터 액정 디스플레이)의 제조 방법을 순차적으로 도시한 단면도들이다.1A to 1C are cross-sectional views sequentially illustrating a method of manufacturing a Poly-Si TFT-LCD (polysilicon thin film transistor liquid crystal display) according to the related art.

제2도는 차아지 업(Charge up)에 의한 절연막 파괴를 설명하기 위한 Poly-Si TFT-LCD의 평면도이다.2 is a plan view of a Poly-Si TFT-LCD for explaining dielectric breakdown due to charge up.

제3a도 내지 제3c도는 본 발명에 의한 Poly-Si TFT-LCD의 제조 방법을 순차적으로 도시한 단면도들이다.3A to 3C are cross-sectional views sequentially illustrating a method of manufacturing a Poly-Si TFT-LCD according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

21 : 기판 23a, 23b : 활성층21: substrate 23a, 23b: active layer

25 : 게이트 절연막 27 : 게이트25 gate insulating film 27 gate

28 : 도전성막 29a, 29b : 포토레지스트 패턴28: conductive film 29a, 29b: photoresist pattern

31 : 층간 절연막31: interlayer insulation film

본 발명은 폴리 실리콘 TFT-LCD에 관한 것으로, 특히 이온의 차아지 업(Charge Up)에 의한 절연 파괴 현상을 방지하기 위한 Poly-Si TFT-LCD(폴리 실리콘 박막 트랜지스터 액정 디스플레이) 제조 방법에 관한 것이다.The present invention relates to a polysilicon TFT-LCD, and more particularly, to a poly-Si TFT-LCD (polysilicon thin film transistor liquid crystal display) manufacturing method for preventing dielectric breakdown due to charge up of ions. .

현재 사용되고 있는 화상표시장치로는 음극선관(CRT)과 평판소자인 액정표시장치(LCD), 플라즈마 표시장치(PDP), 형광표시장치(VFD) 등이 있다.Currently used image display apparatuses include a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display apparatus (PDP), a fluorescent display apparatus (VFD), and the like.

상기 화상표시장치중 음극선관은 화질 및 밝기의 측면에서는 타소자에 비해 월등히 우수한 성능을 가지고 있으나 현재 대형화되는 추세에 적용하기에는 부피가 너무 크고, 무게가 너무 무겁다는 단점이 있다.Among the image display apparatuses, the cathode ray tube has superior performance compared to other devices in terms of image quality and brightness. However, the cathode ray tube has a disadvantage that the volume is too large and the weight is too heavy to be applied to the trend of increasing size.

반면에 최근, 문자나 도형 등의 필요한 정보를 디스플레이하기 위한 평면형 화상표시장치로 사용되고 있는 액정 표시 장치(LCD)는 저소비 전력, 저전압구동력, 박형, 경량의 장점을 갖는 특징으로 특히, 주로 노트북형 PC와 같은 사무기기 등에 널리 적용되고 있으며, 그 표시화면이 점차 대형화되어감으로써 대량의 정보를 한 화면에 나타낼 수 있도록 되어 향후 벽결이용 TV에 까지 그 적용범위가 확대될 것으로 기대되고 있다.On the other hand, liquid crystal display (LCD), which has recently been used as a flat image display device for displaying necessary information such as letters and figures, has the advantages of low power consumption, low voltage driving power, thinness, and light weight, in particular, mainly a notebook PC. It is widely applied to office equipment such as, and as the display screen is gradually enlarged, a large amount of information can be displayed on one screen, and the scope of application is expected to be extended to wall-use TV in the future.

액정표시장치에는 단순 매트릭스형 또는 액티브(active) 매트릭스형이 있으며, 액정의 전기광학적 성질을 이용하는 액정표시장치에 있어서 기본적 구동원리는 외부의 전압인가 여부에 따라 전계(electric field)의 영향을 받은 액정의 배열이 변화하며, 그 배열의 변화에 따라 액정표시장치에 유입되는 외부의 광이 차단 및 투과되어 화상을 형성하게 된다.The liquid crystal display device has a simple matrix type or an active matrix type, and in the liquid crystal display device using the electro-optical properties of the liquid crystal, the basic driving principle is a liquid crystal affected by an electric field depending on whether an external voltage is applied. The arrangement of the arrays changes, and external light flowing into the liquid crystal display device is blocked and transmitted as the arrangement changes, thereby forming an image.

상기 액티브 매트릭스 액정표시장치는 매트릭스 형태로 배열된 각 화소에 비선형 특성을 갖춘 액티브소자를 부가하여 이 소자의 스위칭특성을 이용하여 각 화소의 동작을 제어한다.The active matrix liquid crystal display device adds an active element having a nonlinear characteristic to each pixel arranged in a matrix to control the operation of each pixel by using the switching characteristic of the element.

액티브소자로는 통상 3단자형인 박막트랜지스터 (Thin Film Transister)가 이용되며, 2단자형인 MIM(Metal Insulator Metal)등 박막다이오드(Thin Film Diode;TFD)가 사용되기도 한다. 이러한 액티브 소자를 이용한 액티브 매트릭스 액정표시장치에는, 화소 어드레스 배선과 함께 수만개 내지 수백만개가 유리기판상에 집적화되어서, 스위칭 소자로서 작용하는 박막트랜지스터와 함께 매트릭스 구동 회로를 구성한다.As an active device, a three-terminal thin film transistor is used, and a two-terminal thin film diode (TFD) such as metal insulator metal (MIM) is also used. In an active matrix liquid crystal display device using such an active element, tens of thousands to millions of elements are integrated on a glass substrate together with pixel address wirings to form a matrix driving circuit together with a thin film transistor serving as a switching element.

차세대 화면 표시장치로 각광받고 있는 Poly-Si TFT-LCD(폴리 실리콘 박막 트랜지스터 액정 디스플레이)의 장점은 구동 회로를 내장할 수 있다는 것이다.The advantage of Poly-Si TFT-LCD (polysilicon thin film transistor liquid crystal display), which is gaining popularity as the next generation screen display device, is that it can integrate a driving circuit.

그러나 구동 회로를 만들기 위해서는 기본적인 인버터(INVERTER)를 제작해야 하므로 N-TFT와 P-TFT를 따로 만들어야하고 기생용량도 줄이기 위해서는 비정질 실리콘 TFT-LCD와는 달리 이온주입 공정을 필요로 한다.However, in order to make a driving circuit, a basic inverter must be manufactured, so an N-TFT and a P-TFT must be made separately, and an ion implantation process is required to reduce parasitic capacity unlike an amorphous silicon TFT-LCD.

보통 반도체 MOS 공정에서는 실리콘 기판이 도전성이 있으므로 이온 주입시 차아지 업(Charge up)에 의한 영향이 적지만 Poly-Si TFT-LCD의 기판은 부도체인 유리(Glass)나 석영(QZ)이므로 상대적으로 차아지 업(Charge up)에 의한 문제가 크다.In the semiconductor MOS process, since silicon substrate is conductive, it is less influenced by charge up during ion implantation, but the substrate of Poly-Si TFT-LCD is relatively non-conductive glass (glass) or quartz (QZ). The problem with charge up is great.

제1a도 내지 제1ㅊ도는 종래 발명에 의한 Poly-Si TFT-LCD(폴리 실리콘 박막 트랜지스터 액정 디스플레이)의 제조 방법을 순차적으로 도시한 단면도들이다.1A to 1 are cross-sectional views sequentially showing a method of manufacturing a Poly-Si TFT-LCD (polysilicon thin film transistor liquid crystal display) according to the related art.

참조번호 1은 기판을, 3은 활성층(Active Layer)을, 5는 게이트 절연막을, 7은 게이트를, 9는 포토레지스트 패턴을, 11은 층간 절연막을 나타낸다.Reference numeral 1 denotes a substrate, 3 an active layer, 5 a gate insulating film, 7 a gate, 9 a photoresist pattern, and 11 an interlayer insulating film.

제1a도는 Poly-Si TFT-LCD에 있어서 N-TFT가 형성될 활성층에 이온을 주입하는 단계를 나타낸다.FIG. 1A shows a step of implanting ions into an active layer in which an N-TFT is to be formed in a Poly-Si TFT-LCD.

기판(1)상에 실리콘을 증착하고 패터닝하여 P-TFT 활성층(3a)과 N-TFT 활성층(3b)을 한정한다.Silicon is deposited and patterned on the substrate 1 to define the P-TFT active layer 3a and the N-TFT active layer 3b.

상기 활성층(3a, 3b)이 형성된 상기 기판(1)상에 게이트 절연막(5)을 증착하고 상기 게이트 절연막(5)상에 게이트(7)를 형성한다.A gate insulating film 5 is deposited on the substrate 1 on which the active layers 3a and 3b are formed, and a gate 7 is formed on the gate insulating film 5.

상기 N-TFT 활성층(3b)이 오픈되고 상기 P-TFT 활성층(3a)을 포함하도록 포토 공정으로 포토레지스트 패턴(9a)을 형성한다.The photoresist pattern 9a is formed by a photo process so that the N-TFT active layer 3b is opened and the P-TFT active layer 3a is included.

상기 N-TFT 활성층(3b)에 N-TFT를 형성하기 위해 P+(인) 또는 As+(비소) 이온을 주입한다.P + (phosphorus) or As + (arsenic) ions are implanted into the N-TFT active layer 3b to form an N-TFT.

제1b도는 상기 P-TFT 활성층(3a)에 이온을 주입하는 단계를 나타낸다.FIG. 1B illustrates implanting ions into the P-TFT active layer 3a.

상기 포토레지스트 패턴(9a)을 제거한 후 상기 P-TFT 활성층(3a)이 오픈되고 상기 N-TFT 활성층(3b)을 포함하도록 포토 공정으로 포토레지스트 패턴(9a)을 형성한다.After removing the photoresist pattern 9a, the photoresist pattern 9a is formed by a photo process such that the P-TFT active layer 3a is opened and the N-TFT active layer 3b is included.

상기 P-TFT 활성층(3a)에 P-TFT를 형성하기 위해 B+(보론) 이온을 주입한다.B + (boron) ions are implanted into the P-TFT active layer 3a to form a P-TFT.

제1c도는 절연막을 증착하는 단계를 나타낸다.Figure 1c shows the step of depositing an insulating film.

상기 포토레지스트 패턴(9b)을 제거한 후 상기 결과물에 층간 절연막(11)을 증착한다.After removing the photoresist pattern 9b, an interlayer insulating layer 11 is deposited on the resultant.

Poly-Si TFT-LCD의 기판은 부도체인 유리(Glass)나 석영(QZ)이므로 상기의 이온 주입 공정시 중화시키기 위한 전자가 공급되지 못하므로 이온 상태로 쌓이는 차아지 업(Charge up)에 의해 게이트가 전위를 갖게되는 문제점이 발생한다.Since the substrate of Poly-Si TFT-LCD is glass or quartz (QZ), which is a non-conductor, electrons for neutralization cannot be supplied during the ion implantation process. The problem arises that has a potential.

제2도는 차아지 업(Charge up)에 의한 절연막 파괴를 설명하기 위한 Poly-Si TFT-LCD의 평면도로서 13은 활성층(Active Layer)을, 15는 게이트 층을, 17은 절연막이 파괴된 부분을 나타낸다.2 is a plan view of a poly-Si TFT-LCD for explaining the breakdown of the insulating layer due to charge up, where 13 is an active layer, 15 is a gate layer, and 17 is a portion where an insulating layer is broken. Indicates.

제1a도와 제1b도에서 주입된 이온은 활성층에서 중화되지 않고 차아지 업(Charge up)에 의해 게이트가 전위를 갖게된다. 이어서 게이트간(15) 거리나 크기에 따라 전위차(Potential Difference)가 발생하고, 그 차이가 클 경우에는 게이트 절연막을 파괴(17)하고 방전하는 현상이 발생한다.The ions implanted in FIGS. 1A and 1B are not neutralized in the active layer, and the gate has a potential due to charge up. Subsequently, a potential difference occurs according to the distance or size between the gates 15, and when the difference is large, the gate insulating film is destroyed 17 and discharged.

따라서 본 발명의 목적은 이온의 차아지 업(Charge Up)에 의한 절연 파괴 현상을 방지하기 위한 Poly-Si TFT-LCD(폴리 실리콘 박막 트랜지스터 액정 디스플레이) 제조 방법을 제공하는 데 있다.Accordingly, an object of the present invention is to provide a poly-Si TFT-LCD (polysilicon thin film transistor liquid crystal display) manufacturing method for preventing the dielectric breakdown caused by the charge up of the ions.

상기 목적을 달성하기 위하여 본 발명은,The present invention to achieve the above object,

비도전성 기판상에 P-TFT와 N-TFT가 형성될 활성층을 형성하는 단계;Forming an active layer on which a P-TFT and an N-TFT are to be formed;

상기 활성층이 형성된 상기 기판상에 절연막을 증착하는 단계;Depositing an insulating film on the substrate on which the active layer is formed;

상기 절연막상에 게이트를 형성하는 단계;Forming a gate on the insulating film;

상기 P-TFT 와 N-TFT가 형성될 활성 층에 이온 주입시 이온의 차아지 업(Charge Up)에 의해 절연 파괴 현상이 발생하므로 이를 방지하기 위해 먼저 상기 게이트가 형성된 기판에 도전성막을 얇게 증착한 후 상기 P-TFT와 N-TFT가 형성될 활성층 각각에 포토 공정을 이용하여 이온을 주입하는 단계; 및In order to prevent this, the dielectric breakdown phenomenon occurs due to charge up of ions during ion implantation into the active layer on which the P-TFT and the N-TFT are to be formed. Then implanting ions into each of the active layers in which the P-TFT and the N-TFT are to be formed using a photo process; And

상기 도전성 막을 제거하고 층간 절연막을 형성하는 단계를 포함하는 것을 특징으로 하는 Poly-Si TFT-LCD(폴리 실리콘 박막 트랜지스터 액정 디스플레이) 제조 방법을 제공한다.It provides a poly-Si TFT-LCD (polysilicon thin film transistor liquid crystal display) manufacturing method comprising the step of removing the conductive film and forming an interlayer insulating film.

상기 도전성막의 두께는 100Å 이하로 하고, 알루미늄(Al), 크롬(Cr), 티타늄(Ti) 등의 금속 중에 상기 하부의 게이트와 게이트 절연막에 대하여 식각 선택비가 좋은 금속을 사용하는 것이 바람직하다.The thickness of the conductive film is 100 kPa or less, and it is preferable to use a metal having a good etching selectivity with respect to the lower gate and the gate insulating film among metals such as aluminum (Al), chromium (Cr), and titanium (Ti).

또한 상기 도전성막으로 투명도전막(ITO; Indium Tin Oxide)을 사용할 수 있다.In addition, an indium tin oxide (ITO) may be used as the conductive layer.

본 발명은 Poly-Si TFT-LCD(폴리 실리콘 박막 트랜지스터 액정 디스플레이) 제조 방법에 있어서, 이온 주입 공정전에 도전성막을 증착함으로써 주입된 이온은 상기 도전성막 내의 충분한 전자와 결합하여 중화될 수 있고 게이트의 크기나 게이트간 거리에 따른 전위차(Potential Difference)가 발생하지 않아 판낼(PANNEL)의 안정성을 높이고 수율을 향상시킬 수 있다.The present invention relates to a poly-Si TFT-LCD (polysilicon thin film transistor liquid crystal display) manufacturing method, wherein the ion implanted by depositing a conductive film before the ion implantation process can be neutralized by combining with sufficient electrons in the conductive film and the size of the gate However, since potential difference does not occur according to the distance between gates, the stability of the panel can be improved and the yield can be improved.

이하 첨부한 도면을 참조하여 본 발명을 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

제3a도 내지 제3c도는 본 발명에 의한 Poly-Si TFT-LCD(폴리실리콘 박막 트랜지스터 액정 디스플레이)의 제조 방법을 순차적으로 도시한 단면도들이다.3A to 3C are cross-sectional views sequentially illustrating a method of manufacturing a Poly-Si TFT-LCD (polysilicon thin film transistor liquid crystal display) according to the present invention.

제3a도는 Poly-Si TFT-LCD에 있어서 N-TFT가 형성될 활성 층에 이온을 주입하는 단계를 나타낸다.Figure 3a shows the step of implanting ions into the active layer in which the N-TFT will be formed in the Poly-Si TFT-LCD.

기판(21)상에 실리콘을 증착하고 패터닝하여 P-TFT 활성층(23a)과 N-TFT 활성층(23b)을 한정한다.Silicon is deposited on the substrate 21 and patterned to define the P-TFT active layer 23a and the N-TFT active layer 23b.

상기 활성층(23a, 23b)이 형성된 상기 기판(21)상에 게이트 절연막(25)을 증착하고 상기 게이트 절연막(25)상에 게이트(27)를 형성한다.A gate insulating film 25 is deposited on the substrate 21 on which the active layers 23a and 23b are formed, and a gate 27 is formed on the gate insulating film 25.

상기 게이트(27)가 형성된 기판(21)에 도전성막(28)을 얇게 증착한 후 상기 N-TFT 활성층(23b)이 오픈되고 상기 P-TFT 활성층(23a)을 포함하도록 포토 공정으로 포토레지스트 패턴(29a)을 형성한다.After the thin film of the conductive film 28 is deposited on the substrate 21 on which the gate 27 is formed, the N-TFT active layer 23b is opened and the photoresist pattern is formed by a photo process to include the P-TFT active layer 23a. (29a) is formed.

상기 도전성막(28)은 알루미늄(Al), 크롬(Cr), 티타늄(Ti) 등 중의 어느 하나의 금속을 사용하여 100Å이하로 증착한다.The conductive film 28 is deposited to 100 kV or less using any one metal of aluminum (Al), chromium (Cr), titanium (Ti), and the like.

상기 N-TFT 활성층(23b)에 N-TFT를 형성하기 위해 P+ 또는 As+ 이온을 주입한다.P + or As + ions are implanted into the N-TFT active layer 23b to form an N-TFT.

제3b도는 상기 P-TFT 활성층(23a)에 이온을 주입하는 단계를 나타낸다.3b illustrates implanting ions into the P-TFT active layer 23a.

상기 포토레지스트 패턴(29a)을 제거한 후 상기 P-TFT 활성층(23a)이 오픈되고 상기 N-TFT 활성층(23b)을 포함하도록 포토 공정으로 포토레지스트 패턴(29a)을 형성한다.After removing the photoresist pattern 29a, the photoresist pattern 29a is formed by a photo process such that the P-TFT active layer 23a is opened and the N-TFT active layer 23b is included.

상기 P-TFT 활성층(23a)에 P-TFT를 형성하기 위해 B+ 이온을 주입한다.B + ions are implanted into the P-TFT active layer 23a to form a P-TFT.

제3c도는 층간 절연막을 형성하는 단계를 나타낸다.3C shows a step of forming an interlayer insulating film.

상기 포토레지스트 패턴(29b)과 상기 도전성막(28)을 차례로 제거한 후 상기 결과물에 층간 절연막(31)을 형성한다.After removing the photoresist pattern 29b and the conductive layer 28 in order, an interlayer insulating layer 31 is formed on the resultant.

본 발명은 Poly-Si TFT-LCD(폴리 실리콘 박막 트랜지스터 액정 디스플레이) 제조 방법에 있어서, 이온 주입 공정전에 도전성막을 증착함으로써 주입된 이온은 상기 도전성막 내의 충분한 전자와 결합하여 중화될 수 있고 게이트의 크기나 게이트간 거리에 따른 전위차(Potential Difference)가 발생하지 않아 판낼(PANNEL)의 안전성을 높이고 수율을 향상시킬 수 있다.The present invention relates to a poly-Si TFT-LCD (polysilicon thin film transistor liquid crystal display) manufacturing method, wherein the ion implanted by depositing a conductive film before the ion implantation process can be neutralized by combining with sufficient electrons in the conductive film and the size of the gate However, since potential difference does not occur according to the distance between gates, the safety of the panel can be improved and the yield can be improved.

이상, 본 발명은 이에 한정되지 않으며, 많은 변형이 본 발명의 기술적 사상내에서 당 분야에서 통상의 지식을 가진 자에 의하여 가능은 명백하다.As mentioned above, the present invention is not limited to this, and many modifications are apparent to those skilled in the art within the technical spirit of the present invention.

Claims (4)

비도전성 기판상에 P-TFT와 N-TFT가 형성될 활성층을 형성하는 단계; 상기 활성층이 형성된 상기 기판상에 절연막을 증착하는 단계; 상기 절연막상에 게이트를 형성하는 단계; 상기 P-TFT 와 N-TFT가 형성될 활성 층에 이온 주입시 이온의 차아지 업(Charge Up)에 의해 절연 파괴 현상이 발생하므로 이를 방지하기 위해 먼저 상기 게이트가 형성된 기판에 도전성막을 얇게 증착한 후 상기 P-TFT와 N-TFT가 형성될 활성층 각각에 포토 공정을 이용하여 이온을 주입하는 단계; 및 상기 도전성 막을 제거하고 층간 절연막을 형성하는 단계를 포함하는 것을 특징으로 하는 Poly-Si TFT-LCD(폴리 실리콘 박막 트랜지스터 액정 디스플레이) 제조 방법.Forming an active layer on which a P-TFT and an N-TFT are to be formed; Depositing an insulating film on the substrate on which the active layer is formed; Forming a gate on the insulating film; In order to prevent this, the dielectric breakdown phenomenon occurs due to charge up of ions during ion implantation into the active layer on which the P-TFT and the N-TFT are to be formed. Then implanting ions into each of the active layers in which the P-TFT and the N-TFT are to be formed using a photo process; And removing the conductive film and forming an interlayer insulating film. 제1항에 있어서, 상기 도전성막의 두께는 100Å 이하로 하는 것을 특징으로 하는 Poly-Si TFT-LCD 제조 방법.The poly-Si TFT-LCD manufacturing method according to claim 1, wherein the conductive film has a thickness of 100 kPa or less. 제1항에 있어서, 상기 도전성막(28)은 알루미늄(Al), 크롬(Cr), 티타늄(Ti) 등의 금속 중에 상기 하부의 게이트와 게이트 절연막에 대하여 식각 선택비가 좋은 금속을 사용하는 특징으로 하는 Poly-Si TFT-LCD 제조 방법.The method of claim 1, wherein the conductive layer 28 is formed of a metal such as aluminum (Al), chromium (Cr), titanium (Ti), or the like with a metal having a good etching selectivity with respect to the lower gate and the gate insulating layer. Poly-Si TFT-LCD manufacturing method. 제1항에 있어서, 상기 도전성막은 투명도전막(ITO; Indium Tin Oxide)을 사용하는 것을 특징으로 하는 Poly-Si TFT-LCD 제조 방법.The method of claim 1, wherein the conductive film uses an indium tin oxide (ITO).
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