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JPS6352463B2 - - Google Patents

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Publication number
JPS6352463B2
JPS6352463B2 JP53137498A JP13749878A JPS6352463B2 JP S6352463 B2 JPS6352463 B2 JP S6352463B2 JP 53137498 A JP53137498 A JP 53137498A JP 13749878 A JP13749878 A JP 13749878A JP S6352463 B2 JPS6352463 B2 JP S6352463B2
Authority
JP
Japan
Prior art keywords
leads
semiconductor device
lead
outer frame
sealing resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53137498A
Other languages
Japanese (ja)
Other versions
JPS5563854A (en
Inventor
Ryuichi Imazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP13749878A priority Critical patent/JPS5563854A/en
Publication of JPS5563854A publication Critical patent/JPS5563854A/en
Publication of JPS6352463B2 publication Critical patent/JPS6352463B2/ja
Granted legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 本発明は半導体装置の製造方法にかかり、とく
に封入加工後の電子回路測定選引工定に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and particularly relates to the measurement and selection of electronic circuits after encapsulation.

第1図〜第3図は従来の樹脂封止形の半導体装
置の製造工程を示す。
1 to 3 show the manufacturing process of a conventional resin-sealed semiconductor device.

第1図A及びBに示すように、従来の半導体装
置は、リードフレーム1の打板加工部の中央に所
定の半導体装置を結合したパツケージ部2を有
し、タイバー3はリード4の強度を保持する為
に、各リード間及びリードフレーム外枠5に結合
されている。この半導体装置は第2図A及びBに
示すように、タイバー3を切断し、さらに第3図
A及びBに示すように、リード4の先端切断及び
リード4を折曲加工する。
As shown in FIGS. 1A and 1B, the conventional semiconductor device has a package part 2 in which a predetermined semiconductor device is connected at the center of a stamped plate processing part of a lead frame 1, and a tie bar 3 controls the strength of the leads 4. For holding, it is connected between each lead and to the lead frame outer frame 5. In this semiconductor device, the tie bars 3 are cut as shown in FIGS. 2A and 2B, and the ends of the leads 4 are cut and the leads 4 are bent as shown in FIGS. 3A and 3B.

このリード折曲加工を行なつた後、半導体装置
の電子回路機能の測定選別方法としては、手作業
と自動装置によるふたつの方法があつた。
After performing this lead bending process, there were two methods for measuring and selecting the electronic circuit functions of the semiconductor device: manually and automatically.

次に、第4図A及びBに示すように、測定ソケ
ツト6へリード折曲加工を行なつた半導体装置7
をセツトし手作業による所定の電子回路機能の測
定選別を行なう。そして第5図A及びBに示すよ
うに、半導体装置の所定の電子回路機能の測定選
別の前後作業は、作業者がリード折曲加工を行な
つた半導体装置7を測定ソケツト6にピンセツト
又は手で抜き差しを行なう。ここで作業者が、リ
ード折曲加工を行なつた半導体装置7を測定ソケ
ツト6から抜き差しする時少しでも斜めになると
第5図に示すように、リード4が測定ソケツト内
部の壁8に接触してリード4が曲がるという欠点
があつた。
Next, as shown in FIGS. 4A and 4B, the semiconductor device 7 whose leads have been bent into the measurement socket 6 is
and perform manual measurement and selection of predetermined electronic circuit functions. As shown in FIGS. 5A and 5B, the work before and after the measurement and selection of predetermined electronic circuit functions of semiconductor devices is performed by an operator who inserts the semiconductor device 7 with the lead bending process into the measurement socket 6 with tweezers or by hand. to insert and remove. If the operator inserts or removes the semiconductor device 7 with bent leads from the measurement socket 6 at an angle even slightly, the leads 4 may come into contact with the wall 8 inside the measurement socket, as shown in FIG. The disadvantage was that the lead 4 was bent.

又、測定ソケツト6はリード折曲加工を行なつ
た半導体装置7との接触抵抗を極力小さくする為
に強いバネ性を持たせてあるので、リード折曲加
工を行なつた半導体装置7を測定ソケツト6へ抜
き差しする時リード4は強い力でしめつけられて
いる。従つて作業者が、リード折曲加工を行なつ
た半導体装置7を測定ソケツト6から抜き差しす
る時は大きい力が必要であり、作業者にとつてつ
らい仕事であるという欠点があつた。
In addition, the measurement socket 6 has strong spring properties in order to minimize the contact resistance with the semiconductor device 7 whose leads have been bent. Lead 4 is tightened with strong force when it is inserted into or removed from socket 6. Therefore, when the operator inserts and removes the semiconductor device 7, which has been subjected to the lead bending process, from the measurement socket 6, a large amount of force is required, which is a difficult task for the operator.

又、自動装置による半導体装置の電子回路測定
選別は、第6図A,B及び第7図A,Bに示すよ
うにコンタクトピン方法を行なつていた。このコ
ンタクトピン方法では、リード折曲加工を行なつ
た半導体装置7は、抜き差しせず、単なる両側の
コンタクトピン9による開閉接触法の電子回路測
定選別なので、リード曲がりがなくなつた。
Further, electronic circuit measurement and selection of semiconductor devices using automatic equipment has been carried out using a contact pin method as shown in FIGS. 6A and B and FIGS. 7A and B. In this contact pin method, the semiconductor device 7 that has been subjected to the lead bending process is not inserted or removed, but electronic circuit measurement and selection is performed using a simple opening/closing contact method using the contact pins 9 on both sides, so that bending of the leads is eliminated.

又、ソケツト方式でも、リード折曲加工を行な
つた半導体装置が、機械的に垂直方向に抜き差し
されるので、第5図のような斜めになる為のリー
ド曲がりはなくなつたが、下記に述べるように、
従来の自動装置では供給部及び収納部でリード曲
がりが発生するという欠点があつた。
In addition, even with the socket method, semiconductor devices with bent leads are mechanically inserted and removed in a vertical direction, so there is no need to bend the leads as shown in Figure 5, but as shown below. As stated,
Conventional automatic devices have had the disadvantage that lead bending occurs in the supply section and the storage section.

第8図A及びBに示すように、リード折曲加工
を行なつた半導体装置用のマガジン10は、アル
ミニウムの薄板をプレス加工行なつたものであ
る。従来の自動装置の供給部及び収納部には、こ
のマガジン10が使用されていたが、軽量化の為
にアルミニウムの0.7〜0.8mmの薄板を使用してい
るので、出口、入口が変形するという事が多かつ
た。従つて、変形したマガジン10を自動装置に
セツトしてリード折曲加工を行なつた半導体装置
7が通過する際、ひつかかつてリード曲がりが発
生するという欠点があつた。又ひつかかつたリー
ド折曲加工を行なつた半導体装置7を機械的に送
る爪がリード4を、強制的に曲げてしまうという
欠点があつた。又リード曲がりをしたリード折曲
加工を行なつた半導体装置7は定作業によるリー
ド曲がり修正が必要な為、多大な作業者と時間を
要するという欠点があつた。
As shown in FIGS. 8A and 8B, a magazine 10 for a semiconductor device whose leads have been bent is made by pressing a thin aluminum plate. This magazine 10 was used in the supply section and storage section of conventional automatic equipment, but because it uses a thin aluminum plate of 0.7 to 0.8 mm to reduce weight, the outlet and inlet will be deformed. A lot happened. Therefore, when the deformed magazine 10 is set in an automatic device and the semiconductor device 7 on which the leads have been bent passes, the leads may sometimes be bent. Another disadvantage is that the claws that mechanically feed the semiconductor device 7 which has been subjected to a difficult lead bending process forcefully bend the leads 4. In addition, the semiconductor device 7, which has bent leads and has been subjected to the bending process, has the disadvantage that it requires a large amount of time and labor because the lead bends must be corrected by routine work.

又、リード曲がり率は、40%ときわめて高いと
いう欠点と共に修正しても作業者による手作業の
為、作業者間で修正度合が異なり品質がバラツク
という欠点があつた。そして第9図及び、第10
図に示すように、大きく曲がつたリードは折れや
すく修正不可能として廃棄しなければならない。
In addition, there was a drawback that the lead bending rate was extremely high at 40%, and even if correction was done manually, the degree of correction differed between workers and the quality varied. And Figures 9 and 10
As shown in the figure, leads that are severely bent should be discarded as they are fragile and cannot be repaired.

この廃棄せごるを得ない折曲加工を行なつた半
導体装置11,12はたとえば3%にも達するの
で多大な損失となる欠点があつた。
Semiconductor devices 11 and 12 subjected to this unavoidable bending process have the disadvantage of resulting in a large loss, for example, as much as 3%.

本発明の目的は、上記の欠点を除去して、リー
ド曲がりの発生しない半導体装置の製造方法を提
供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a method for manufacturing a semiconductor device in which lead bending does not occur.

本発明の半導体装置の製造方法は、封止樹脂の
たがいに平行に相対向する第1および第2の側部
よりのそれぞれ複数のリードが導出され、これら
リードが折曲加工された半導体装置の製造方法に
おいて、外枠に連らなる複数の細い金属帯の組を
複数組有するリードフレームの各組の前記金属帯
の先端部を半導体素子とともに樹脂により封入
し、各組の前記金属帯のうち前記第1および第2
の側部とは平面形状で直角方向の封止樹脂の第3
および第4の側部より導出されている所定のもの
を除いて前記第1および第2の側部より導出して
いるものを前記外枠から切断分離するとともに前
記リードフレームを前記各組毎に分離して、分離
された各組の前記金属帯は前記外枠に囲まれた状
態で前記所定のもののみが該外枠に接続されてお
り、全体が同一平面を形成するようになされ、前
記半導体装置のリードとなる前記分離された各組
の全体が同一平面を形成する前記金属帯を、測定
接点を有するフラツト状半導体装置用測定ソケツ
トとリード部押えブロツクとによつて上下から押
え込み接触させて前記半導体素子の電気的特性の
測定を行ない、電子回路測定の内容ごとに全体が
同一平面を形成する各組をリードが水平になるよ
うに断面がコ字状の長尺状のマガジンに積み重ね
て収納した後、前記外枠に接続されている前記所
定の金属帯を前記封止樹脂の第3および第4の側
部の根もとより切断することにより前記封止樹脂
をその第1および第2の側部より複数のリードと
なる金属帯が導出された状態で前記外枠から取り
出し、しかる後、前記複数のリードとなる金属帯
に折曲加工を施すことを特徴とする。
The method for manufacturing a semiconductor device of the present invention includes a semiconductor device in which a plurality of leads are led out from first and second sides facing parallel to each other of a sealing resin, and these leads are bent. In the manufacturing method, in a lead frame having a plurality of sets of a plurality of thin metal strips connected to an outer frame, the tips of the metal strips of each set are encapsulated with a resin together with a semiconductor element, and among the metal strips of each set, Said first and second
The side part is the third part of the sealing resin in a planar shape and perpendicular direction.
and parts led out from the first and second side parts, excluding a predetermined part led out from the fourth side part, are cut and separated from the outer frame, and the lead frames are separated for each set. The separated metal bands of each set are surrounded by the outer frame, and only the predetermined ones are connected to the outer frame, so that the entire set forms the same plane; The metal strips, each of which is a lead of a semiconductor device and whose entirety forms the same plane, are pressed into contact from above and below by a flat semiconductor device measurement socket having a measurement contact and a lead holding block. The electrical characteristics of the semiconductor element are measured using the same method, and each set, whose entire surface is on the same plane, is stacked in a long magazine with a U-shaped cross section so that the leads are horizontal, depending on the contents of the electronic circuit measurement. Then, the predetermined metal band connected to the outer frame is cut from the roots of the third and fourth sides of the sealing resin, thereby removing the sealing resin from the first and second sides. It is characterized in that the metal strips that will become the plurality of leads are taken out from the outer frame in a state in which they are led out from the side of the metal strip, and then the metal strips that will become the plurality of leads are subjected to a bending process.

このような本発明による半導体装置の製造方法
は、リードフレームの外枠をつけたままの状態
で、最終工程迄流れるので、直接リードに周囲の
外力が加わることがなく、リード曲がりがおきな
いとという効果がある。
In the method for manufacturing a semiconductor device according to the present invention, the process continues until the final process with the outer frame of the lead frame still attached, so that no external force is applied directly to the leads, and the leads are prevented from bending. There is an effect.

以下、図面を参照して本発明の一実施例を説明
する。第11図A及びBに示すように、本発明の
一実施例の電子回路測定選別工程に於ける半導体
装置は、第1図の状態からタイバー切断及び先端
切断さらにリードフレームの外枠13をつけたま
ま各半導体装置ごとに個々に分離して得られる。
材質がコバーでできたリードフレームは、0.15〜
0.25mmの金属薄板を打抜加工して得られるもので
ある。
Hereinafter, one embodiment of the present invention will be described with reference to the drawings. As shown in FIGS. 11A and 11B, the semiconductor device in the electronic circuit measurement and selection process according to an embodiment of the present invention is cut from the state shown in FIG. It is obtained by separating each semiconductor device individually.
The lead frame made of Kobar material is 0.15~
It is obtained by punching a 0.25mm thin metal plate.

各半導体装置ごとに分離され、リード体の各々
がリードフレームと同一平面にある半導体装置
(以下フラツト状半導体装置と称する。)14はフ
ラツト状半導体装置用マガジンに収納される。そ
して第12図A及びBに示すように、フラツト状
半導体装置14は、フラツト状半導体装置用マガ
ジン15の内部に積み重ねて収納される。ここで
第13図A及びBに示すように、フラツト状半導
体装置用マガジン15は厚さ1mmのステンレス板
を用い、さらに90゜の折曲加工を行なつたものを
両面にとりつければ外部からの衝撃にも変形しな
い強度を得られる。ここで第14図A及びBに示
すように、フラツト状半導体装置の所要の電子回
路測定選別の前後作業は、リード部押えブロツク
16がフラツト状半導体装置用測定ソケツト17
の上方向で停止している。第12図のフラツト状
半導体装置用マガジン15より機械的に供給され
たフラツト状半導体装置14は、このフラツト状
半導体装置用測定ソケツト17の上面に位置決め
され停止する。そして第15図A及びBに示すよ
うに、フラツト状半導体装置14は、所要の電子
回路測定選別する為に、リード部押えブロツク1
6が下降して、フラツト状半導体装置14をフラ
ツト状半導体装置用測定ソケツト17に押え込み
リード4を接触させる。
A semiconductor device (hereinafter referred to as a flat semiconductor device) 14, which is separated into individual semiconductor devices and whose lead bodies are on the same plane as the lead frame, is stored in a magazine for flat semiconductor devices. As shown in FIGS. 12A and 12B, the flat semiconductor devices 14 are stacked and stored inside the magazine 15 for flat semiconductor devices. As shown in FIGS. 13A and 13B, the flat semiconductor device magazine 15 is made of a stainless steel plate with a thickness of 1 mm, and is bent at an angle of 90 degrees and attached to both sides to prevent external damage. It has the strength to resist deformation even under impact. Here, as shown in FIGS. 14A and 14B, the work before and after the necessary electronic circuit measurement and selection of flat semiconductor devices is performed when the lead holding block 16 is connected to the measurement socket 17 for flat semiconductor devices.
It is stopped in the upper direction. The flat semiconductor device 14 mechanically fed from the magazine 15 for flat semiconductor devices shown in FIG. 12 is positioned and stopped on the upper surface of the measurement socket 17 for flat semiconductor devices. As shown in FIGS. 15A and 15B, the flat semiconductor device 14 is mounted on a lead holding block 1 in order to measure and select required electronic circuits.
6 descends to press the flat semiconductor device 14 into the measurement socket 17 for flat semiconductor devices and bring the leads 4 into contact.

所要の電子回路測定が完了するとリード部押え
ブロツク16は第15図の状態迄上昇して停止し
た後、その電子回路測定の内容ごとに分類を行な
いフラツト状半導体装置用マガジン15に収納さ
れる。その後最終工程で、リード折曲加工を行な
い第3図のような最終形状となる。
When the required electronic circuit measurements are completed, the lead holding block 16 rises to the state shown in FIG. 15 and stops, after which the electronic circuits are classified according to the content of the electronic circuit measurements and stored in the flat semiconductor device magazine 15. Thereafter, in the final step, the leads are bent to form the final shape as shown in FIG.

このように従来のリード折曲加工を行なつた半
導体装置用マガジン10に比らべ、強度をもたせ
たフラツト状半導体装置用マガジン15を使用す
ることにより、マガジン出入口通過時のリード曲
がりは発生しないという利点がある。
Compared to the conventional semiconductor device magazine 10 that undergoes lead bending processing, by using the stronger flat semiconductor device magazine 15, leads do not bend when passing through the magazine entrance/exit. There is an advantage.

又、フラツト状半導体装置の所要の電子回路測
定選別時でもリード4の抜き差しはしないで押え
込むだけだから、リード曲がりは発生しないとい
う利点もある。
Further, even during the necessary electronic circuit measurement and selection of flat semiconductor devices, the leads 4 are only pressed down without being inserted or removed, so there is an advantage that lead bending does not occur.

このように、フラツト状半導体装置による半導
体装置の製造方法はリード曲がりがないので、リ
ード曲がり修正の為の作業者及び時間がいらない
こととなり、又リード曲がりがないので、リード
の曲がつた半導体装置が、他のリード曲がりして
ない半導体装置の中へ混入することがなくなり、
品質が向上することとなる。又、リード曲がりが
ないので、リード曲がり修正が不可能な為、廃棄
するということがなくなる利点がある。
In this way, since there is no lead bending in the manufacturing method of semiconductor devices using flat semiconductor devices, there is no need for workers and time to correct lead bending. However, this prevents the leads from getting mixed into other semiconductor devices whose leads are not bent.
Quality will improve. Further, since there is no lead bending, it is impossible to correct lead bending, so there is an advantage that there is no need to discard the lead.

【図面の簡単な説明】[Brief explanation of drawings]

第1図A及びBは、従来技術を示すものでリー
ドを切断する前の平面図及び正面図、第2図A及
びBは従来のタイバーを切断した平面図及び正面
図、第3図A及びBは、従来のリードの先端切断
及びリード折曲加工を行つた平面図及び正面図、
第4図A及びBは従来の手作業による半導体装置
の電子回路測定選別方法を示す平面図及び正面
図、第5図A及びBは、従来の手作業による半導
体装置の電子回路測定選別方法の前後作業状態の
測面図及び正面図、第6図AおよびBならびに第
7図AおよびBはそれぞれ従来の自動装置のコン
タクトピン方法を示す平面図及び正面図、第8図
A及びBは従来の半導体装置用マガジンの平面図
及び正面図、第9図及び第10図は従来の大きく
曲つたリードの半導体装置の側面図及び正面図で
ある。第11図A及びBは本発明の一実施例のタ
イバー切断、リード先端切断及び各半導体装置ご
とに分離した平面図及び正面図、第12図A及び
Bは、本発明の一実施例のフラツト状半導体装置
をフラツト状半導体装置用マガジンに収納した断
面図及び正面図、第13図A及びBは本発明の一
実施例のフラツト状半導体装置用マガジンの平面
図及び正面図、第14図A及びBは本発明の一実
施例の半導体測定装置の電子回路測定選別方法の
側面図及び正面図、第15A及びBは本発明の一
実施例の半導体測定装置の電子回路測定選別時の
側面図及び正面図である。 図中、1……リードフレーム、2……パツケー
ジ部、3……タイバー、4……リード、5……リ
ードフレーム外枠、6……測定ソケツト、7……
リード折曲加工を行なつた半導体装置、8……測
定ソケツト内部の壁、9……コンタクトピン、1
0……リード折曲加工を行なつた半導体装置用マ
ガジン、11,12……廃棄しなければいけない
リード折曲加工を行なつた半導体装置、13……
リードフレームの外枠、14……フラツト状半導
体装置、15……フラツト状半導体装置用マガジ
ン、16……リード部押えブロツク、17……フ
ラツト状半導体装置用測定ソケツトである。
Figures 1A and B show the prior art and are a plan view and a front view before cutting the leads, Figures 2A and B are a plan view and front view of a conventional tie bar after cutting it, and Figures 3A and B is a plan view and a front view of the conventional lead tip cut and lead bending process;
FIGS. 4A and 4B are plan and front views showing a conventional manual method for measuring and sorting electronic circuits of semiconductor devices, and FIGS. 5A and B show a conventional method for manually measuring and sorting electronic circuits for semiconductor devices. 6A and B and 7A and B are respectively plan views and front views showing the contact pin method of the conventional automatic device, and FIGS. 8A and B are the conventional FIGS. 9 and 10 are a plan view and a front view of a magazine for a semiconductor device, and FIGS. 9 and 10 are a side view and a front view of a conventional semiconductor device with greatly curved leads. 11A and 11B are plan views and front views of tie bar cutting, lead tip cutting, and separation for each semiconductor device according to an embodiment of the present invention, and FIGS. 12A and 12B are flat views of an embodiment of the present invention. 13A and 13B are a sectional view and a front view of a flat semiconductor device magazine containing a semiconductor device in the form of a flat semiconductor device, and FIG. 14A is a plan view and a front view of a magazine for a flat semiconductor device according to an embodiment of the present invention. 15A and 15B are side views and front views of a method for measuring and selecting electronic circuits in a semiconductor measuring device according to an embodiment of the present invention, and 15A and B are side views during measuring and selecting electronic circuits in a semiconductor measuring device according to an embodiment of the present invention. and a front view. In the figure, 1...lead frame, 2...package section, 3...tie bar, 4...lead, 5...lead frame outer frame, 6...measuring socket, 7...
Semiconductor device with lead bending process, 8... wall inside measurement socket, 9... contact pin, 1
0...Magazine for semiconductor devices that have undergone lead bending processing, 11, 12...Semiconductor devices that have undergone lead bending processing that must be discarded, 13...
Outer frame of the lead frame, 14... flat semiconductor device, 15... magazine for flat semiconductor device, 16... lead holding block, 17... measurement socket for flat semiconductor device.

Claims (1)

【特許請求の範囲】[Claims] 1 封止樹脂のたがいに平行に相対向する第1お
よび第2の側部よりのみそれぞれ複数のリードが
導出され、これらリードが折曲加工された半導体
装置の製造方法において、外枠に連らなる複数の
細い金属帯の組を複数組有するリードフレームの
各組の前記金属帯の先端部を半導体素子とともに
樹脂により封入し、各組の前記金属帯のうち前記
第1および第2の側部とは平面形状で直角方向の
封止樹脂の第3および第4の側部より導出されて
いる所定のものを除いて前記第1および第2の側
部より導出しているものを前記外枠から切断分離
するとともに前記リードフレームを前記各組毎に
分離して、分離された各組の前記金属帯は前記外
枠に囲まれた状態で前記所定のもののみが該外枠
に接続されており、全体が同一平面を形成するよ
うになされ、前記半導体装置のリードとなる前記
分離された各組の全体が同一平面を形成する前記
金属帯を、測定接点を有するフラツト状半導体装
置用測定ソケツトとリード部押えブロツクとによ
つて上下から押え込み接触させて前記半導体素子
の電気的特性の測定を行ない、電子回路測定の内
容ごとに全体が同一平面を形成する各組をリード
が水平になるように断面がコ字状の長尺状のマガ
ジンに積み重ねて収納した後、前記外枠に接続さ
れている前記所定の金属帯を前記封止樹脂の第3
および第4の側部の根もとより切断することによ
り前記封止樹脂をその第1および第2の側部より
複数のリードとなる金属帯が導出された状態で前
記外枠から取り出し、しかる後、前記複数のリー
ドとなる金属帯に折曲加工を施すことを特徴とす
る半導体装置の製造方法。
1. In a method for manufacturing a semiconductor device in which a plurality of leads are led out only from the first and second side portions of the sealing resin that face each other parallel to each other, and these leads are bent, A lead frame having a plurality of sets of a plurality of thin metal strips is encapsulated with resin together with a semiconductor element, and the first and second side portions of each set of the metal strips are encapsulated with a resin. means the outer frame that has a planar shape and that extends from the first and second sides of the sealing resin in the right angle direction, except for certain parts that extend from the third and fourth sides of the sealing resin. At the same time, the lead frame is separated into each group, and the metal strips of each separated group are surrounded by the outer frame, and only the predetermined ones are connected to the outer frame. A measurement socket for a flat semiconductor device having a measurement contact is connected to the metal strip, which is formed so as to form the same plane as a whole, and the metal strips, which are the leads of the semiconductor device, form the same plane in their entirety. The electrical characteristics of the semiconductor element are measured by pressing and contacting the semiconductor element from above and below with a lead holding block, and the leads are held horizontally so that each set forms the same plane as a whole for each electronic circuit measurement content. After the magazines are stacked and stored in long magazines with a U-shaped cross section, the predetermined metal strip connected to the outer frame is inserted into the third layer of the sealing resin.
Then, the sealing resin is removed from the outer frame with metal bands serving as a plurality of leads being led out from the first and second sides by cutting from the root of the fourth side, and then, A method of manufacturing a semiconductor device, characterized in that the metal strips serving as the plurality of leads are bent.
JP13749878A 1978-11-08 1978-11-08 Method of manufacturing semiconductor device Granted JPS5563854A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13749878A JPS5563854A (en) 1978-11-08 1978-11-08 Method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13749878A JPS5563854A (en) 1978-11-08 1978-11-08 Method of manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS5563854A JPS5563854A (en) 1980-05-14
JPS6352463B2 true JPS6352463B2 (en) 1988-10-19

Family

ID=15200056

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13749878A Granted JPS5563854A (en) 1978-11-08 1978-11-08 Method of manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPS5563854A (en)

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JPH0529427A (en) * 1991-07-24 1993-02-05 Nec Corp Manufacture of semiconductor device
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US6888750B2 (en) 2000-04-28 2005-05-03 Matrix Semiconductor, Inc. Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication
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