JPS6242558B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image signal encoding processing method, and in particular to an encoding method in which an image is divided into blocks and the image signal within the block is separated into gradation components and resolution components and then encoded. The present invention relates to an image signal encoding processing method that utilizes the high correlation of image signals and has a function of suppressing redundancy within and between blocks of tone components.

Various encoding methods have been devised to reduce transmission costs in image communications. Among them, an encoding processing method is being considered in which an image is divided into blocks, which are sets of adjacent pixels, and the image signal within the block is separated into resolution components and gradation components and encoded. ―No. 142389, Japanese Patent Application Publication No. 1989-
Publication No. 74623).

In this encoding processing method, each block is encoded as a unit. That is, the set of luminance values of pixels in each block {x _ij } (i=1~n, j=1~
n) is a set of luminance values that satisfy the following relationship {y _ij }
(i=1 to n, j=1 to n).

y _ij =a ₀・_ij +a ₁・φ _ij ……(1) However, It is. Hereinafter, φ _ij will be called a resolution component, and a ₀ and a ₁ will be called gradation components.

When encoding in this way, the number of image brightness levels is 256 (8 bits), and the block size n is n=
4, the data amount of one block is 4 x 4 x 8 = 128 bits in the original data, and after encoding, the resolution component is 4 x 4 x 1 = 16 bits, and the gradation component (2 The data amount is 32 bits (8×2=16 bits), and the amount of data is compressed to 32/128=1/4.

In this specification, this encoding processing method is used as a premise of the present invention.

However, although the correlation between adjacent pixels is extremely high in general images, in the above method, the gradation components a ₀ and a ₁ are individually given to each block. The components a ₀ or a ₁ will have very similar values. Furthermore, the values of tone components a ₀ and a ₁ within the block are also similar. For this reason, the method of providing tone components a ₀ and a ₁ individually does not fully utilize the high correlation between pixels and has a problem in increasing encoding efficiency.

The present invention aims to solve these drawbacks by providing an encoding processing method that has a function of removing redundancy by utilizing correlations between and within blocks of tone components, and improves encoding efficiency. The purpose is to improve. This will be explained in detail below using the drawings.

FIG. 1 is an explanatory diagram illustrating the application concept of the encoding method according to the present invention, in which 100 is a target image;
It shows the state divided into blocks as described above. 101 indicates one block and corresponds to that represented by _Bk . Assuming that _the block B _k is composed of, for example, 4 _{× 4} pixels as shown in _FIG . The value of is given by the state of φ _ij .

FIG _. 2 shows a portion of the target _{image 100} shown in FIG. _k-1,0 a _k-1,1 )～(a _k+1,0 , a _{k+1
, 1} ) as follows to find the values m and l.

Since m and l generally have a high correlation between adjacent pixels, they have the following properties. In other words, l has an amplitude distribution concentrated near 0, and m is the representative luminance value of a block. For example, if we calculate the inter-block difference △m as shown below, the distribution will also change depending on the height between pixels. Based on the correlation, it is concentrated in a region with small amplitude.

Δm _k =m _k −m _k-1 (3) Therefore, by performing nonlinear quantization that matches the distribution of Δm,l, it becomes possible to reduce the amount of code for tone components.

Figure 3 shows one of the encoding circuits based on the above principle.
An example is shown. In the figure, 301 is an encoder used in the method based on the present invention, that is, an encoder that obtains tone components a ₀ , a ₁ and resolution component φ _ij from a partial image divided into blocks, and realizes equation (1). do. 302 is an adder, 303 is a subtracter, 304 and 305 are dividers, 306 is a subtracter, 307 is a converter, 308 is an adder, 309 is a delay device, and 310 is a converter.

Next, the operation of this circuit will be explained.

The tone components a ₀ and a ₁ obtained by the encoder 301 are input to an adder 302 and a subtracter 303, and further input to dividers 304 and 305, respectively. As a result, the tone components a ₀ and a ₁ are converted into m and l shown in equation (2). Here, dividers 304, 30
5 simply halves the input signal, so it can be easily realized using a normal shift register. Next, m is input to one of the subtracters 306.
The subtracter 306 realizes equation (3), and the other input terminal receives 1 delayed by the delay device 309.
Enter the m before the block. That is, delay device 3
09 only needs to delay the input signal by the time required to process one block, and can be easily realized using a shift register or the like. The signal Δm obtained by the subtracter 306 is input to the converter 307.

The function of the converter 307 is to perform nonlinear quantization that matches the distribution of △m mentioned above. If △m is an analog signal, a normal nonlinear quantizer can be used, and if △m is a digital signal, a normal nonlinear quantizer can be used. For this purpose, it is sufficient to create a table that obtains a constant output value for each input value, so it is possible to use ordinary memory, etc. That is, by using the input signal as a memory address and the referenced memory contents as the output signal, arbitrary quantization characteristics can be easily realized. The output Δm' obtained by the converter 307 is used as one of the outputs of this encoding circuit, and is also used as one of the outputs of the adder 308.
The signal is inputted to the block and locally decoded, and together with the delay unit 309, a signal necessary for processing m in the next block is created.

For l, the converter 310 performs nonlinear quantization that matches the amplitude distribution of l, and the output is
l' is obtained and the amount of code is reduced. Converter 310 is similar to converter 307 and can be easily realized.

Furthermore, regarding the resolution component φ _ij , the encoder 301
Use what was obtained as is.

Through the operations described above, the encoding circuit shown in FIG. 3 outputs the gradation component Δm'l' and the resolution component φ _ij .

Next, FIG. 4 shows an embodiment of a decoding circuit using the principle of the present invention, in which 401 is an adder, 402 is a delay device, 403 is an adder, 404 is a subtracter, 40
5 is a decoder used in the system on which the present invention is based.

The operation of this circuit will be explained next. Δm' obtained by the encoding circuit shown in FIG. 3 is input to one of the input terminals of an adder 401. The delay device 402 realizes a signal delay corresponding to the processing time of one block, and sequentially adds Δm' obtained by the encoding circuit to obtain a signal corresponding to m. This is nothing but realizing equation (4), which is a modification of equation (3).

m′ _k =△m _k ′+m _k-1 ...(4) Also, the adder 403 and the subtracter 404 calculate tone components a ₀ , a in the method based on the present invention from the decoded m and l. In order to obtain ₁ , we will perform the inverse transformation of equation (2). Finally, an image signal is obtained using the decoder 405 from a ₀ , a ₁ , and φ _ij obtained through the above operations.

Next, as an application example of the present invention using the encoding circuit and decoding circuit just described, a method of application to an image file device will be described with reference to FIG. In the figure, 501
502 is an image input section, 502 is an A/D conversion section, 503 is a buffer memory capable of storing at least one block of image information, 504 is an encoding circuit shown in FIG. 3, and 505 is a code storage file section. 5
06 is the decoding circuit shown in FIG. 4, 507 is a buffer memory, and 508 is an image output section.

From the image input unit 501 to the code storage file unit 50
5 form an image encoding device, and the code storage file section 505 to image output section 508 correspond to a decoding device.

Next, the operation shown in FIG. 5 will be explained.

First, an A/D conversion section 502 converts an image signal obtained by an image input section 501 into an analog-to-digital signal. At this time, the image input unit 501 or A/
The D conversion unit 502 is configured to be able to cut out an image in units of blocks according to the shape of the block. These can be easily realized using existing technology. The block unit image signal converted by the A/D converter 502 is written into the buffer memory 503 as a digital luminance signal. The digital luminance signal in units of blocks stored in the buffer memory is subjected to the above-described processing in the encoding circuit 504, and its output is stored in the code storage file 505 to realize encoding processing.

The information stored in the code storage file 505 is
When that information is needed, it can be presented as an image by the decoding device. In this operation, the information in the code storage file 505 is output to the decoding circuit 506, and the digital luminance signal obtained by performing the above-described processing is temporarily stored in the buffer memory 507. The stored signals are displayed by the image output unit 508. At this time, the size of the buffer memory varies depending on the display method, but in the minimum case, it is sufficient that it can store one block's worth of signals.

Further, a system in which the size of a block is locally changed has been previously filed as Japanese Patent Application No. 53-6390, and an example of the application of the present invention to this will be described. FIG. 6 shows the arrangement of blocks in an encoding system where the block size is changed to 4×4 pixels or 2×2 pixels. In the figure,
Reference numeral 601 indicates, for example, the leftmost block when the block is 4 x 4 pixels and processing is performed in the direction of the arrow in the figure, or the block immediately after the 2 x 2 pixel block 604 described later, and this is initialized. It's called a block. 602 is a block of 4×4 pixels and is usually called a block. Reference numeral 603 denotes a region to be processed in a 2×2 pixel block obtained by dividing 4×4 pixels into four, and is called a fine block. Generally, the fine block 603 is used in areas where brightness changes are extremely large. In such a region, the inter-pixel correlation is also low, and the effects of the present invention cannot be expected to be that great. Therefore, the present invention will be applied to the normal block 602. In addition, in the case of the initialization block 601, since the previous block is a fine block 603 or there is no block, it is meaningless to calculate the difference with respect to m. Therefore, in the initialization block 601, △
Instead of m', m itself is output. However, the present invention is generally applied to l as well as block 602.

As described above, if the present invention is utilized, the effect of reducing the amount of code is large even in an encoding processing method in which the size of the block changes, and the initialization block 601, normal block 602, fine block 6
Needless to say, in the determination of 03, the flag for determining the block size can be shared, and the amount of code does not increase due to the flag.

Furthermore, in the present invention, the statistical property of the difference Δm from the previous block is used for m, but from this point of view, it is possible to use information not only on the previous block but also on multiple blocks surrounding the block to be coded. I can't help it. Furthermore, if the amplitude of l is 0 or extremely small, it is possible to ignore l and use only m as the gradation component, and it goes without saying that in this case, the resolution component φ _ij is also unnecessary. , Furthermore, m and l are not limited to Equation (2); for example, the following Equation (5) may be used.

In short, in the present invention, it is sufficient to obtain signals related to the sum and difference of gradation components.

Furthermore, in the main text, in order to clarify the operational functions of encoding and decoding, the description has been made assuming a wired logic circuit, but this does not preclude realization using a microcomputer or the like.

In the above description, it has been shown that the encoded signal is filed, but it goes without saying that the present invention can be applied to a transmission system that directly transmits the encoded signal via a transmission path.

As explained above, according to the present invention, it is possible to reduce the amount of code required for tone components by utilizing image correlation, and extremely high encoding efficiency can be obtained as an encoding processing method. When used in an image communication system, the transmission time can be shortened, and when used in an image file system, the amount of files can be reduced.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram illustrating the application concept of the encoding method according to the present invention, FIG. 2 is an explanatory diagram that enlarges a part of FIG. 1, and FIG. FIG. 4 is a block diagram showing an example of a decoding circuit based on the principles of the present invention, FIG. 5 is a block diagram showing one application example using the present invention, and FIG. A conceptual explanatory diagram is shown when used in an encoding method that makes . 100...Target image, 101...Block serving as a unit of processing, 201-203...Block serving as a unit of processing, 301...Encoder used in the system that is the premise of the present invention, 302...Adder, 303...Subtractor,
304, 305...Divider, 306...Subtractor, 30
7...Converter, 308...Subtractor, 309...Delay device,
310...Converter, 401...Adder, 402...Delay device, 403...Adder, 404...Subtractor, 405...
Decoder used in the system premised on the present invention, 50
1... Image input section, 502... A/D conversion section, 503
...Buffer memory, 504...Encoding circuit shown in FIG. 3, 505...Code storage file section, 506...
Decoding circuit shown in FIG. 4, 507...buffer memory, 508...image output unit, 601...initialization block, 602...normal block, 603...fine block.

Claims (1)

[Claims] 1 Divide the grayscale image into blocks of appropriate size, which are sets of adjacent pixels, set a threshold value based on the luminance distribution of the pixels in this block, and use the threshold value to divide each pixel in the block into blocks of appropriate size. Divide into a set of pixels with a brightness value less than the threshold value and a set of pixels with a brightness value greater than the threshold value, calculate the average brightness level of each set of pixels, and based on the brightness level, two brightness levels a ₀ , a ₁ (hereinafter referred to as the gradation component), and the above image is determined using the gradation component and information φij (hereinafter referred to as the resolution component) indicating which of the pixel sets each pixel in the block belongs to. In the encoding processing method for encoding, a sum signal and a difference signal are obtained for the tone components a ₀ and a ₁ of the block, and the sum signal is further compared with similar sum signals of surrounding blocks of the block to be encoded. , and the difference signal or a signal corresponding thereto is encoded instead of the tone components a ₀ and a ₁ and output.