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JPS61280687A - Buried type light emission diode - Google Patents

Buried type light emission diode

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Publication number
JPS61280687A
JPS61280687A JP60121408A JP12140885A JPS61280687A JP S61280687 A JPS61280687 A JP S61280687A JP 60121408 A JP60121408 A JP 60121408A JP 12140885 A JP12140885 A JP 12140885A JP S61280687 A JPS61280687 A JP S61280687A
Authority
JP
Japan
Prior art keywords
layer
mesa
light emitting
buried
emitting diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60121408A
Other languages
Japanese (ja)
Inventor
Akira Tanaka
明 田中
Takayuki Matsuyama
松山 隆之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Development and Engineering Corp
Original Assignee
Toshiba Corp
Toshiba Electronic Device Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Electronic Device Engineering Co Ltd filed Critical Toshiba Corp
Priority to JP60121408A priority Critical patent/JPS61280687A/en
Publication of JPS61280687A publication Critical patent/JPS61280687A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [発明の屈する技術分野] 本発明は埋め込み型発光ダイオードに関する。[Detailed description of the invention] [Technical fields where inventions succumb] The present invention relates to embedded light emitting diodes.

[発明の技術的背景とその問題点] 半導体基板上にダブルヘテロ構造を成長させ、メサ状に
エツチングした後、p−n逆接合を含む層を成長させて
メサ部を埋め込んだ、いわゆる埋め込み型半導体発光素
子は、活性層に電流を狭窄できるため、低電流駆動、高
出力が容易に実現できる。例えば、Ga InAsP/
 I nP系の埋め込み型発光ダイオードは、第3図に
示すように構成されている。
[Technical background of the invention and its problems] A so-called buried type method in which a double heterostructure is grown on a semiconductor substrate, etched into a mesa shape, and then a layer containing a pn reverse junction is grown to bury the mesa portion. Semiconductor light emitting devices can constrict current in the active layer, so low current drive and high output can be easily achieved. For example, GaInAsP/
The InP-based embedded light emitting diode is constructed as shown in FIG.

n型InP基板2上にn型InPバッファ層4、I n
GaAsP活性層6、p型InPクラッド層8、p型I
 nGaAsPオーミック層10を成長させ、更に5f
Oz膜を堆積させてフォトレジストにより、円形のマス
クを形成し、ブロム・メタノール系、塩酸系、硫酸系の
エツチング液を用いて、バッフ1層4に達するまでエツ
チングし、メサ部を形成する。この後、メサ側面をp型
InP層12、n型InP層14(電流阻止層) 、I
nGaAsキャップ層16で埋め込む。SiO□膜を除
去後、結晶成長層側の電極18を形成する。この後基板
2の裏面を研磨し基板側電極20を形成し、更にエツチ
ングにより光取り出し窓22を形成する。
An n-type InP buffer layer 4, I n
GaAsP active layer 6, p-type InP cladding layer 8, p-type I
Grow nGaAsP ohmic layer 10 and further 5f
An Oz film is deposited, a circular mask is formed with photoresist, and etching is performed using a bromine-methanol, hydrochloric acid, or sulfuric acid-based etching solution until reaching the buffer 1 layer 4 to form a mesa portion. After this, the mesa side surface is covered with a p-type InP layer 12, an n-type InP layer 14 (current blocking layer), and an I
Fill with nGaAs cap layer 16. After removing the SiO□ film, an electrode 18 on the crystal growth layer side is formed. Thereafter, the back surface of the substrate 2 is polished to form a substrate-side electrode 20, and further, a light extraction window 22 is formed by etching.

上述の構成では、基板2側より光取り出しを行なってい
るので、基板2を数十〜100μmの厚さに研磨する必
要がある。しかるに、研磨し薄くなった基板に対して電
極形成および光取出し窓の形成工程が行われるため、基
板(個々のチップに分割する前のウェハー)が割れやす
いという欠点がある。更に基板2側より光取り出しが行
なわれるため、ファイバとの結合効率が悪いという欠点
がある。
In the above configuration, since light is extracted from the substrate 2 side, it is necessary to polish the substrate 2 to a thickness of several tens to 100 μm. However, since the steps of forming electrodes and forming light extraction windows are performed on a substrate that has been polished and made thinner, there is a drawback that the substrate (wafer before being divided into individual chips) is easily broken. Furthermore, since light is extracted from the substrate 2 side, there is a drawback that the coupling efficiency with the fiber is poor.

[発明の目的] 本発明は、製造工程での基板の割れが少なく、しかも、
ファイバとの結合効率の高い埋め込み型発光ダイオード
を提供するものである。
[Object of the Invention] The present invention reduces cracking of the substrate during the manufacturing process, and
The present invention provides an embedded light emitting diode with high coupling efficiency with fiber.

[発明の概要] 本発明の埋め込み型発光ダイオードによれば、クラッド
層を埋め込み層よりも屈折率が大きく、且つ活性層より
も禁制帯幅が小さい半導体結晶層で形成してなり、活性
層からでた光を結晶成長層側へ導波するようにしてなる
。従って、ファイバとの結合効率を高くできる。また結
晶成長層側より光取り出しが行なわれるので、基板を薄
くする必要がなくウェハーの割れを少なくすることがで
きる。
[Summary of the Invention] According to the buried light emitting diode of the present invention, the cladding layer is formed of a semiconductor crystal layer having a higher refractive index than the buried layer and a narrower forbidden band width than the active layer, and The emitted light is guided to the crystal growth layer side. Therefore, the coupling efficiency with the fiber can be increased. Furthermore, since light is extracted from the crystal growth layer side, there is no need to make the substrate thinner, and cracks in the wafer can be reduced.

[発明の実施例] 本発明を、GaInAS/InP系埋め込み型発光ダイ
オードに適用した実施例を参照して説明する。
[Embodiments of the Invention] The present invention will be described with reference to embodiments in which it is applied to a GaInAS/InP-based embedded light emitting diode.

第1図に示すように、n型InP基板30上にn型In
Pバッファ層32、GaInAsP活性層34、p型G
aInへsPクラッド層36およびp十型GaInAS
Pオーミック層38を結晶成長させ、5iOz膜を堆積
させる。次にフォトレジストを形成し、5iOz膜の円
形のマスクを形成する。硫酸系エツチング液またはKO
H+に1Fe(CM)、÷HLO溶液を用いてオーミッ
ク層38、クラッド層36、活性層34をエツチングし
てメサ部を形成する。
As shown in FIG. 1, an n-type InP substrate 30 is
P buffer layer 32, GaInAsP active layer 34, p-type G
sP cladding layer 36 and p-type GaInAS to aIn
A P ohmic layer 38 is crystal grown and a 5iOz film is deposited. Next, a photoresist is formed to form a circular mask of 5iOz film. Sulfuric acid etching solution or KO
The ohmic layer 38, cladding layer 36, and active layer 34 are etched using a H+ solution of 1Fe(CM)/HLO to form a mesa portion.

更にp型InP層401n型InP層42、n型GaI
nASPキャップ層44からなる埋め込み層を順次液相
結晶成長させ、メサ側面を埋め込む。Si0g膜を除去
した後、結晶成長層側(オーミック層38およびキャッ
プ層44)に全面に電極46をつけ、フォトリソグラフ
ィによりメサ部にメサ上面よりも小さい窓を電極46に
あけ、光取出し窓48を形成する。次に、基板30の裏
面側を研磨した後全面に電極50形成した。
Furthermore, p-type InP layer 401, n-type InP layer 42, n-type GaI
A burying layer consisting of the nASP cap layer 44 is sequentially grown by liquid phase crystal growth to bury the side surfaces of the mesa. After removing the Si0g film, an electrode 46 is attached to the entire surface of the crystal growth layer side (ohmic layer 38 and cap layer 44), and a window smaller than the top surface of the mesa is made in the mesa part by photolithography, and a light extraction window 48 is formed in the electrode 46. form. Next, after polishing the back side of the substrate 30, an electrode 50 was formed on the entire surface.

上述の構成において、クラッド層36、オーミック層3
8を活性層34よりも屈折率が小さく、埋込み層40.
42よりは屈折率の大きなGaInASP層とすること
により、クラッド層36を導波路層として活性層34か
らでた光を光取出し窓48側へ効率良く導波することが
できる。
In the above configuration, the cladding layer 36 and the ohmic layer 3
8 has a lower refractive index than the active layer 34, and the buried layer 40.
By using the GaInASP layer having a larger refractive index than 42, the light emitted from the active layer 34 can be efficiently guided to the light extraction window 48 side using the cladding layer 36 as a waveguide layer.

[発明の効果] 本発明によれば、結晶成長層側に光取り出し窓を形成す
ると共に、活性層から出た光を導波するようにしたので
、ファイバとの結合効率を高くすることができる。
[Effects of the Invention] According to the present invention, since a light extraction window is formed on the crystal growth layer side and the light emitted from the active layer is guided, the coupling efficiency with the fiber can be increased. .

また、光取り出し窓を形成する際、基板10を薄くする
必要がないので、基板が割れるということがなくなる。
Furthermore, since there is no need to make the substrate 10 thinner when forming the light extraction window, the substrate will not break.

[他の実施例] また第2図示の実施例では埋め込み層のキャップ層44
を1型GaInAsPとし、メサ部のP+型GaInA
SPオーミック層38側面に位置させることにより、電
流通路を形成した。このため電極46の窓48をメサよ
りも大きくすることができる。従って、光取り出し窓形
成時のマスク合せが容易となる、またメサ全域より光を
取出すことができ、光の取出しが第1図の実施例に比べ
向上する。
[Other Embodiments] In the embodiment shown in the second figure, the cap layer 44 of the buried layer
is type 1 GaInAsP, and P+ type GaInA in the mesa part is
A current path was formed by placing it on the side surface of the SP ohmic layer 38. Therefore, the window 48 of the electrode 46 can be made larger than the mesa. Therefore, mask alignment during the formation of the light extraction window becomes easy, and light can be extracted from the entire mesa area, so that the light extraction is improved compared to the embodiment shown in FIG.

本発明は、発明の趣旨を逸脱しない範囲で種々の変形が
可能であり、例えばAlGaAs/GaAs系発光ダイ
オードなどにも適用できる。
The present invention can be modified in various ways without departing from the spirit of the invention, and can be applied to, for example, AlGaAs/GaAs light emitting diodes.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の埋め込み型発光ダイオード
を示す断面図、第2図は本発明の他の実施例の埋め込み
型発光ダイオードを示す断面図、第3図は背景技術の埋
め込み型発光ダイオードを示す断面図である。 30・・・・・・基板、32・・・・・・バッフ1層3
4・・・・・・活性層、35・・・・・・クラッド層3
6・・・・・・オーミック層、46・・・・・・光取り
出し窓代理人弁理士 則近憲佑 (ほか1名)第  2
 図
Fig. 1 is a sectional view showing an embedded type light emitting diode according to one embodiment of the present invention, Fig. 2 is a sectional view showing an embedded type light emitting diode according to another embodiment of the present invention, and Fig. 3 is a sectional view showing an embedded type light emitting diode according to another embodiment of the present invention. FIG. 2 is a cross-sectional view showing a light emitting diode. 30...Substrate, 32...Buffer 1 layer 3
4... Active layer, 35... Clad layer 3
6...Ohmic layer, 46...Light extraction window agent Kensuke Norichika (and 1 other person) 2nd
figure

Claims (3)

【特許請求の範囲】[Claims] (1)第1導電型の基板上に、第1導電型のバッファ層
、活性層及び第2導電型のクラッド層からなるダブルヘ
テロ構造を含む円形状のメサを有し、このメサを活性層
よりも屈折率の小さな埋め込み層で埋め込んだ埋め込み
型発光ダイオードにおいて、前記活性層上に形成される
前記クラッド層が、前記埋め込み層よりも大きい屈折率
と前記活性層よりも小さい禁制帯幅を持つことを特徴と
する埋め込み型発光ダイオード。
(1) A circular mesa including a double heterostructure consisting of a buffer layer of a first conductivity type, an active layer, and a cladding layer of a second conductivity type is provided on a substrate of a first conductivity type, and this mesa is used as an active layer. In the buried light emitting diode embedded with a buried layer having a refractive index smaller than that of the active layer, the cladding layer formed on the active layer has a refractive index larger than that of the buried layer and a band gap smaller than that of the active layer. An embedded light emitting diode characterized by:
(2)前記メサ側及び前記基板側にそれぞれ電極を備え
、メサ側の電極はメサよりも小さい光取出し窓を有する
ことを特徴とする特許請求の範囲第1項記載の埋め込み
型発光ダイオード。
(2) The embedded light emitting diode according to claim 1, wherein electrodes are provided on the mesa side and on the substrate side, and the electrode on the mesa side has a light extraction window smaller than the mesa.
(3)前記メサ側及び前記基板側にそれぞれ電極を備え
、メサ側の電極はメサよりも大きい光取出し窓を有し、
また前記埋め込み層は複数層からなり、最上層が第2導
電型半導体層であることを特徴とする特許請求の範囲第
1項記載の埋め込み型発光ダイオード。
(3) electrodes are provided on the mesa side and the substrate side, the electrode on the mesa side having a light extraction window larger than the mesa;
2. The buried light emitting diode according to claim 1, wherein the buried layer is composed of a plurality of layers, and the uppermost layer is a second conductivity type semiconductor layer.
JP60121408A 1985-06-06 1985-06-06 Buried type light emission diode Pending JPS61280687A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60121408A JPS61280687A (en) 1985-06-06 1985-06-06 Buried type light emission diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60121408A JPS61280687A (en) 1985-06-06 1985-06-06 Buried type light emission diode

Publications (1)

Publication Number Publication Date
JPS61280687A true JPS61280687A (en) 1986-12-11

Family

ID=14810436

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60121408A Pending JPS61280687A (en) 1985-06-06 1985-06-06 Buried type light emission diode

Country Status (1)

Country Link
JP (1) JPS61280687A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62179179A (en) * 1986-01-31 1987-08-06 Oki Electric Ind Co Ltd Light emitting device and manufacture of same
US6614821B1 (en) * 1999-08-04 2003-09-02 Ricoh Company, Ltd. Laser diode and semiconductor light-emitting device producing visible-wavelength radiation
JP2023043548A (en) * 2021-09-16 2023-03-29 浜松ホトニクス株式会社 Optical semiconductor element, optical unit and method for manufacturing optical unit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62179179A (en) * 1986-01-31 1987-08-06 Oki Electric Ind Co Ltd Light emitting device and manufacture of same
US6614821B1 (en) * 1999-08-04 2003-09-02 Ricoh Company, Ltd. Laser diode and semiconductor light-emitting device producing visible-wavelength radiation
US6983004B2 (en) 1999-08-04 2006-01-03 Ricoh Company, Ltd. Laser diode and semiconductor light-emitting device producing visible-wavelength radiation
US7139297B2 (en) 1999-08-04 2006-11-21 Ricoh Company, Ltd. Laser diode and semiconductor light-emitting device producing visible-wavelength radiation
US7684456B2 (en) 1999-08-04 2010-03-23 Ricoh Company, Ltd. Laser diode and semiconductor light-emitting device producing visible-wavelength radiation
US8009714B2 (en) 1999-08-04 2011-08-30 Ricoh Company, Ltd. Laser diode and semiconductor light-emitting device producing visible-wavelength radiation
US8537870B2 (en) 1999-08-04 2013-09-17 Ricoh Company, Limited Laser diode and semiconductor light-emitting device producing visible-wavelength radiation
JP2023043548A (en) * 2021-09-16 2023-03-29 浜松ホトニクス株式会社 Optical semiconductor element, optical unit and method for manufacturing optical unit

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